Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Specify clock provider directly to CPU DAIs

Merge series from Charles Keepax <ckeepax@opensource.cirrus.com>:

Currently the set_fmt callback always passes clock provider/consumer
with respect to the CODEC. This made sense when the framework was
directly broken down into platforms and CODECs. However, as things
are now broken down into components which can be connected as either
the CPU or CODEC side of a DAI link it simplifies things if each
side of the link is just told if it is provider or consumer of the
clocks. Making this change allows us to remove one of the last parts
of the ASoC core that needs to know if a driver is a CODEC driver,
where it flips the clock format specifier if a CODEC driver is used on
the CPU side of a DAI link, as well as just being conceptually more
consistent with componentisation.

The basic idea of this patch chain is to change the set_fmt callback
from specifying if the CODEC is provider/consumer into directly
specifying if the component is provider/consumer. To do this we add
some new defines, and then to preserve bisectability, the migration is
done by adding a new callback, converting over all existing CPU side
drivers, converting the core, and then finally reverting back to the
old callback.

Converting the platform drivers makes sense as the existing defines
are from the perspective of the CODEC and there are more CODEC drivers
than platform drivers.

Obviously a fair amount of this patch chain I was only able to build
test, so any testing that can be done would be greatly appreciated.

+279 -283
-5
include/sound/soc-component.h
··· 348 348 return regcache_sync(component->regmap); 349 349 } 350 350 351 - static inline int snd_soc_component_is_codec(struct snd_soc_component *component) 352 - { 353 - return component->driver->non_legacy_dai_naming; 354 - } 355 - 356 351 void snd_soc_component_set_aux(struct snd_soc_component *component, 357 352 struct snd_soc_aux_dev *aux); 358 353 int snd_soc_component_init(struct snd_soc_component *component);
+6
include/sound/soc-dai.h
··· 124 124 #define SND_SOC_DAIFMT_CBM_CFS SND_SOC_DAIFMT_CBP_CFC 125 125 #define SND_SOC_DAIFMT_CBS_CFS SND_SOC_DAIFMT_CBC_CFC 126 126 127 + /* when passed to set_fmt directly indicate if the device is provider or consumer */ 128 + #define SND_SOC_DAIFMT_BP_FP SND_SOC_DAIFMT_CBP_CFP 129 + #define SND_SOC_DAIFMT_BC_FP SND_SOC_DAIFMT_CBC_CFP 130 + #define SND_SOC_DAIFMT_BP_FC SND_SOC_DAIFMT_CBP_CFC 131 + #define SND_SOC_DAIFMT_BC_FC SND_SOC_DAIFMT_CBC_CFC 132 + 127 133 /* Describes the possible PCM format */ 128 134 #define SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_SHIFT 48 129 135 #define SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_MASK (0xFFFFULL << SND_SOC_POSSIBLE_DAIFMT_CLOCK_PROVIDER_SHIFT)
+2 -2
sound/soc/amd/vangogh/acp5x-i2s.c
··· 37 37 } 38 38 mode = fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK; 39 39 switch (mode) { 40 - case SND_SOC_DAIFMT_CBC_CFC: 40 + case SND_SOC_DAIFMT_BP_FP: 41 41 adata->master_mode = I2S_MASTER_MODE_ENABLE; 42 42 break; 43 - case SND_SOC_DAIFMT_CBP_CFP: 43 + case SND_SOC_DAIFMT_BC_FC: 44 44 adata->master_mode = I2S_MASTER_MODE_DISABLE; 45 45 break; 46 46 }
+2 -2
sound/soc/atmel/atmel-i2s.c
··· 343 343 } 344 344 345 345 switch (dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 346 - case SND_SOC_DAIFMT_CBC_CFC: 346 + case SND_SOC_DAIFMT_BP_FP: 347 347 /* codec is slave, so cpu is master */ 348 348 mr |= ATMEL_I2SC_MR_MODE_MASTER; 349 349 ret = atmel_i2s_get_gck_param(dev, params_rate(params)); ··· 351 351 return ret; 352 352 break; 353 353 354 - case SND_SOC_DAIFMT_CBP_CFP: 354 + case SND_SOC_DAIFMT_BC_FC: 355 355 /* codec is master, so cpu is slave */ 356 356 mr |= ATMEL_I2SC_MR_MODE_SLAVE; 357 357 dev->gck_param = NULL;
+9 -9
sound/soc/atmel/atmel_ssc_dai.c
··· 210 210 return frame_size; 211 211 212 212 switch (ssc_p->daifmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 213 - case SND_SOC_DAIFMT_CBP_CFC: 213 + case SND_SOC_DAIFMT_BC_FP: 214 214 if ((ssc_p->dir_mask & SSC_DIR_MASK_CAPTURE) 215 215 && ssc->clk_from_rk_pin) 216 216 /* Receiver Frame Synchro (i.e. capture) ··· 220 220 mck_div = 3; 221 221 break; 222 222 223 - case SND_SOC_DAIFMT_CBP_CFP: 223 + case SND_SOC_DAIFMT_BC_FC: 224 224 if ((ssc_p->dir_mask & SSC_DIR_MASK_PLAYBACK) 225 225 && !ssc->clk_from_rk_pin) 226 226 /* Transmit Frame Synchro (i.e. playback) ··· 233 233 } 234 234 235 235 switch (ssc_p->daifmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 236 - case SND_SOC_DAIFMT_CBC_CFC: 236 + case SND_SOC_DAIFMT_BP_FP: 237 237 r.num = ssc_p->mck_rate / mck_div / frame_size; 238 238 239 239 ret = snd_interval_ratnum(i, 1, &r, &num, &den); ··· 243 243 } 244 244 break; 245 245 246 - case SND_SOC_DAIFMT_CBP_CFC: 247 - case SND_SOC_DAIFMT_CBP_CFP: 246 + case SND_SOC_DAIFMT_BC_FP: 247 + case SND_SOC_DAIFMT_BC_FC: 248 248 t.min = 8000; 249 249 t.max = ssc_p->mck_rate / mck_div / frame_size; 250 250 t.openmin = t.openmax = 0; ··· 433 433 static int atmel_ssc_cfs(struct atmel_ssc_info *ssc_p) 434 434 { 435 435 switch (ssc_p->daifmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 436 - case SND_SOC_DAIFMT_CBP_CFC: 437 - case SND_SOC_DAIFMT_CBC_CFC: 436 + case SND_SOC_DAIFMT_BC_FP: 437 + case SND_SOC_DAIFMT_BP_FP: 438 438 return 1; 439 439 } 440 440 return 0; ··· 444 444 static int atmel_ssc_cbs(struct atmel_ssc_info *ssc_p) 445 445 { 446 446 switch (ssc_p->daifmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 447 - case SND_SOC_DAIFMT_CBC_CFP: 448 - case SND_SOC_DAIFMT_CBC_CFC: 447 + case SND_SOC_DAIFMT_BP_FC: 448 + case SND_SOC_DAIFMT_BP_FP: 449 449 return 1; 450 450 } 451 451 return 0;
+4 -4
sound/soc/atmel/mchp-i2s-mcc.c
··· 350 350 return -EINVAL; 351 351 352 352 /* We can't generate only FSYNC */ 353 - if ((fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) == SND_SOC_DAIFMT_CBP_CFC) 353 + if ((fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) == SND_SOC_DAIFMT_BC_FP) 354 354 return -EINVAL; 355 355 356 356 /* We can only reconfigure the IP when it's stopped */ ··· 547 547 } 548 548 549 549 switch (dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 550 - case SND_SOC_DAIFMT_CBC_CFC: 550 + case SND_SOC_DAIFMT_BP_FP: 551 551 /* cpu is BCLK and LRC master */ 552 552 mra |= MCHP_I2SMCC_MRA_MODE_MASTER; 553 553 if (dev->sysclk) 554 554 mra |= MCHP_I2SMCC_MRA_IMCKMODE_GEN; 555 555 set_divs = 1; 556 556 break; 557 - case SND_SOC_DAIFMT_CBC_CFP: 557 + case SND_SOC_DAIFMT_BP_FC: 558 558 /* cpu is BCLK master */ 559 559 mrb |= MCHP_I2SMCC_MRB_CLKSEL_INT; 560 560 set_divs = 1; 561 561 fallthrough; 562 - case SND_SOC_DAIFMT_CBP_CFP: 562 + case SND_SOC_DAIFMT_BC_FC: 563 563 /* cpu is slave */ 564 564 mra |= MCHP_I2SMCC_MRA_MODE_SLAVE; 565 565 if (dev->sysclk)
+2 -2
sound/soc/atmel/mchp-pdmc.c
··· 492 492 unsigned int fmt_format = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 493 493 494 494 /* IP needs to be bitclock master */ 495 - if (fmt_master != SND_SOC_DAIFMT_CBS_CFS && 496 - fmt_master != SND_SOC_DAIFMT_CBS_CFM) 495 + if (fmt_master != SND_SOC_DAIFMT_BP_FP && 496 + fmt_master != SND_SOC_DAIFMT_BP_FC) 497 497 return -EINVAL; 498 498 499 499 /* IP supports only PDM interface */
+1 -1
sound/soc/au1x/i2sc.c
··· 121 121 122 122 /* I2S controller only supports provider */ 123 123 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 124 - case SND_SOC_DAIFMT_CBC_CFC: /* CODEC consumer */ 124 + case SND_SOC_DAIFMT_BP_FP: /* CODEC consumer */ 125 125 break; 126 126 default: 127 127 goto out;
+2 -2
sound/soc/au1x/psc-i2s.c
··· 91 91 } 92 92 93 93 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 94 - case SND_SOC_DAIFMT_CBP_CFP: /* CODEC provider */ 94 + case SND_SOC_DAIFMT_BC_FC: /* CODEC provider */ 95 95 ct |= PSC_I2SCFG_MS; /* PSC I2S consumer mode */ 96 96 break; 97 - case SND_SOC_DAIFMT_CBC_CFC: /* CODEC consumer */ 97 + case SND_SOC_DAIFMT_BP_FP: /* CODEC consumer */ 98 98 ct &= ~PSC_I2SCFG_MS; /* PSC I2S provider mode */ 99 99 break; 100 100 default:
+10 -10
sound/soc/bcm/bcm2835-i2s.c
··· 133 133 return; 134 134 135 135 switch (provider) { 136 - case SND_SOC_DAIFMT_CBC_CFC: 137 - case SND_SOC_DAIFMT_CBC_CFP: 136 + case SND_SOC_DAIFMT_BP_FP: 137 + case SND_SOC_DAIFMT_BP_FC: 138 138 clk_prepare_enable(dev->clk); 139 139 dev->clk_prepared = true; 140 140 break; ··· 385 385 386 386 /* Check if CPU is bit clock provider */ 387 387 switch (dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 388 - case SND_SOC_DAIFMT_CBC_CFC: 389 - case SND_SOC_DAIFMT_CBC_CFP: 388 + case SND_SOC_DAIFMT_BP_FP: 389 + case SND_SOC_DAIFMT_BP_FC: 390 390 bit_clock_provider = true; 391 391 break; 392 - case SND_SOC_DAIFMT_CBP_CFC: 393 - case SND_SOC_DAIFMT_CBP_CFP: 392 + case SND_SOC_DAIFMT_BC_FP: 393 + case SND_SOC_DAIFMT_BC_FC: 394 394 bit_clock_provider = false; 395 395 break; 396 396 default: ··· 399 399 400 400 /* Check if CPU is frame sync provider */ 401 401 switch (dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 402 - case SND_SOC_DAIFMT_CBC_CFC: 403 - case SND_SOC_DAIFMT_CBP_CFC: 402 + case SND_SOC_DAIFMT_BP_FP: 403 + case SND_SOC_DAIFMT_BC_FP: 404 404 frame_sync_provider = true; 405 405 break; 406 - case SND_SOC_DAIFMT_CBC_CFP: 407 - case SND_SOC_DAIFMT_CBP_CFP: 406 + case SND_SOC_DAIFMT_BP_FC: 407 + case SND_SOC_DAIFMT_BC_FC: 408 408 frame_sync_provider = false; 409 409 break; 410 410 default:
+2 -2
sound/soc/bcm/cygnus-ssp.c
··· 849 849 ssp_newcfg = 0; 850 850 851 851 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 852 - case SND_SOC_DAIFMT_CBP_CFP: 852 + case SND_SOC_DAIFMT_BC_FC: 853 853 ssp_newcfg |= BIT(I2S_OUT_CFGX_SLAVE_MODE); 854 854 aio->is_slave = 1; 855 855 break; 856 - case SND_SOC_DAIFMT_CBC_CFC: 856 + case SND_SOC_DAIFMT_BP_FP: 857 857 ssp_newcfg &= ~BIT(I2S_OUT_CFGX_SLAVE_MODE); 858 858 aio->is_slave = 0; 859 859 break;
+2 -2
sound/soc/cirrus/ep93xx-i2s.c
··· 246 246 } 247 247 248 248 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 249 - case SND_SOC_DAIFMT_CBC_CFC: 249 + case SND_SOC_DAIFMT_BP_FP: 250 250 /* CPU is provider */ 251 251 clk_cfg |= EP93XX_I2S_CLKCFG_MASTER; 252 252 break; 253 253 254 - case SND_SOC_DAIFMT_CBP_CFP: 254 + case SND_SOC_DAIFMT_BC_FC: 255 255 /* Codec is provider */ 256 256 clk_cfg &= ~EP93XX_I2S_CLKCFG_MASTER; 257 257 break;
+4 -4
sound/soc/dwc/dwc-i2s.c
··· 357 357 int ret = 0; 358 358 359 359 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 360 - case SND_SOC_DAIFMT_CBP_CFP: 360 + case SND_SOC_DAIFMT_BC_FC: 361 361 if (dev->capability & DW_I2S_SLAVE) 362 362 ret = 0; 363 363 else 364 364 ret = -EINVAL; 365 365 break; 366 - case SND_SOC_DAIFMT_CBC_CFC: 366 + case SND_SOC_DAIFMT_BP_FP: 367 367 if (dev->capability & DW_I2S_MASTER) 368 368 ret = 0; 369 369 else 370 370 ret = -EINVAL; 371 371 break; 372 - case SND_SOC_DAIFMT_CBP_CFC: 373 - case SND_SOC_DAIFMT_CBC_CFP: 372 + case SND_SOC_DAIFMT_BC_FP: 373 + case SND_SOC_DAIFMT_BP_FC: 374 374 ret = -EINVAL; 375 375 break; 376 376 default:
+3 -3
sound/soc/fsl/fsl_audmix.c
··· 259 259 260 260 /* For playback the AUDMIX is consumer, and for record is provider */ 261 261 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 262 - case SND_SOC_DAIFMT_CBP_CFP: 263 - case SND_SOC_DAIFMT_CBC_CFC: 262 + case SND_SOC_DAIFMT_BC_FC: 263 + case SND_SOC_DAIFMT_BP_FP: 264 264 break; 265 265 default: 266 266 return -EINVAL; ··· 317 317 } 318 318 319 319 static const struct snd_soc_dai_ops fsl_audmix_dai_ops = { 320 - .set_fmt = fsl_audmix_dai_set_fmt, 320 + .set_fmt = fsl_audmix_dai_set_fmt, 321 321 .trigger = fsl_audmix_dai_trigger, 322 322 }; 323 323
+4 -4
sound/soc/fsl/fsl_esai.c
··· 480 480 481 481 /* DAI clock provider masks */ 482 482 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 483 - case SND_SOC_DAIFMT_CBP_CFP: 483 + case SND_SOC_DAIFMT_BC_FC: 484 484 esai_priv->consumer_mode = true; 485 485 break; 486 - case SND_SOC_DAIFMT_CBC_CFP: 486 + case SND_SOC_DAIFMT_BP_FC: 487 487 xccr |= ESAI_xCCR_xCKD; 488 488 break; 489 - case SND_SOC_DAIFMT_CBP_CFC: 489 + case SND_SOC_DAIFMT_BC_FP: 490 490 xccr |= ESAI_xCCR_xFSD; 491 491 break; 492 - case SND_SOC_DAIFMT_CBC_CFC: 492 + case SND_SOC_DAIFMT_BP_FP: 493 493 xccr |= ESAI_xCCR_xFSD | ESAI_xCCR_xCKD; 494 494 break; 495 495 default:
+1 -1
sound/soc/fsl/fsl_mqs.c
··· 122 122 } 123 123 124 124 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 125 - case SND_SOC_DAIFMT_CBC_CFC: 125 + case SND_SOC_DAIFMT_BP_FP: 126 126 break; 127 127 default: 128 128 return -EINVAL;
+4 -4
sound/soc/fsl/fsl_sai.c
··· 292 292 293 293 /* DAI clock provider masks */ 294 294 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 295 - case SND_SOC_DAIFMT_CBC_CFC: 295 + case SND_SOC_DAIFMT_BP_FP: 296 296 val_cr2 |= FSL_SAI_CR2_BCD_MSTR; 297 297 val_cr4 |= FSL_SAI_CR4_FSD_MSTR; 298 298 sai->is_consumer_mode = false; 299 299 break; 300 - case SND_SOC_DAIFMT_CBP_CFP: 300 + case SND_SOC_DAIFMT_BC_FC: 301 301 sai->is_consumer_mode = true; 302 302 break; 303 - case SND_SOC_DAIFMT_CBC_CFP: 303 + case SND_SOC_DAIFMT_BP_FC: 304 304 val_cr2 |= FSL_SAI_CR2_BCD_MSTR; 305 305 sai->is_consumer_mode = false; 306 306 break; 307 - case SND_SOC_DAIFMT_CBP_CFC: 307 + case SND_SOC_DAIFMT_BC_FP: 308 308 val_cr4 |= FSL_SAI_CR4_FSD_MSTR; 309 309 sai->is_consumer_mode = true; 310 310 break;
+11 -11
sound/soc/fsl/fsl_ssi.c
··· 93 93 */ 94 94 #define FSLSSI_AC97_DAIFMT \ 95 95 (SND_SOC_DAIFMT_AC97 | \ 96 - SND_SOC_DAIFMT_CBM_CFS | \ 96 + SND_SOC_DAIFMT_BC_FP | \ 97 97 SND_SOC_DAIFMT_NB_NF) 98 98 99 99 #define FSLSSI_SIER_DBG_RX_FLAGS \ ··· 358 358 static bool fsl_ssi_is_i2s_clock_provider(struct fsl_ssi *ssi) 359 359 { 360 360 return (ssi->dai_fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) == 361 - SND_SOC_DAIFMT_CBC_CFC; 361 + SND_SOC_DAIFMT_BP_FP; 362 362 } 363 363 364 - static bool fsl_ssi_is_i2s_cbp_cfc(struct fsl_ssi *ssi) 364 + static bool fsl_ssi_is_i2s_bc_fp(struct fsl_ssi *ssi) 365 365 { 366 366 return (ssi->dai_fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) == 367 - SND_SOC_DAIFMT_CBP_CFC; 367 + SND_SOC_DAIFMT_BC_FP; 368 368 } 369 369 370 370 /** ··· 847 847 u8 i2s_net = ssi->i2s_net; 848 848 849 849 /* Normal + Network mode to send 16-bit data in 32-bit frames */ 850 - if (fsl_ssi_is_i2s_cbp_cfc(ssi) && sample_size == 16) 850 + if (fsl_ssi_is_i2s_bc_fp(ssi) && sample_size == 16) 851 851 i2s_net = SSI_SCR_I2S_MODE_NORMAL | SSI_SCR_NET; 852 852 853 853 /* Use Normal mode to send mono data at 1st slot of 2 slots */ ··· 920 920 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 921 921 case SND_SOC_DAIFMT_I2S: 922 922 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 923 - case SND_SOC_DAIFMT_CBC_CFC: 923 + case SND_SOC_DAIFMT_BP_FP: 924 924 if (IS_ERR(ssi->baudclk)) { 925 925 dev_err(ssi->dev, 926 926 "missing baudclk for master mode\n"); 927 927 return -EINVAL; 928 928 } 929 929 fallthrough; 930 - case SND_SOC_DAIFMT_CBP_CFC: 930 + case SND_SOC_DAIFMT_BC_FP: 931 931 ssi->i2s_net |= SSI_SCR_I2S_MODE_MASTER; 932 932 break; 933 - case SND_SOC_DAIFMT_CBP_CFP: 933 + case SND_SOC_DAIFMT_BC_FC: 934 934 ssi->i2s_net |= SSI_SCR_I2S_MODE_SLAVE; 935 935 break; 936 936 default: ··· 992 992 993 993 /* DAI clock provider masks */ 994 994 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 995 - case SND_SOC_DAIFMT_CBC_CFC: 995 + case SND_SOC_DAIFMT_BP_FP: 996 996 /* Output bit and frame sync clocks */ 997 997 strcr |= SSI_STCR_TFDIR | SSI_STCR_TXDIR; 998 998 scr |= SSI_SCR_SYS_CLK_EN; 999 999 break; 1000 - case SND_SOC_DAIFMT_CBP_CFP: 1000 + case SND_SOC_DAIFMT_BC_FC: 1001 1001 /* Input bit or frame sync clocks */ 1002 1002 break; 1003 - case SND_SOC_DAIFMT_CBP_CFC: 1003 + case SND_SOC_DAIFMT_BC_FP: 1004 1004 /* Input bit clock but output frame sync clock */ 1005 1005 strcr |= SSI_STCR_TFDIR; 1006 1006 break;
+2 -2
sound/soc/fsl/imx-audmix.c
··· 81 81 int ret, dir; 82 82 83 83 /* For playback the AUDMIX is consumer, and for record is provider */ 84 - fmt |= tx ? SND_SOC_DAIFMT_CBC_CFC : SND_SOC_DAIFMT_CBP_CFP; 84 + fmt |= tx ? SND_SOC_DAIFMT_BP_FP : SND_SOC_DAIFMT_BC_FC; 85 85 dir = tx ? SND_SOC_CLOCK_OUT : SND_SOC_CLOCK_IN; 86 86 87 87 /* set DAI configuration */ ··· 122 122 return 0; 123 123 124 124 /* For playback the AUDMIX is consumer */ 125 - fmt |= SND_SOC_DAIFMT_CBP_CFP; 125 + fmt |= SND_SOC_DAIFMT_BC_FC; 126 126 127 127 /* set AUDMIX DAI configuration */ 128 128 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), fmt);
+1 -1
sound/soc/fsl/imx-card.c
··· 317 317 } 318 318 } 319 319 320 - ret = snd_soc_dai_set_fmt(cpu_dai, fmt); 320 + ret = snd_soc_dai_set_fmt(cpu_dai, snd_soc_daifmt_clock_provider_flipped(fmt)); 321 321 if (ret && ret != -ENOTSUPP) { 322 322 dev_err(dev, "failed to set cpu dai fmt: %d\n", ret); 323 323 return ret;
+6 -1
sound/soc/generic/simple-card-utils.c
··· 513 513 return 0; 514 514 } 515 515 516 + static inline int asoc_simple_component_is_codec(struct snd_soc_component *component) 517 + { 518 + return component->driver->endianness; 519 + } 520 + 516 521 static int asoc_simple_init_for_codec2codec(struct snd_soc_pcm_runtime *rtd, 517 522 struct simple_dai_props *dai_props) 518 523 { ··· 529 524 530 525 /* Only Codecs */ 531 526 for_each_rtd_components(rtd, i, component) { 532 - if (!snd_soc_component_is_codec(component)) 527 + if (!asoc_simple_component_is_codec(component)) 533 528 return 0; 534 529 } 535 530
+9 -9
sound/soc/generic/test-component.c
··· 66 66 unsigned int format = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 67 67 unsigned int clock = fmt & SND_SOC_DAIFMT_CLOCK_MASK; 68 68 unsigned int inv = fmt & SND_SOC_DAIFMT_INV_MASK; 69 - unsigned int master = fmt & SND_SOC_DAIFMT_MASTER_MASK; 69 + unsigned int master = fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK; 70 70 char *str; 71 71 72 72 dev_info(dai->dev, "name : %s", dai->name); ··· 105 105 106 106 str = "unknown"; 107 107 switch (master) { 108 - case SND_SOC_DAIFMT_CBP_CFP: 108 + case SND_SOC_DAIFMT_BP_FP: 109 109 str = "clk provider, frame provider"; 110 110 break; 111 - case SND_SOC_DAIFMT_CBC_CFP: 111 + case SND_SOC_DAIFMT_BC_FP: 112 112 str = "clk consumer, frame provider"; 113 113 break; 114 - case SND_SOC_DAIFMT_CBP_CFC: 114 + case SND_SOC_DAIFMT_BP_FC: 115 115 str = "clk provider, frame consumer"; 116 116 break; 117 - case SND_SOC_DAIFMT_CBC_CFC: 117 + case SND_SOC_DAIFMT_BC_FC: 118 118 str = "clk consumer, frame consumer"; 119 119 break; 120 120 } ··· 192 192 static u64 test_dai_formats = 193 193 /* 194 194 * Select below from Sound Card, not auto 195 - * SND_SOC_POSSIBLE_DAIFMT_CBP_CFP 196 - * SND_SOC_POSSIBLE_DAIFMT_CBC_CFP 197 - * SND_SOC_POSSIBLE_DAIFMT_CBP_CFC 198 - * SND_SOC_POSSIBLE_DAIFMT_CBC_CFC 195 + * SND_SOC_POSSIBLE_DAIFMT_BP_FP 196 + * SND_SOC_POSSIBLE_DAIFMT_BC_FP 197 + * SND_SOC_POSSIBLE_DAIFMT_BP_FC 198 + * SND_SOC_POSSIBLE_DAIFMT_BC_FC 199 199 */ 200 200 SND_SOC_POSSIBLE_DAIFMT_I2S | 201 201 SND_SOC_POSSIBLE_DAIFMT_RIGHT_J |
+9 -9
sound/soc/hisilicon/hi6210-i2s.c
··· 227 227 * We don't actually set the hardware until the hw_params 228 228 * call, but we need to validate the user input here. 229 229 */ 230 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 231 - case SND_SOC_DAIFMT_CBM_CFM: 232 - case SND_SOC_DAIFMT_CBS_CFS: 230 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 231 + case SND_SOC_DAIFMT_BC_FC: 232 + case SND_SOC_DAIFMT_BP_FP: 233 233 break; 234 234 default: 235 235 return -EINVAL; ··· 245 245 } 246 246 247 247 i2s->format = fmt; 248 - i2s->master = (i2s->format & SND_SOC_DAIFMT_MASTER_MASK) == 249 - SND_SOC_DAIFMT_CBS_CFS; 248 + i2s->master = (i2s->format & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) == 249 + SND_SOC_DAIFMT_BP_FP; 250 250 251 251 return 0; 252 252 } ··· 375 375 hi6210_write_reg(i2s, HII2S_MUX_TOP_MODULE_CFG, val); 376 376 377 377 378 - switch (i2s->format & SND_SOC_DAIFMT_MASTER_MASK) { 379 - case SND_SOC_DAIFMT_CBM_CFM: 378 + switch (i2s->format & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 379 + case SND_SOC_DAIFMT_BC_FC: 380 380 i2s->master = false; 381 381 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); 382 382 val |= HII2S_I2S_CFG__S2_MST_SLV; 383 383 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); 384 384 break; 385 - case SND_SOC_DAIFMT_CBS_CFS: 385 + case SND_SOC_DAIFMT_BP_FP: 386 386 i2s->master = true; 387 387 val = hi6210_read_reg(i2s, HII2S_I2S_CFG); 388 388 val &= ~HII2S_I2S_CFG__S2_MST_SLV; 389 389 hi6210_write_reg(i2s, HII2S_I2S_CFG, val); 390 390 break; 391 391 default: 392 - WARN_ONCE(1, "Invalid i2s->fmt MASTER_MASK. This shouldn't happen\n"); 392 + WARN_ONCE(1, "Invalid i2s->fmt CLOCK_PROVIDER_MASK. This shouldn't happen\n"); 393 393 return -EINVAL; 394 394 } 395 395
+2 -2
sound/soc/img/img-i2s-in.c
··· 333 333 return -EINVAL; 334 334 } 335 335 336 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 337 - case SND_SOC_DAIFMT_CBM_CFM: 336 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 337 + case SND_SOC_DAIFMT_BC_FC: 338 338 break; 339 339 default: 340 340 return -EINVAL;
+3 -3
sound/soc/img/img-i2s-out.c
··· 302 302 if (force_clk_active) 303 303 control_set |= IMG_I2S_OUT_CTL_CLK_EN_MASK; 304 304 305 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 306 - case SND_SOC_DAIFMT_CBM_CFM: 305 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 306 + case SND_SOC_DAIFMT_BC_FC: 307 307 break; 308 - case SND_SOC_DAIFMT_CBS_CFS: 308 + case SND_SOC_DAIFMT_BP_FP: 309 309 control_set |= IMG_I2S_OUT_CTL_MASTER_MASK; 310 310 break; 311 311 default:
+2 -2
sound/soc/intel/atom/sst-atom-controls.c
··· 831 831 dev_dbg(dai->dev, "Enter:%s, format=%x\n", __func__, format); 832 832 833 833 switch (format) { 834 - case SND_SOC_DAIFMT_CBC_CFC: 834 + case SND_SOC_DAIFMT_BP_FP: 835 835 return SSP_MODE_PROVIDER; 836 - case SND_SOC_DAIFMT_CBP_CFP: 836 + case SND_SOC_DAIFMT_BC_FC: 837 837 return SSP_MODE_CONSUMER; 838 838 default: 839 839 dev_err(dai->dev, "Invalid ssp protocol: %d\n", format);
+1 -1
sound/soc/intel/boards/bytcht_cx2072x.c
··· 126 126 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 127 127 SND_SOC_DAIFMT_I2S | 128 128 SND_SOC_DAIFMT_NB_NF | 129 - SND_SOC_DAIFMT_CBC_CFC); 129 + SND_SOC_DAIFMT_BP_FP); 130 130 if (ret < 0) { 131 131 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); 132 132 return ret;
+1 -1
sound/soc/intel/boards/bytcht_da7213.c
··· 81 81 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 82 82 SND_SOC_DAIFMT_I2S | 83 83 SND_SOC_DAIFMT_NB_NF | 84 - SND_SOC_DAIFMT_CBC_CFC); 84 + SND_SOC_DAIFMT_BP_FP); 85 85 if (ret < 0) { 86 86 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); 87 87 return ret;
+1 -1
sound/soc/intel/boards/bytcht_es8316.c
··· 265 265 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 266 266 SND_SOC_DAIFMT_I2S | 267 267 SND_SOC_DAIFMT_NB_NF | 268 - SND_SOC_DAIFMT_CBC_CFC 268 + SND_SOC_DAIFMT_BP_FP 269 269 ); 270 270 if (ret < 0) { 271 271 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
+1 -1
sound/soc/intel/boards/bytcht_nocodec.c
··· 61 61 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 62 62 SND_SOC_DAIFMT_I2S | 63 63 SND_SOC_DAIFMT_NB_NF | 64 - SND_SOC_DAIFMT_CBC_CFC); 64 + SND_SOC_DAIFMT_BP_FP); 65 65 66 66 if (ret < 0) { 67 67 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
+1 -1
sound/soc/intel/boards/bytcr_rt5640.c
··· 1413 1413 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 1414 1414 SND_SOC_DAIFMT_I2S | 1415 1415 SND_SOC_DAIFMT_NB_NF | 1416 - SND_SOC_DAIFMT_CBC_CFC); 1416 + SND_SOC_DAIFMT_BP_FP); 1417 1417 if (ret < 0) { 1418 1418 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); 1419 1419 return ret;
+1 -1
sound/soc/intel/boards/bytcr_rt5651.c
··· 706 706 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 707 707 SND_SOC_DAIFMT_I2S | 708 708 SND_SOC_DAIFMT_NB_NF | 709 - SND_SOC_DAIFMT_CBC_CFC 709 + SND_SOC_DAIFMT_BP_FP 710 710 ); 711 711 712 712 if (ret < 0) {
+1 -1
sound/soc/intel/boards/bytcr_wm5102.c
··· 265 265 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 266 266 SND_SOC_DAIFMT_I2S | 267 267 SND_SOC_DAIFMT_NB_NF | 268 - SND_SOC_DAIFMT_CBC_CFC); 268 + SND_SOC_DAIFMT_BP_FP); 269 269 if (ret) { 270 270 dev_err(rtd->dev, "Error setting format to I2S: %d\n", ret); 271 271 return ret;
+1 -2
sound/soc/intel/boards/cht_bsw_max98090_ti.c
··· 264 264 return ret; 265 265 } 266 266 267 - fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 268 - | SND_SOC_DAIFMT_CBC_CFC; 267 + fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_BP_FP; 269 268 270 269 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), fmt); 271 270 if (ret < 0) {
+3 -3
sound/soc/intel/boards/cht_bsw_rt5645.c
··· 362 362 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 363 363 SND_SOC_DAIFMT_I2S | 364 364 SND_SOC_DAIFMT_NB_NF | 365 - SND_SOC_DAIFMT_CBC_CFC 365 + SND_SOC_DAIFMT_BP_FP 366 366 ); 367 367 if (ret < 0) { 368 368 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); ··· 372 372 ret = snd_soc_dai_set_fmt(asoc_rtd_to_codec(rtd, 0), 373 373 SND_SOC_DAIFMT_I2S | 374 374 SND_SOC_DAIFMT_NB_NF | 375 - SND_SOC_DAIFMT_CBC_CFC 375 + SND_SOC_DAIFMT_BC_FC 376 376 ); 377 377 if (ret < 0) { 378 378 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); ··· 396 396 ret = snd_soc_dai_set_fmt(asoc_rtd_to_codec(rtd, 0), 397 397 SND_SOC_DAIFMT_DSP_B | 398 398 SND_SOC_DAIFMT_IB_NF | 399 - SND_SOC_DAIFMT_CBC_CFC); 399 + SND_SOC_DAIFMT_BC_FC); 400 400 if (ret < 0) { 401 401 dev_err(rtd->dev, "can't set format to TDM %d\n", ret); 402 402 return ret;
+1 -1
sound/soc/intel/boards/cht_bsw_rt5672.c
··· 300 300 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), 301 301 SND_SOC_DAIFMT_I2S | 302 302 SND_SOC_DAIFMT_NB_NF | 303 - SND_SOC_DAIFMT_CBC_CFC); 303 + SND_SOC_DAIFMT_BP_FP); 304 304 if (ret < 0) { 305 305 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); 306 306 return ret;
+2 -2
sound/soc/intel/keembay/kmb_platform.c
··· 497 497 int ret; 498 498 499 499 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 500 - case SND_SOC_DAIFMT_CBP_CFP: 500 + case SND_SOC_DAIFMT_BC_FC: 501 501 kmb_i2s->clock_provider = false; 502 502 ret = 0; 503 503 break; 504 - case SND_SOC_DAIFMT_CBC_CFC: 504 + case SND_SOC_DAIFMT_BP_FP: 505 505 writel(CLOCK_PROVIDER_MODE, kmb_i2s->pss_base + I2S_GEN_CFG_0); 506 506 507 507 ret = clk_prepare_enable(kmb_i2s->clk_i2s);
+5 -5
sound/soc/jz4740/jz4740-i2s.c
··· 206 206 207 207 conf &= ~(JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER); 208 208 209 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 210 - case SND_SOC_DAIFMT_CBS_CFS: 209 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 210 + case SND_SOC_DAIFMT_BP_FP: 211 211 conf |= JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER; 212 212 format |= JZ_AIC_I2S_FMT_ENABLE_SYS_CLK; 213 213 break; 214 - case SND_SOC_DAIFMT_CBM_CFS: 214 + case SND_SOC_DAIFMT_BC_FP: 215 215 conf |= JZ_AIC_CONF_SYNC_CLK_MASTER; 216 216 break; 217 - case SND_SOC_DAIFMT_CBS_CFM: 217 + case SND_SOC_DAIFMT_BP_FC: 218 218 conf |= JZ_AIC_CONF_BIT_CLK_MASTER; 219 219 break; 220 - case SND_SOC_DAIFMT_CBM_CFM: 220 + case SND_SOC_DAIFMT_BC_FC: 221 221 break; 222 222 default: 223 223 return -EINVAL;
+3 -3
sound/soc/mediatek/mt8195/mt8195-dai-etdm.c
··· 2172 2172 return -EINVAL; 2173 2173 } 2174 2174 2175 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2176 - case SND_SOC_DAIFMT_CBM_CFM: 2175 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 2176 + case SND_SOC_DAIFMT_BC_FC: 2177 2177 etdm_data->slave_mode = true; 2178 2178 break; 2179 - case SND_SOC_DAIFMT_CBS_CFS: 2179 + case SND_SOC_DAIFMT_BP_FP: 2180 2180 etdm_data->slave_mode = false; 2181 2181 break; 2182 2182 default:
+3 -3
sound/soc/mediatek/mt8195/mt8195-dai-pcm.c
··· 266 266 return -EINVAL; 267 267 } 268 268 269 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 270 - case SND_SOC_DAIFMT_CBM_CFM: 269 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 270 + case SND_SOC_DAIFMT_BC_FC: 271 271 pcmif_priv->slave_mode = 1; 272 272 break; 273 - case SND_SOC_DAIFMT_CBS_CFS: 273 + case SND_SOC_DAIFMT_BP_FP: 274 274 pcmif_priv->slave_mode = 0; 275 275 break; 276 276 default:
+1 -1
sound/soc/meson/aiu-encoder-i2s.c
··· 229 229 unsigned int skew; 230 230 231 231 /* Only CPU Master / Codec Slave supported ATM */ 232 - if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) 232 + if ((fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) != SND_SOC_DAIFMT_BP_FP) 233 233 return -EINVAL; 234 234 235 235 if (inv == SND_SOC_DAIFMT_NB_IF ||
+7 -7
sound/soc/meson/axg-tdm-interface.c
··· 119 119 { 120 120 struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai); 121 121 122 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 123 - case SND_SOC_DAIFMT_CBS_CFS: 122 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 123 + case SND_SOC_DAIFMT_BP_FP: 124 124 if (!iface->mclk) { 125 125 dev_err(dai->dev, "cpu clock master: mclk missing\n"); 126 126 return -ENODEV; 127 127 } 128 128 break; 129 129 130 - case SND_SOC_DAIFMT_CBM_CFM: 130 + case SND_SOC_DAIFMT_BC_FC: 131 131 break; 132 132 133 - case SND_SOC_DAIFMT_CBS_CFM: 134 - case SND_SOC_DAIFMT_CBM_CFS: 133 + case SND_SOC_DAIFMT_BP_FC: 134 + case SND_SOC_DAIFMT_BC_FP: 135 135 dev_err(dai->dev, "only CBS_CFS and CBM_CFM are supported\n"); 136 136 fallthrough; 137 137 default: ··· 326 326 if (ret) 327 327 return ret; 328 328 329 - if ((iface->fmt & SND_SOC_DAIFMT_MASTER_MASK) == 330 - SND_SOC_DAIFMT_CBS_CFS) { 329 + if ((iface->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) == 330 + SND_SOC_DAIFMT_BP_FP) { 331 331 ret = axg_tdm_iface_set_sclk(dai, params); 332 332 if (ret) 333 333 return ret;
+2 -2
sound/soc/mxs/mxs-saif.c
··· 358 358 * Saif internally could be slave when working on EXTMASTER mode. 359 359 * We just hide this to machine driver. 360 360 */ 361 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 362 - case SND_SOC_DAIFMT_CBS_CFS: 361 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 362 + case SND_SOC_DAIFMT_BP_FP: 363 363 if (saif->id == saif->master_id) 364 364 scr &= ~BM_SAIF_CTRL_SLAVE_MODE; 365 365 else
+4 -4
sound/soc/pxa/magician.c
··· 91 91 92 92 /* set codec DAI configuration */ 93 93 ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_MSB | 94 - SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS); 94 + SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_BC_FC); 95 95 if (ret < 0) 96 96 return ret; 97 97 98 98 /* set cpu DAI configuration */ 99 99 ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_A | 100 - SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_CBS_CFS); 100 + SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_BP_FP); 101 101 if (ret < 0) 102 102 return ret; 103 103 ··· 129 129 /* set codec DAI configuration */ 130 130 ret = snd_soc_dai_set_fmt(codec_dai, 131 131 SND_SOC_DAIFMT_MSB | SND_SOC_DAIFMT_NB_NF | 132 - SND_SOC_DAIFMT_CBS_CFS); 132 + SND_SOC_DAIFMT_BC_FC); 133 133 if (ret < 0) 134 134 return ret; 135 135 136 136 /* set cpu DAI configuration */ 137 137 ret = snd_soc_dai_set_fmt(cpu_dai, 138 138 SND_SOC_DAIFMT_MSB | SND_SOC_DAIFMT_NB_NF | 139 - SND_SOC_DAIFMT_CBS_CFS); 139 + SND_SOC_DAIFMT_BP_FP); 140 140 if (ret < 0) 141 141 return ret; 142 142
+3 -3
sound/soc/pxa/mmp-sspa.c
··· 171 171 sspa->sp = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH; 172 172 sspa->ctrl = 0; 173 173 174 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 175 - case SND_SOC_DAIFMT_CBS_CFS: 174 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 175 + case SND_SOC_DAIFMT_BP_FP: 176 176 sspa->sp |= SSPA_SP_MSL; 177 177 break; 178 - case SND_SOC_DAIFMT_CBM_CFM: 178 + case SND_SOC_DAIFMT_BC_FC: 179 179 break; 180 180 default: 181 181 return -EINVAL;
+11 -11
sound/soc/pxa/pxa-ssp.c
··· 372 372 { 373 373 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai); 374 374 375 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 376 - case SND_SOC_DAIFMT_CBM_CFM: 377 - case SND_SOC_DAIFMT_CBM_CFS: 378 - case SND_SOC_DAIFMT_CBS_CFS: 375 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 376 + case SND_SOC_DAIFMT_BC_FC: 377 + case SND_SOC_DAIFMT_BC_FP: 378 + case SND_SOC_DAIFMT_BP_FP: 379 379 break; 380 380 default: 381 381 return -EINVAL; ··· 432 432 433 433 sscr1 |= SSCR1_RxTresh(8) | SSCR1_TxTresh(7); 434 434 435 - switch (priv->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) { 436 - case SND_SOC_DAIFMT_CBM_CFM: 435 + switch (priv->dai_fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 436 + case SND_SOC_DAIFMT_BC_FC: 437 437 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR | SSCR1_SCFR; 438 438 break; 439 - case SND_SOC_DAIFMT_CBM_CFS: 439 + case SND_SOC_DAIFMT_BC_FP: 440 440 sscr1 |= SSCR1_SCLKDIR | SSCR1_SCFR; 441 441 break; 442 - case SND_SOC_DAIFMT_CBS_CFS: 442 + case SND_SOC_DAIFMT_BP_FP: 443 443 break; 444 444 default: 445 445 return -EINVAL; ··· 484 484 pxa_ssp_write_reg(ssp, SSCR1, sscr1); 485 485 pxa_ssp_write_reg(ssp, SSPSP, sspsp); 486 486 487 - switch (priv->dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) { 488 - case SND_SOC_DAIFMT_CBM_CFM: 489 - case SND_SOC_DAIFMT_CBM_CFS: 487 + switch (priv->dai_fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 488 + case SND_SOC_DAIFMT_BC_FC: 489 + case SND_SOC_DAIFMT_BC_FP: 490 490 scfr = pxa_ssp_read_reg(ssp, SSCR1) | SSCR1_SCFR; 491 491 pxa_ssp_write_reg(ssp, SSCR1, scfr); 492 492
+3 -3
sound/soc/pxa/pxa2xx-i2s.c
··· 129 129 break; 130 130 } 131 131 132 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 133 - case SND_SOC_DAIFMT_CBS_CFS: 132 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 133 + case SND_SOC_DAIFMT_BP_FP: 134 134 pxa_i2s.master = 1; 135 135 break; 136 - case SND_SOC_DAIFMT_CBM_CFS: 136 + case SND_SOC_DAIFMT_BC_FP: 137 137 pxa_i2s.master = 0; 138 138 break; 139 139 default:
+1 -1
sound/soc/qcom/apq8016_sbc.c
··· 172 172 { 173 173 struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); 174 174 175 - snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS); 175 + snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_BP_FP); 176 176 return apq8016_dai_init(rtd, qdsp6_dai_get_lpass_id(cpu_dai)); 177 177 } 178 178
+2 -2
sound/soc/qcom/qdsp6/audioreach.c
··· 732 732 intf_cfg->cfg.sd_line_idx = module->sd_line_idx; 733 733 734 734 switch (cfg->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 735 - case SND_SOC_DAIFMT_CBC_CFC: 735 + case SND_SOC_DAIFMT_BP_FP: 736 736 intf_cfg->cfg.ws_src = CONFIG_I2S_WS_SRC_INTERNAL; 737 737 break; 738 - case SND_SOC_DAIFMT_CBP_CFP: 738 + case SND_SOC_DAIFMT_BC_FC: 739 739 /* CPU is slave */ 740 740 intf_cfg->cfg.ws_src = CONFIG_I2S_WS_SRC_EXTERNAL; 741 741 break;
+3 -3
sound/soc/qcom/qdsp6/q6afe.c
··· 1328 1328 pcfg->i2s_cfg.bit_width = cfg->bit_width; 1329 1329 pcfg->i2s_cfg.data_format = AFE_LINEAR_PCM_DATA; 1330 1330 1331 - switch (cfg->fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1332 - case SND_SOC_DAIFMT_CBS_CFS: 1331 + switch (cfg->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 1332 + case SND_SOC_DAIFMT_BP_FP: 1333 1333 pcfg->i2s_cfg.ws_src = AFE_PORT_CONFIG_I2S_WS_SRC_INTERNAL; 1334 1334 break; 1335 - case SND_SOC_DAIFMT_CBM_CFM: 1335 + case SND_SOC_DAIFMT_BC_FC: 1336 1336 /* CPU is slave */ 1337 1337 pcfg->i2s_cfg.ws_src = AFE_PORT_CONFIG_I2S_WS_SRC_EXTERNAL; 1338 1338 break;
+1 -1
sound/soc/qcom/sc7180.c
··· 155 155 } 156 156 157 157 snd_soc_dai_set_fmt(codec_dai, 158 - SND_SOC_DAIFMT_CBS_CFS | 158 + SND_SOC_DAIFMT_BC_FC | 159 159 SND_SOC_DAIFMT_NB_NF | 160 160 SND_SOC_DAIFMT_I2S); 161 161
+3 -3
sound/soc/qcom/sdm845.c
··· 316 316 317 317 static int sdm845_snd_startup(struct snd_pcm_substream *substream) 318 318 { 319 - unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS; 320 - unsigned int codec_dai_fmt = SND_SOC_DAIFMT_CBS_CFS; 319 + unsigned int fmt = SND_SOC_DAIFMT_BP_FP; 320 + unsigned int codec_dai_fmt = SND_SOC_DAIFMT_BC_FC; 321 321 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 322 322 struct snd_soc_card *card = rtd->card; 323 323 struct sdm845_snd_data *data = snd_soc_card_get_drvdata(card); ··· 356 356 snd_soc_dai_set_sysclk(cpu_dai, 357 357 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT, 358 358 MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK); 359 - snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS); 359 + snd_soc_dai_set_fmt(cpu_dai, fmt); 360 360 361 361 362 362 break;
+2 -2
sound/soc/qcom/sm8250.c
··· 96 96 97 97 static int sm8250_snd_startup(struct snd_pcm_substream *substream) 98 98 { 99 - unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS; 100 - unsigned int codec_dai_fmt = SND_SOC_DAIFMT_CBS_CFS; 99 + unsigned int fmt = SND_SOC_DAIFMT_BP_FP; 100 + unsigned int codec_dai_fmt = SND_SOC_DAIFMT_BC_FC; 101 101 struct snd_soc_pcm_runtime *rtd = substream->private_data; 102 102 struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); 103 103 struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
+3 -3
sound/soc/rockchip/rockchip_i2s.c
··· 199 199 200 200 pm_runtime_get_sync(cpu_dai->dev); 201 201 mask = I2S_CKR_MSS_MASK; 202 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 203 - case SND_SOC_DAIFMT_CBS_CFS: 202 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 203 + case SND_SOC_DAIFMT_BP_FP: 204 204 /* Set source clock in Master mode */ 205 205 val = I2S_CKR_MSS_MASTER; 206 206 i2s->is_master_mode = true; 207 207 break; 208 - case SND_SOC_DAIFMT_CBM_CFM: 208 + case SND_SOC_DAIFMT_BC_FC: 209 209 val = I2S_CKR_MSS_SLAVE; 210 210 i2s->is_master_mode = false; 211 211 break;
+3 -3
sound/soc/rockchip/rockchip_i2s_tdm.c
··· 411 411 } 412 412 413 413 mask = I2S_CKR_MSS_MASK; 414 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 415 - case SND_SOC_DAIFMT_CBC_CFC: 414 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 415 + case SND_SOC_DAIFMT_BP_FP: 416 416 val = I2S_CKR_MSS_MASTER; 417 417 i2s_tdm->is_master_mode = true; 418 418 break; 419 - case SND_SOC_DAIFMT_CBP_CFP: 419 + case SND_SOC_DAIFMT_BC_FC: 420 420 val = I2S_CKR_MSS_SLAVE; 421 421 i2s_tdm->is_master_mode = false; 422 422 break;
+3 -3
sound/soc/samsung/i2s.c
··· 671 671 return -EINVAL; 672 672 } 673 673 674 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 675 - case SND_SOC_DAIFMT_CBM_CFM: 674 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 675 + case SND_SOC_DAIFMT_BC_FC: 676 676 tmp |= mod_slave; 677 677 break; 678 - case SND_SOC_DAIFMT_CBS_CFS: 678 + case SND_SOC_DAIFMT_BP_FP: 679 679 /* 680 680 * Set default source clock in Master mode, only when the 681 681 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
+2 -2
sound/soc/samsung/pcm.c
··· 340 340 goto exit; 341 341 } 342 342 343 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 344 - case SND_SOC_DAIFMT_CBS_CFS: 343 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 344 + case SND_SOC_DAIFMT_BP_FP: 345 345 /* Nothing to do, Master by default */ 346 346 break; 347 347 default:
+3 -3
sound/soc/samsung/s3c-i2s-v2.c
··· 252 252 iismod = readl(i2s->regs + S3C2412_IISMOD); 253 253 pr_debug("hw_params r: IISMOD: %x \n", iismod); 254 254 255 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 256 - case SND_SOC_DAIFMT_CBM_CFM: 255 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 256 + case SND_SOC_DAIFMT_BC_FC: 257 257 i2s->master = 0; 258 258 iismod |= S3C2412_IISMOD_SLAVE; 259 259 break; 260 - case SND_SOC_DAIFMT_CBS_CFS: 260 + case SND_SOC_DAIFMT_BP_FP: 261 261 i2s->master = 1; 262 262 iismod &= ~S3C2412_IISMOD_SLAVE; 263 263 break;
+3 -3
sound/soc/samsung/s3c24xx-i2s.c
··· 169 169 iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD); 170 170 pr_debug("hw_params r: IISMOD: %x \n", iismod); 171 171 172 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 173 - case SND_SOC_DAIFMT_CBM_CFM: 172 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 173 + case SND_SOC_DAIFMT_BC_CFC: 174 174 iismod |= S3C2410_IISMOD_SLAVE; 175 175 break; 176 - case SND_SOC_DAIFMT_CBS_CFS: 176 + case SND_SOC_DAIFMT_BP_FP: 177 177 iismod &= ~S3C2410_IISMOD_SLAVE; 178 178 break; 179 179 default:
+3 -3
sound/soc/sh/fsi.c
··· 1646 1646 int ret; 1647 1647 1648 1648 /* set clock master audio interface */ 1649 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1650 - case SND_SOC_DAIFMT_CBM_CFM: 1649 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 1650 + case SND_SOC_DAIFMT_BC_FC: 1651 1651 break; 1652 - case SND_SOC_DAIFMT_CBS_CFS: 1652 + case SND_SOC_DAIFMT_BP_FP: 1653 1653 fsi->clk_master = 1; /* cpu is master */ 1654 1654 break; 1655 1655 default:
+2 -2
sound/soc/sh/rcar/core.c
··· 756 756 757 757 /* set clock master for audio interface */ 758 758 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 759 - case SND_SOC_DAIFMT_CBP_CFP: 759 + case SND_SOC_DAIFMT_BC_FC: 760 760 rdai->clk_master = 0; 761 761 break; 762 - case SND_SOC_DAIFMT_CBC_CFC: 762 + case SND_SOC_DAIFMT_BP_FP: 763 763 rdai->clk_master = 1; /* cpu is master */ 764 764 break; 765 765 default:
+1 -1
sound/soc/sh/rz-ssi.c
··· 767 767 struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai); 768 768 769 769 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 770 - case SND_SOC_DAIFMT_CBC_CFC: 770 + case SND_SOC_DAIFMT_BP_FP: 771 771 break; 772 772 default: 773 773 dev_err(ssi->dev, "Codec should be clk and frame consumer\n");
+5 -5
sound/soc/sh/ssi.c
··· 291 291 return -EINVAL; 292 292 } 293 293 294 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 295 - case SND_SOC_DAIFMT_CBM_CFM: 294 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 295 + case SND_SOC_DAIFMT_BC_FC: 296 296 break; 297 - case SND_SOC_DAIFMT_CBS_CFM: 297 + case SND_SOC_DAIFMT_BP_FC: 298 298 ssicr |= CR_SCK_MASTER; 299 299 break; 300 - case SND_SOC_DAIFMT_CBM_CFS: 300 + case SND_SOC_DAIFMT_BC_FP: 301 301 ssicr |= CR_SWS_MASTER; 302 302 break; 303 - case SND_SOC_DAIFMT_CBS_CFS: 303 + case SND_SOC_DAIFMT_BP_FP: 304 304 ssicr |= CR_SWS_MASTER | CR_SCK_MASTER; 305 305 break; 306 306 default:
+3 -11
sound/soc/soc-core.c
··· 1214 1214 { 1215 1215 struct snd_soc_dai *cpu_dai; 1216 1216 struct snd_soc_dai *codec_dai; 1217 - unsigned int inv_dai_fmt; 1218 1217 unsigned int i; 1219 1218 int ret; 1220 1219 ··· 1226 1227 return ret; 1227 1228 } 1228 1229 1229 - /* 1230 - * Flip the polarity for the "CPU" end of a CODEC<->CODEC link 1231 - */ 1232 - inv_dai_fmt = snd_soc_daifmt_clock_provider_flipped(dai_fmt); 1230 + /* Flip the polarity for the "CPU" end of link */ 1231 + dai_fmt = snd_soc_daifmt_clock_provider_flipped(dai_fmt); 1233 1232 1234 1233 for_each_rtd_cpu_dais(rtd, i, cpu_dai) { 1235 - unsigned int fmt = dai_fmt; 1236 - 1237 - if (snd_soc_component_is_codec(cpu_dai->component)) 1238 - fmt = inv_dai_fmt; 1239 - 1240 - ret = snd_soc_dai_set_fmt(cpu_dai, fmt); 1234 + ret = snd_soc_dai_set_fmt(cpu_dai, dai_fmt); 1241 1235 if (ret != 0 && ret != -ENOTSUPP) 1242 1236 return ret; 1243 1237 }
+1 -2
sound/soc/soc-dai.c
··· 208 208 { 209 209 int ret = -ENOTSUPP; 210 210 211 - if (dai->driver->ops && 212 - dai->driver->ops->set_fmt) 211 + if (dai->driver->ops && dai->driver->ops->set_fmt) 213 212 ret = dai->driver->ops->set_fmt(dai, fmt); 214 213 215 214 return soc_dai_ret(dai, ret);
+4 -4
sound/soc/stm/stm32_i2s.c
··· 593 593 } 594 594 595 595 /* DAI clock master masks */ 596 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 597 - case SND_SOC_DAIFMT_CBM_CFM: 596 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 597 + case SND_SOC_DAIFMT_BC_FC: 598 598 i2s->ms_flg = I2S_MS_SLAVE; 599 599 break; 600 - case SND_SOC_DAIFMT_CBS_CFS: 600 + case SND_SOC_DAIFMT_BP_FP: 601 601 i2s->ms_flg = I2S_MS_MASTER; 602 602 break; 603 603 default: 604 604 dev_err(cpu_dai->dev, "Unsupported mode %#x\n", 605 - fmt & SND_SOC_DAIFMT_MASTER_MASK); 605 + fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK); 606 606 return -EINVAL; 607 607 } 608 608
+4 -4
sound/soc/stm/stm32_sai_sub.c
··· 717 717 stm32_sai_sub_reg_up(sai, STM_SAI_FRCR_REGX, frcr_mask, frcr); 718 718 719 719 /* DAI clock master masks */ 720 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 721 - case SND_SOC_DAIFMT_CBM_CFM: 720 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 721 + case SND_SOC_DAIFMT_BC_FC: 722 722 /* codec is master */ 723 723 cr1 |= SAI_XCR1_SLAVE; 724 724 sai->master = false; 725 725 break; 726 - case SND_SOC_DAIFMT_CBS_CFS: 726 + case SND_SOC_DAIFMT_BP_FP: 727 727 sai->master = true; 728 728 break; 729 729 default: 730 730 dev_err(cpu_dai->dev, "Unsupported mode %#x\n", 731 - fmt & SND_SOC_DAIFMT_MASTER_MASK); 731 + fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK); 732 732 return -EINVAL; 733 733 } 734 734
+9 -9
sound/soc/sunxi/sun4i-i2s.c
··· 702 702 SUN4I_I2S_FMT0_FMT_MASK, val); 703 703 704 704 /* DAI clock master masks */ 705 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 706 - case SND_SOC_DAIFMT_CBS_CFS: 705 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 706 + case SND_SOC_DAIFMT_BP_FP: 707 707 /* BCLK and LRCLK master */ 708 708 val = SUN4I_I2S_CTRL_MODE_MASTER; 709 709 break; 710 710 711 - case SND_SOC_DAIFMT_CBM_CFM: 711 + case SND_SOC_DAIFMT_BC_FC: 712 712 /* BCLK and LRCLK slave */ 713 713 val = SUN4I_I2S_CTRL_MODE_SLAVE; 714 714 break; ··· 802 802 SUN8I_I2S_TX_CHAN_OFFSET(offset)); 803 803 804 804 /* DAI clock master masks */ 805 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 806 - case SND_SOC_DAIFMT_CBS_CFS: 805 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 806 + case SND_SOC_DAIFMT_BP_FP: 807 807 /* BCLK and LRCLK master */ 808 808 val = SUN8I_I2S_CTRL_BCLK_OUT | SUN8I_I2S_CTRL_LRCK_OUT; 809 809 break; 810 810 811 - case SND_SOC_DAIFMT_CBM_CFM: 811 + case SND_SOC_DAIFMT_BC_FC: 812 812 /* BCLK and LRCLK slave */ 813 813 val = 0; 814 814 break; ··· 909 909 SUN50I_H6_I2S_TX_CHAN_SEL_OFFSET(offset)); 910 910 911 911 /* DAI clock master masks */ 912 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 913 - case SND_SOC_DAIFMT_CBS_CFS: 912 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 913 + case SND_SOC_DAIFMT_BP_FP: 914 914 /* BCLK and LRCLK master */ 915 915 val = SUN8I_I2S_CTRL_BCLK_OUT | SUN8I_I2S_CTRL_LRCK_OUT; 916 916 break; 917 917 918 - case SND_SOC_DAIFMT_CBM_CFM: 918 + case SND_SOC_DAIFMT_BC_FC: 919 919 /* BCLK and LRCLK slave */ 920 920 val = 0; 921 921 break;
+3 -3
sound/soc/sunxi/sun8i-codec.c
··· 286 286 u32 dsp_format, format, invert, value; 287 287 288 288 /* clock masters */ 289 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 290 - case SND_SOC_DAIFMT_CBS_CFS: /* Codec slave, DAI master */ 289 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 290 + case SND_SOC_DAIFMT_BP_FP: /* Codec slave, DAI master */ 291 291 value = 0x1; 292 292 break; 293 - case SND_SOC_DAIFMT_CBM_CFM: /* Codec Master, DAI slave */ 293 + case SND_SOC_DAIFMT_BC_FC: /* Codec Master, DAI slave */ 294 294 value = 0x0; 295 295 break; 296 296 default:
+3 -3
sound/soc/tegra/tegra20_i2s.c
··· 95 95 } 96 96 97 97 mask |= TEGRA20_I2S_CTRL_MASTER_ENABLE; 98 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 99 - case SND_SOC_DAIFMT_CBS_CFS: 98 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 99 + case SND_SOC_DAIFMT_BP_FP: 100 100 val |= TEGRA20_I2S_CTRL_MASTER_ENABLE; 101 101 break; 102 - case SND_SOC_DAIFMT_CBM_CFM: 102 + case SND_SOC_DAIFMT_BC_FC: 103 103 break; 104 104 default: 105 105 return -EINVAL;
+3 -3
sound/soc/tegra/tegra210_i2s.c
··· 214 214 unsigned int mask, val; 215 215 216 216 mask = I2S_CTRL_MASTER_EN_MASK; 217 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 218 - case SND_SOC_DAIFMT_CBS_CFS: 217 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 218 + case SND_SOC_DAIFMT_BP_FP: 219 219 val = 0; 220 220 break; 221 - case SND_SOC_DAIFMT_CBM_CFM: 221 + case SND_SOC_DAIFMT_BC_FC: 222 222 val = I2S_CTRL_MASTER_EN; 223 223 break; 224 224 default:
+3 -3
sound/soc/tegra/tegra30_i2s.c
··· 87 87 } 88 88 89 89 mask |= TEGRA30_I2S_CTRL_MASTER_ENABLE; 90 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 91 - case SND_SOC_DAIFMT_CBS_CFS: 90 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 91 + case SND_SOC_DAIFMT_BP_FP: 92 92 val |= TEGRA30_I2S_CTRL_MASTER_ENABLE; 93 93 break; 94 - case SND_SOC_DAIFMT_CBM_CFM: 94 + case SND_SOC_DAIFMT_BC_FC: 95 95 break; 96 96 default: 97 97 return -EINVAL;
+16 -16
sound/soc/ti/davinci-i2s.c
··· 230 230 231 231 dev->fmt = fmt; 232 232 /* set master/slave audio interface */ 233 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 234 - case SND_SOC_DAIFMT_CBS_CFS: 233 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 234 + case SND_SOC_DAIFMT_BP_FP: 235 235 /* cpu is master */ 236 236 pcr = DAVINCI_MCBSP_PCR_FSXM | 237 237 DAVINCI_MCBSP_PCR_FSRM | 238 238 DAVINCI_MCBSP_PCR_CLKXM | 239 239 DAVINCI_MCBSP_PCR_CLKRM; 240 240 break; 241 - case SND_SOC_DAIFMT_CBM_CFS: 241 + case SND_SOC_DAIFMT_BC_FP: 242 242 pcr = DAVINCI_MCBSP_PCR_FSRM | DAVINCI_MCBSP_PCR_FSXM; 243 243 /* 244 244 * Selection of the clock input pin that is the ··· 260 260 } 261 261 262 262 break; 263 - case SND_SOC_DAIFMT_CBM_CFM: 263 + case SND_SOC_DAIFMT_BC_FC: 264 264 /* codec is master */ 265 265 pcr = 0; 266 266 break; ··· 395 395 davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr); 396 396 } 397 397 398 - master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; 398 + master = dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK; 399 399 fmt = params_format(params); 400 400 mcbsp_word_length = asp_word_length[fmt]; 401 401 402 402 switch (master) { 403 - case SND_SOC_DAIFMT_CBS_CFS: 403 + case SND_SOC_DAIFMT_BP_FP: 404 404 freq = clk_get_rate(dev->clk); 405 405 srgr = DAVINCI_MCBSP_SRGR_FSGM | 406 406 DAVINCI_MCBSP_SRGR_CLKSM; ··· 426 426 clk_div &= 0xFF; 427 427 srgr |= clk_div; 428 428 break; 429 - case SND_SOC_DAIFMT_CBM_CFS: 429 + case SND_SOC_DAIFMT_BC_FP: 430 430 srgr = DAVINCI_MCBSP_SRGR_FSGM; 431 431 clk_div = dev->clk_div - 1; 432 432 srgr |= DAVINCI_MCBSP_SRGR_FWID(mcbsp_word_length * 8 - 1); ··· 434 434 clk_div &= 0xFF; 435 435 srgr |= clk_div; 436 436 break; 437 - case SND_SOC_DAIFMT_CBM_CFM: 437 + case SND_SOC_DAIFMT_BC_FC: 438 438 /* Clock and frame sync given from external sources */ 439 439 i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS); 440 440 srgr = DAVINCI_MCBSP_SRGR_FSGM; ··· 473 473 fmt = double_fmt[fmt]; 474 474 } 475 475 switch (master) { 476 - case SND_SOC_DAIFMT_CBS_CFS: 477 - case SND_SOC_DAIFMT_CBS_CFM: 476 + case SND_SOC_DAIFMT_BP_FP: 477 + case SND_SOC_DAIFMT_BP_FC: 478 478 rcr |= DAVINCI_MCBSP_RCR_RFRLEN2(0); 479 479 xcr |= DAVINCI_MCBSP_XCR_XFRLEN2(0); 480 480 rcr |= DAVINCI_MCBSP_RCR_RPHASE; 481 481 xcr |= DAVINCI_MCBSP_XCR_XPHASE; 482 482 break; 483 - case SND_SOC_DAIFMT_CBM_CFM: 484 - case SND_SOC_DAIFMT_CBM_CFS: 483 + case SND_SOC_DAIFMT_BC_FC: 484 + case SND_SOC_DAIFMT_BC_FP: 485 485 rcr |= DAVINCI_MCBSP_RCR_RFRLEN2(element_cnt - 1); 486 486 xcr |= DAVINCI_MCBSP_XCR_XFRLEN2(element_cnt - 1); 487 487 break; ··· 492 492 mcbsp_word_length = asp_word_length[fmt]; 493 493 494 494 switch (master) { 495 - case SND_SOC_DAIFMT_CBS_CFS: 496 - case SND_SOC_DAIFMT_CBS_CFM: 495 + case SND_SOC_DAIFMT_BP_FP: 496 + case SND_SOC_DAIFMT_BP_FC: 497 497 rcr |= DAVINCI_MCBSP_RCR_RFRLEN1(0); 498 498 xcr |= DAVINCI_MCBSP_XCR_XFRLEN1(0); 499 499 break; 500 - case SND_SOC_DAIFMT_CBM_CFM: 501 - case SND_SOC_DAIFMT_CBM_CFS: 500 + case SND_SOC_DAIFMT_BC_FC: 501 + case SND_SOC_DAIFMT_BC_FP: 502 502 rcr |= DAVINCI_MCBSP_RCR_RFRLEN1(element_cnt - 1); 503 503 xcr |= DAVINCI_MCBSP_XCR_XFRLEN1(element_cnt - 1); 504 504 break;
+5 -5
sound/soc/ti/davinci-mcasp.c
··· 492 492 mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, FSRDLY(data_delay), 493 493 FSRDLY(3)); 494 494 495 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 496 - case SND_SOC_DAIFMT_CBS_CFS: 495 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 496 + case SND_SOC_DAIFMT_BP_FP: 497 497 /* codec is clock and frame slave */ 498 498 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); 499 499 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); ··· 510 510 511 511 mcasp->bclk_master = 1; 512 512 break; 513 - case SND_SOC_DAIFMT_CBS_CFM: 513 + case SND_SOC_DAIFMT_BP_FC: 514 514 /* codec is clock slave and frame master */ 515 515 mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); 516 516 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); ··· 527 527 528 528 mcasp->bclk_master = 1; 529 529 break; 530 - case SND_SOC_DAIFMT_CBM_CFS: 530 + case SND_SOC_DAIFMT_BC_FP: 531 531 /* codec is clock master and frame slave */ 532 532 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); 533 533 mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE); ··· 544 544 545 545 mcasp->bclk_master = 0; 546 546 break; 547 - case SND_SOC_DAIFMT_CBM_CFM: 547 + case SND_SOC_DAIFMT_BC_FC: 548 548 /* codec is clock and frame master */ 549 549 mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); 550 550 mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);
+6 -6
sound/soc/ti/omap-mcbsp.c
··· 1036 1036 1037 1037 /* In McBSP master modes, FRAME (i.e. sample rate) is generated 1038 1038 * by _counting_ BCLKs. Calculate frame size in BCLKs */ 1039 - master = mcbsp->fmt & SND_SOC_DAIFMT_MASTER_MASK; 1040 - if (master == SND_SOC_DAIFMT_CBS_CFS) { 1039 + master = mcbsp->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK; 1040 + if (master == SND_SOC_DAIFMT_BP_FP) { 1041 1041 div = mcbsp->clk_div ? mcbsp->clk_div : 1; 1042 1042 framesize = (mcbsp->in_freq / div) / params_rate(params); 1043 1043 ··· 1136 1136 return -EINVAL; 1137 1137 } 1138 1138 1139 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1140 - case SND_SOC_DAIFMT_CBS_CFS: 1139 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 1140 + case SND_SOC_DAIFMT_BP_FP: 1141 1141 /* McBSP master. Set FS and bit clocks as outputs */ 1142 1142 regs->pcr0 |= FSXM | FSRM | 1143 1143 CLKXM | CLKRM; 1144 1144 /* Sample rate generator drives the FS */ 1145 1145 regs->srgr2 |= FSGM; 1146 1146 break; 1147 - case SND_SOC_DAIFMT_CBM_CFS: 1147 + case SND_SOC_DAIFMT_BC_FP: 1148 1148 /* McBSP slave. FS clock as output */ 1149 1149 regs->srgr2 |= FSGM; 1150 1150 regs->pcr0 |= FSXM | FSRM; 1151 1151 break; 1152 - case SND_SOC_DAIFMT_CBM_CFM: 1152 + case SND_SOC_DAIFMT_BC_FC: 1153 1153 /* McBSP slave */ 1154 1154 break; 1155 1155 default:
+18 -18
sound/soc/ux500/ux500_msp_dai.c
··· 189 189 return -EINVAL; 190 190 } 191 191 192 - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 193 - case SND_SOC_DAIFMT_CBM_CFM: 192 + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 193 + case SND_SOC_DAIFMT_BC_FC: 194 194 dev_dbg(dai->dev, "%s: Codec is master.\n", __func__); 195 195 196 196 msp_config->iodelay = 0x20; ··· 202 202 203 203 break; 204 204 205 - case SND_SOC_DAIFMT_CBS_CFS: 205 + case SND_SOC_DAIFMT_BP_FP: 206 206 dev_dbg(dai->dev, "%s: Codec is slave.\n", __func__); 207 207 208 208 msp_config->tx_clk_sel = TX_CLK_SEL_SRG; ··· 326 326 dev_dbg(dai->dev, "%s: rate: %u, channels: %d.\n", __func__, 327 327 runtime->rate, runtime->channels); 328 328 switch (fmt & 329 - (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_MASTER_MASK)) { 330 - case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS: 329 + (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) { 330 + case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP: 331 331 dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__); 332 332 333 333 msp_config->default_protdesc = 1; 334 334 msp_config->protocol = MSP_I2S_PROTOCOL; 335 335 break; 336 336 337 - case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM: 337 + case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC: 338 338 dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__); 339 339 340 340 msp_config->data_size = MSP_DATA_BITS_16; ··· 346 346 347 347 break; 348 348 349 - case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS: 350 - case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM: 351 - case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS: 352 - case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM: 349 + case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP: 350 + case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC: 351 + case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP: 352 + case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC: 353 353 dev_dbg(dai->dev, "%s: PCM format.\n", __func__); 354 354 355 355 msp_config->data_size = MSP_DATA_BITS_16; ··· 475 475 } 476 476 477 477 /* Set OPP-level */ 478 - if ((drvdata->fmt & SND_SOC_DAIFMT_MASTER_MASK) && 478 + if ((drvdata->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) && 479 479 (drvdata->msp->f_bitclk > 19200000)) { 480 480 /* If the bit-clock is higher than 19.2MHz, Vape should be 481 481 * run in 100% OPP. Only when bit-clock is used (MSP master) ··· 542 542 dev_dbg(dai->dev, "%s: MSP %d: Enter.\n", __func__, dai->id); 543 543 544 544 switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK | 545 - SND_SOC_DAIFMT_MASTER_MASK)) { 546 - case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS: 547 - case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM: 548 - case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS: 549 - case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM: 550 - case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS: 551 - case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM: 545 + SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) { 546 + case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP: 547 + case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC: 548 + case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP: 549 + case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC: 550 + case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP: 551 + case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC: 552 552 break; 553 553 554 554 default:
+2 -2
sound/soc/xtensa/xtfpga-i2s.c
··· 339 339 { 340 340 if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) 341 341 return -EINVAL; 342 - if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) 342 + if ((fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) != SND_SOC_DAIFMT_BP_FP) 343 343 return -EINVAL; 344 344 if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_I2S) 345 345 return -EINVAL; ··· 487 487 static const struct snd_soc_dai_ops xtfpga_i2s_dai_ops = { 488 488 .startup = xtfpga_i2s_startup, 489 489 .hw_params = xtfpga_i2s_hw_params, 490 - .set_fmt = xtfpga_i2s_set_fmt, 490 + .set_fmt = xtfpga_i2s_set_fmt, 491 491 }; 492 492 493 493 static struct snd_soc_dai_driver xtfpga_i2s_dai[] = {