Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/radeon: split audio enable between eg and r600 (v2)

Clean up the enable sequence as well.

V2: clean up duplicate defines

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

+81 -24
+2 -2
drivers/gpu/drm/radeon/dce3_1_afmt.c
··· 165 165 166 166 /* disable audio prior to setting up hw */ 167 167 dig->afmt->pin = r600_audio_get_pin(rdev); 168 - r600_audio_enable(rdev, dig->afmt->pin, false); 168 + r600_audio_enable(rdev, dig->afmt->pin, 0); 169 169 170 170 r600_audio_set_dto(encoder, mode->clock); 171 171 ··· 240 240 r600_hdmi_audio_workaround(encoder); 241 241 242 242 /* enable audio after to setting up hw */ 243 - r600_audio_enable(rdev, dig->afmt->pin, true); 243 + r600_audio_enable(rdev, dig->afmt->pin, 0xf); 244 244 }
+2 -2
drivers/gpu/drm/radeon/dce6_afmt.c
··· 284 284 285 285 void dce6_audio_enable(struct radeon_device *rdev, 286 286 struct r600_audio_pin *pin, 287 - bool enable) 287 + u8 enable_mask) 288 288 { 289 289 if (!pin) 290 290 return; 291 291 292 292 WREG32_ENDPOINT(pin->offset, AZ_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL, 293 - enable ? AUDIO_ENABLED : 0); 293 + enable_mask ? AUDIO_ENABLED : 0); 294 294 } 295 295 296 296 static const u32 pin_offsets[7] =
+35 -4
drivers/gpu/drm/radeon/evergreen_hdmi.c
··· 38 38 extern void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, 39 39 struct drm_display_mode *mode); 40 40 41 + /* enable the audio stream */ 42 + static void dce4_audio_enable(struct radeon_device *rdev, 43 + struct r600_audio_pin *pin, 44 + u8 enable_mask) 45 + { 46 + u32 tmp = RREG32(AZ_HOT_PLUG_CONTROL); 47 + 48 + if (!pin) 49 + return; 50 + 51 + if (enable_mask) { 52 + tmp |= AUDIO_ENABLED; 53 + if (enable_mask & 1) 54 + tmp |= PIN0_AUDIO_ENABLED; 55 + if (enable_mask & 2) 56 + tmp |= PIN1_AUDIO_ENABLED; 57 + if (enable_mask & 4) 58 + tmp |= PIN2_AUDIO_ENABLED; 59 + if (enable_mask & 8) 60 + tmp |= PIN3_AUDIO_ENABLED; 61 + } else { 62 + tmp &= ~(AUDIO_ENABLED | 63 + PIN0_AUDIO_ENABLED | 64 + PIN1_AUDIO_ENABLED | 65 + PIN2_AUDIO_ENABLED | 66 + PIN3_AUDIO_ENABLED); 67 + } 68 + 69 + WREG32(AZ_HOT_PLUG_CONTROL, tmp); 70 + } 71 + 41 72 /* 42 73 * update the N and CTS parameters for a given pixel clock rate 43 74 */ ··· 349 318 /* disable audio prior to setting up hw */ 350 319 if (ASIC_IS_DCE6(rdev)) { 351 320 dig->afmt->pin = dce6_audio_get_pin(rdev); 352 - dce6_audio_enable(rdev, dig->afmt->pin, false); 321 + dce6_audio_enable(rdev, dig->afmt->pin, 0); 353 322 } else { 354 323 dig->afmt->pin = r600_audio_get_pin(rdev); 355 - r600_audio_enable(rdev, dig->afmt->pin, false); 324 + dce4_audio_enable(rdev, dig->afmt->pin, 0); 356 325 } 357 326 358 327 evergreen_audio_set_dto(encoder, mode->clock); ··· 494 463 495 464 /* enable audio after to setting up hw */ 496 465 if (ASIC_IS_DCE6(rdev)) 497 - dce6_audio_enable(rdev, dig->afmt->pin, true); 466 + dce6_audio_enable(rdev, dig->afmt->pin, 1); 498 467 else 499 - r600_audio_enable(rdev, dig->afmt->pin, true); 468 + dce4_audio_enable(rdev, dig->afmt->pin, 0xf); 500 469 } 501 470 502 471 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
+23 -14
drivers/gpu/drm/radeon/r600_hdmi.c
··· 163 163 /* enable the audio stream */ 164 164 void r600_audio_enable(struct radeon_device *rdev, 165 165 struct r600_audio_pin *pin, 166 - bool enable) 166 + u8 enable_mask) 167 167 { 168 - u32 value = 0; 168 + u32 tmp = RREG32(AZ_HOT_PLUG_CONTROL); 169 169 170 170 if (!pin) 171 171 return; 172 172 173 - if (ASIC_IS_DCE4(rdev)) { 174 - if (enable) { 175 - value |= 0x81000000; /* Required to enable audio */ 176 - value |= 0x0e1000f0; /* fglrx sets that too */ 177 - } 178 - WREG32(EVERGREEN_AUDIO_ENABLE, value); 173 + if (enable_mask) { 174 + tmp |= AUDIO_ENABLED; 175 + if (enable_mask & 1) 176 + tmp |= PIN0_AUDIO_ENABLED; 177 + if (enable_mask & 2) 178 + tmp |= PIN1_AUDIO_ENABLED; 179 + if (enable_mask & 4) 180 + tmp |= PIN2_AUDIO_ENABLED; 181 + if (enable_mask & 8) 182 + tmp |= PIN3_AUDIO_ENABLED; 179 183 } else { 180 - WREG32_P(R600_AUDIO_ENABLE, 181 - enable ? 0x81000000 : 0x0, ~0x81000000); 184 + tmp &= ~(AUDIO_ENABLED | 185 + PIN0_AUDIO_ENABLED | 186 + PIN1_AUDIO_ENABLED | 187 + PIN2_AUDIO_ENABLED | 188 + PIN3_AUDIO_ENABLED); 182 189 } 190 + 191 + WREG32(AZ_HOT_PLUG_CONTROL, tmp); 183 192 } 184 193 185 194 /* ··· 209 200 rdev->audio.pin[0].category_code = 0; 210 201 rdev->audio.pin[0].id = 0; 211 202 /* disable audio. it will be set up later */ 212 - r600_audio_enable(rdev, &rdev->audio.pin[0], false); 203 + r600_audio_enable(rdev, &rdev->audio.pin[0], 0); 213 204 214 205 return 0; 215 206 } ··· 223 214 if (!rdev->audio.enabled) 224 215 return; 225 216 226 - r600_audio_enable(rdev, &rdev->audio.pin[0], false); 217 + r600_audio_enable(rdev, &rdev->audio.pin[0], 0); 227 218 228 219 rdev->audio.enabled = false; 229 220 } ··· 520 511 521 512 /* disable audio prior to setting up hw */ 522 513 dig->afmt->pin = r600_audio_get_pin(rdev); 523 - r600_audio_enable(rdev, dig->afmt->pin, false); 514 + r600_audio_enable(rdev, dig->afmt->pin, 0xf); 524 515 525 516 r600_audio_set_dto(encoder, mode->clock); 526 517 ··· 606 597 WREG32(HDMI0_RAMP_CONTROL3 + offset, 0x00000001); 607 598 608 599 /* enable audio after to setting up hw */ 609 - r600_audio_enable(rdev, dig->afmt->pin, true); 600 + r600_audio_enable(rdev, dig->afmt->pin, 0xf); 610 601 } 611 602 612 603 /**
+17
drivers/gpu/drm/radeon/r600d.h
··· 934 934 # define TARGET_LINK_SPEED_MASK (0xf << 0) 935 935 # define SELECTABLE_DEEMPHASIS (1 << 6) 936 936 937 + /* Audio */ 938 + #define AZ_HOT_PLUG_CONTROL 0x7300 939 + # define AZ_FORCE_CODEC_WAKE (1 << 0) 940 + # define JACK_DETECTION_ENABLE (1 << 4) 941 + # define UNSOLICITED_RESPONSE_ENABLE (1 << 8) 942 + # define CODEC_HOT_PLUG_ENABLE (1 << 12) 943 + # define AUDIO_ENABLED (1 << 31) 944 + /* DCE3 adds */ 945 + # define PIN0_JACK_DETECTION_ENABLE (1 << 4) 946 + # define PIN1_JACK_DETECTION_ENABLE (1 << 5) 947 + # define PIN2_JACK_DETECTION_ENABLE (1 << 6) 948 + # define PIN3_JACK_DETECTION_ENABLE (1 << 7) 949 + # define PIN0_AUDIO_ENABLED (1 << 24) 950 + # define PIN1_AUDIO_ENABLED (1 << 25) 951 + # define PIN2_AUDIO_ENABLED (1 << 26) 952 + # define PIN3_AUDIO_ENABLED (1 << 27) 953 + 937 954 /* Audio clocks DCE 2.0/3.0 */ 938 955 #define AUDIO_DTO 0x7340 939 956 # define AUDIO_DTO_PHASE(x) (((x) & 0xffff) << 0)
+2 -2
drivers/gpu/drm/radeon/radeon.h
··· 2977 2977 struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev); 2978 2978 void r600_audio_enable(struct radeon_device *rdev, 2979 2979 struct r600_audio_pin *pin, 2980 - bool enable); 2980 + u8 enable_mask); 2981 2981 void dce6_audio_enable(struct radeon_device *rdev, 2982 2982 struct r600_audio_pin *pin, 2983 - bool enable); 2983 + u8 enable_mask); 2984 2984 2985 2985 /* 2986 2986 * R600 vram scratch functions