commit d3c5f8b93febadf62da9a4b39a2dca8e66a4da40 · tjh.dev/kernel

tjh.dev / kernel

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] integrator: fix build warnings and errors
[ARM] fix OMAP include loops
Revert "[ARM] pxa: spitz wants PXA27x UDC definitions"
[ARM] 5053/1: define before use of processor_id
[ARM] 5052/1: export clock functions for the at91x40
[ARM] 5051/1: define pgtable_t for the !CONFIG_MMU case too
[ARM] omap: fix omap clk support build errors
[ARM] 5039/1: S3C244X: Rename SDI device if running on S3C244X.
[ARM] 5043/1: pxafb: remove unused mode variable in pxafb_init_fbinfo
[ARM] 5041/1: VR1000: Fix DM9000 IRQ flags initialisation
[ARM] 5040/1: BAST: Fix DM9000 IRQ flags initialisation
[ARM] 5038/1: ARM: OMAP: Remove tsc2102 references from board-palmte.c
[ARM] 5025/2: fix collie cpu initialisation

Linus Torvalds 17 years ago d3c5f8b9 25d5cb4b

+70 -54

19 changed files

expand all

unified split

arch

arm

mach-at91

at91x40.c

mach-integrator

impd1.c

pci_v3.c

mach-omap1

board-palmte.c

mach-pxa

spitz.c

mach-s3c2410

mach-bast.c

mach-vr1000.c

mach-sa1100

collie.c

plat-omap

clock.c

plat-s3c24xx

s3c244x.c

drivers

video

pxafb.c

include

asm-arm

arch-omap

board-palmte.h

clock.h

entry-macro.S

gpio.h

hardware.h

arch-sa1100

collie.h

page.h

system.h

+17 -1

arch/arm/mach-at91/at91x40.c

··· 16 16 #include <asm/mach/arch.h> 17 17 #include <asm/arch/at91x40.h> 18 18 #include <asm/arch/at91_st.h> 19 + #include <asm/arch/timex.h> 19 20 #include "generic.h" 20 21 21 22 /* 22 - * This is used in the gpio code, stub locally. 23 + * Export the clock functions for the AT91X40. Some external code common 24 + * to all AT91 family parts relys on this, like the gpio and serial support. 23 25 */ 24 26 int clk_enable(struct clk *clk) 25 27 { 26 28 return 0; 29 + } 30 + 31 + void clk_disable(struct clk *clk) 32 + { 33 + } 34 + 35 + unsigned long clk_get_rate(struct clk *clk) 36 + { 37 + return AT91X40_MASTER_CLOCK; 38 + } 39 + 40 + struct clk *clk_get(struct device *dev, const char *id) 41 + { 42 + return NULL; 27 43 } 28 44 29 45 void __init at91x40_initialize(unsigned long main_clock)

+2 -1

arch/arm/mach-integrator/impd1.c

··· 369 369 370 370 lm_set_drvdata(dev, impd1); 371 371 372 - printk("IM-PD1 found at 0x%08lx\n", dev->resource.start); 372 + printk("IM-PD1 found at 0x%08lx\n", 373 + (unsigned long)dev->resource.start); 373 374 374 375 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) { 375 376 impd1->vcos[i].owner = THIS_MODULE,

+1 -1

arch/arm/mach-integrator/pci_v3.c

··· 405 405 addr, fsr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255, 406 406 v3_readb(V3_LB_ISTAT)); 407 407 printk(KERN_DEBUG "%s", buf); 408 - printascii(buf); 409 408 #endif 410 409 411 410 v3_writeb(V3_LB_ISTAT, 0); ··· 446 447 unsigned long pc = instruction_pointer(regs); 447 448 unsigned long instr = *(unsigned long *)pc; 448 449 char buf[128]; 450 + extern void printascii(const char *); 449 451 450 452 sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x " 451 453 "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr,

-10

arch/arm/mach-omap1/board-palmte.c

··· 24 24 #include <linux/mtd/mtd.h> 25 25 #include <linux/mtd/partitions.h> 26 26 #include <linux/spi/spi.h> 27 - #include <linux/spi/tsc2102.h> 28 27 #include <linux/interrupt.h> 29 28 #include <linux/apm-emulation.h> 30 29 ··· 314 315 #define palmte_get_power_status NULL 315 316 #endif 316 317 317 - static struct tsc2102_config palmte_tsc2102_config = { 318 - .use_internal = 0, 319 - .monitor = TSC_BAT1 | TSC_AUX | TSC_TEMP, 320 - .temp_at25c = { 2200, 2615 }, 321 - .apm_report = palmte_get_power_status, 322 - .alsa_config = &palmte_alsa_config, 323 - }; 324 - 325 318 static struct omap_board_config_kernel palmte_config[] __initdata = { 326 319 { OMAP_TAG_USB, &palmte_usb_config }, 327 320 { OMAP_TAG_MMC, &palmte_mmc_config }, ··· 327 336 .bus_num = 2, /* uWire (officially) */ 328 337 .chip_select = 0, /* As opposed to 3 */ 329 338 .irq = OMAP_GPIO_IRQ(PALMTE_PINTDAV_GPIO), 330 - .platform_data = &palmte_tsc2102_config, 331 339 .max_speed_hz = 8000000, 332 340 }, 333 341 };

-1

arch/arm/mach-pxa/spitz.c

··· 38 38 #include <asm/arch/pxa-regs.h> 39 39 #include <asm/arch/pxa2xx-regs.h> 40 40 #include <asm/arch/pxa2xx-gpio.h> 41 - #include <asm/arch/pxa27x-udc.h> 42 41 #include <asm/arch/irda.h> 43 42 #include <asm/arch/mmc.h> 44 43 #include <asm/arch/ohci.h>

+1 -1

arch/arm/mach-s3c2410/mach-bast.c

··· 374 374 [2] = { 375 375 .start = IRQ_DM9000, 376 376 .end = IRQ_DM9000, 377 - .flags = IORESOURCE_IRQ, 377 + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, 378 378 } 379 379 380 380 };

+2 -2

arch/arm/mach-s3c2410/mach-vr1000.c

··· 263 263 [2] = { 264 264 .start = IRQ_VR1000_DM9000A, 265 265 .end = IRQ_VR1000_DM9000A, 266 - .flags = IORESOURCE_IRQ 266 + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, 267 267 } 268 268 269 269 }; ··· 282 282 [2] = { 283 283 .start = IRQ_VR1000_DM9000N, 284 284 .end = IRQ_VR1000_DM9000N, 285 - .flags = IORESOURCE_IRQ 285 + .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, 286 286 } 287 287 }; 288 288

+18 -16

arch/arm/mach-sa1100/collie.c

··· 225 225 int ret = 0; 226 226 227 227 /* cpu initialize */ 228 - GAFR = ( GPIO_SSP_TXD | \ 229 - GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SSP_CLK | GPIO_TIC_ACK | \ 230 - GPIO_32_768kHz ); 228 + GAFR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SSP_CLK | 229 + GPIO_MCP_CLK | GPIO_32_768kHz; 231 230 232 - GPDR = ( GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | \ 233 - GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD | \ 234 - GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK | \ 235 - GPIO_SDLC_AAF | GPIO_UART_SCLK1 | GPIO_32_768kHz ); 236 - GPLR = GPIO_GPIO18; 231 + GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | 232 + GPIO_LDD13 | GPIO_LDD14 | GPIO_LDD15 | GPIO_SSP_TXD | 233 + GPIO_SSP_SCLK | GPIO_SSP_SFRM | GPIO_SDLC_SCLK | 234 + COLLIE_GPIO_UCB1x00_RESET | COLLIE_GPIO_nMIC_ON | 235 + COLLIE_GPIO_nREMOCON_ON | GPIO_32_768kHz; 237 236 238 - // PPC pin setting 239 - PPDR = ( PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 | \ 240 - PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | \ 241 - PPC_TXD1 | PPC_TXD2 | PPC_RXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM ); 237 + PPDR = PPC_LDD0 | PPC_LDD1 | PPC_LDD2 | PPC_LDD3 | PPC_LDD4 | PPC_LDD5 | 238 + PPC_LDD6 | PPC_LDD7 | PPC_L_PCLK | PPC_L_LCLK | PPC_L_FCLK | PPC_L_BIAS | 239 + PPC_TXD1 | PPC_TXD2 | PPC_TXD3 | PPC_TXD4 | PPC_SCLK | PPC_SFRM; 242 240 243 - PSDR = ( PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4 ); 241 + PWER = COLLIE_GPIO_AC_IN | COLLIE_GPIO_CO | COLLIE_GPIO_ON_KEY | 242 + COLLIE_GPIO_WAKEUP | COLLIE_GPIO_nREMOCON_INT | PWER_RTC; 244 243 245 - GAFR |= GPIO_32_768kHz; 246 - GPDR |= GPIO_32_768kHz; 247 - TUCR = TUCR_32_768kHz; 244 + PGSR = COLLIE_GPIO_nREMOCON_ON; 245 + 246 + PSDR = PPC_RXD1 | PPC_RXD2 | PPC_RXD3 | PPC_RXD4; 247 + 248 + PCFR = PCFR_OPDE; 249 + 248 250 249 251 platform_scoop_config = &collie_pcmcia_config; 250 252

arch/arm/plat-omap/clock.c

··· 21 21 #include <linux/clk.h> 22 22 #include <linux/mutex.h> 23 23 #include <linux/platform_device.h> 24 + #include <linux/cpufreq.h> 24 25 25 26 #include <asm/io.h> 26 27

arch/arm/plat-s3c24xx/s3c244x.c

··· 65 65 66 66 /* rename any peripherals used differing from the s3c2410 */ 67 67 68 + s3c_device_sdi.name = "s3c2440-sdi"; 68 69 s3c_device_i2c.name = "s3c2440-i2c"; 69 70 s3c_device_nand.name = "s3c2440-nand"; 70 71 s3c_device_usbgadget.name = "s3c2440-usbgadget";

-1

drivers/video/pxafb.c

··· 1351 1351 struct pxafb_info *fbi; 1352 1352 void *addr; 1353 1353 struct pxafb_mach_info *inf = dev->platform_data; 1354 - struct pxafb_mode_info *mode = inf->modes; 1355 1354 1356 1355 /* Alloc the pxafb_info and pseudo_palette in one step */ 1357 1356 fbi = kmalloc(sizeof(struct pxafb_info) + sizeof(u32) * 16, GFP_KERNEL);

-2

include/asm-arm/arch-omap/board-palmte.h

··· 14 14 #ifndef __OMAP_BOARD_PALMTE_H 15 15 #define __OMAP_BOARD_PALMTE_H 16 16 17 - #include <asm/arch/gpio.h> 18 - 19 17 #define PALMTE_USBDETECT_GPIO 0 20 18 #define PALMTE_USB_OR_DC_GPIO 1 21 19 #define PALMTE_TSC_GPIO 4

include/asm-arm/arch-omap/clock.h

··· 73 73 #endif 74 74 }; 75 75 76 + struct cpufreq_frequency_table; 77 + 76 78 struct clk_functions { 77 79 int (*clk_enable)(struct clk *clk); 78 80 void (*clk_disable)(struct clk *clk); ··· 85 83 void (*clk_allow_idle)(struct clk *clk); 86 84 void (*clk_deny_idle)(struct clk *clk); 87 85 void (*clk_disable_unused)(struct clk *clk); 86 + #ifdef CONFIG_CPU_FREQ 87 + void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); 88 + #endif 88 89 }; 89 90 90 91 extern unsigned int mpurate;

include/asm-arm/arch-omap/entry-macro.S

··· 8 8 * warranty of any kind, whether express or implied. 9 9 */ 10 10 #include <asm/hardware.h> 11 + #include <asm/arch/io.h> 11 12 #include <asm/arch/irqs.h> 12 13 13 14 #if defined(CONFIG_ARCH_OMAP1)

-1

include/asm-arm/arch-omap/gpio.h

··· 26 26 #ifndef __ASM_ARCH_OMAP_GPIO_H 27 27 #define __ASM_ARCH_OMAP_GPIO_H 28 28 29 - #include <asm/hardware.h> 30 29 #include <asm/arch/irqs.h> 31 30 #include <asm/io.h> 32 31

-1

include/asm-arm/arch-omap/hardware.h

··· 41 41 #include <asm/types.h> 42 42 #include <asm/arch/cpu.h> 43 43 #endif 44 - #include <asm/arch/io.h> 45 44 #include <asm/arch/serial.h> 46 45 47 46 /*

include/asm-arm/arch-sa1100/collie.h

··· 34 34 35 35 #define COLLIE_GPIO_ON_KEY GPIO_GPIO (0) 36 36 #define COLLIE_GPIO_AC_IN GPIO_GPIO (1) 37 + #define COLLIE_GPIO_SDIO_INT GPIO_GPIO (11) 37 38 #define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14) 38 39 #define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15) 39 40 #define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16) 41 + #define COLLIE_GPIO_nMIC_ON GPIO_GPIO (17) 42 + #define COLLIE_GPIO_nREMOCON_ON GPIO_GPIO (18) 40 43 #define COLLIE_GPIO_CO GPIO_GPIO (20) 41 44 #define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21) 42 45 #define COLLIE_GPIO_CF_CD GPIO_GPIO (22) ··· 52 49 53 50 #define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0 54 51 #define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1 52 + #define COLLIE_IRQ_GPIO_SDIO_IRQ IRQ_GPIO11 55 53 #define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14 56 54 #define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15 57 55 #define COLLIE_IRQ_GPIO_CO IRQ_GPIO20

+2 -2

include/asm-arm/page.h

··· 179 179 180 180 #endif /* STRICT_MM_TYPECHECKS */ 181 181 182 - typedef struct page *pgtable_t; 183 - 184 182 #endif /* CONFIG_MMU */ 183 + 184 + typedef struct page *pgtable_t; 185 185 186 186 #include <asm/memory.h> 187 187

+15 -14

include/asm-arm/system.h

··· 48 48 #define CPUID_TCM 2 49 49 #define CPUID_TLBTYPE 3 50 50 51 - #ifdef CONFIG_CPU_CP15 52 - #define read_cpuid(reg) \ 53 - ({ \ 54 - unsigned int __val; \ 55 - asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ 56 - : "=r" (__val) \ 57 - : \ 58 - : "cc"); \ 59 - __val; \ 60 - }) 61 - #else 62 - #define read_cpuid(reg) (processor_id) 63 - #endif 64 - 65 51 /* 66 52 * This is used to ensure the compiler did actually allocate the register we 67 53 * asked it for some inline assembly sequences. Apparently we can't trust ··· 63 77 #include <linux/linkage.h> 64 78 #include <linux/stringify.h> 65 79 #include <linux/irqflags.h> 80 + 81 + #ifdef CONFIG_CPU_CP15 82 + #define read_cpuid(reg) \ 83 + ({ \ 84 + unsigned int __val; \ 85 + asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ 86 + : "=r" (__val) \ 87 + : \ 88 + : "cc"); \ 89 + __val; \ 90 + }) 91 + #else 92 + extern unsigned int processor_id; 93 + #define read_cpuid(reg) (processor_id) 94 + #endif 66 95 67 96 /* 68 97 * The CPU ID never changes at run time, so we might as well tell the