Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: composite: rename 'div' references to 'rate'

Rename all div_hw and div_ops related variables and functions to use
rate_hw, rate_ops, etc. This is to make the rate-change portion of the
composite clk implementation more generic. A patch following this one
will allow for fixed-rate clocks to reuse this infrastructure.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>

+27 -27
+20 -20
drivers/clk/clk-composite.c
··· 47 47 unsigned long parent_rate) 48 48 { 49 49 struct clk_composite *composite = to_clk_composite(hw); 50 - const struct clk_ops *div_ops = composite->div_ops; 51 - struct clk_hw *div_hw = composite->div_hw; 50 + const struct clk_ops *rate_ops = composite->rate_ops; 51 + struct clk_hw *rate_hw = composite->rate_hw; 52 52 53 - div_hw->clk = hw->clk; 53 + rate_hw->clk = hw->clk; 54 54 55 - return div_ops->recalc_rate(div_hw, parent_rate); 55 + return rate_ops->recalc_rate(rate_hw, parent_rate); 56 56 } 57 57 58 58 static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate, 59 59 unsigned long *prate) 60 60 { 61 61 struct clk_composite *composite = to_clk_composite(hw); 62 - const struct clk_ops *div_ops = composite->div_ops; 63 - struct clk_hw *div_hw = composite->div_hw; 62 + const struct clk_ops *rate_ops = composite->rate_ops; 63 + struct clk_hw *rate_hw = composite->rate_hw; 64 64 65 - div_hw->clk = hw->clk; 65 + rate_hw->clk = hw->clk; 66 66 67 - return div_ops->round_rate(div_hw, rate, prate); 67 + return rate_ops->round_rate(rate_hw, rate, prate); 68 68 } 69 69 70 70 static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate, 71 71 unsigned long parent_rate) 72 72 { 73 73 struct clk_composite *composite = to_clk_composite(hw); 74 - const struct clk_ops *div_ops = composite->div_ops; 75 - struct clk_hw *div_hw = composite->div_hw; 74 + const struct clk_ops *rate_ops = composite->rate_ops; 75 + struct clk_hw *rate_hw = composite->rate_hw; 76 76 77 - div_hw->clk = hw->clk; 77 + rate_hw->clk = hw->clk; 78 78 79 - return div_ops->set_rate(div_hw, rate, parent_rate); 79 + return rate_ops->set_rate(rate_hw, rate, parent_rate); 80 80 } 81 81 82 82 static int clk_composite_is_enabled(struct clk_hw *hw) ··· 115 115 struct clk *clk_register_composite(struct device *dev, const char *name, 116 116 const char **parent_names, int num_parents, 117 117 struct clk_hw *mux_hw, const struct clk_ops *mux_ops, 118 - struct clk_hw *div_hw, const struct clk_ops *div_ops, 118 + struct clk_hw *rate_hw, const struct clk_ops *rate_ops, 119 119 struct clk_hw *gate_hw, const struct clk_ops *gate_ops, 120 120 unsigned long flags) 121 121 { ··· 149 149 clk_composite_ops->set_parent = clk_composite_set_parent; 150 150 } 151 151 152 - if (div_hw && div_ops) { 153 - if (!div_ops->recalc_rate || !div_ops->round_rate || 154 - !div_ops->set_rate) { 152 + if (rate_hw && rate_ops) { 153 + if (!rate_ops->recalc_rate || !rate_ops->round_rate || 154 + !rate_ops->set_rate) { 155 155 clk = ERR_PTR(-EINVAL); 156 156 goto err; 157 157 } 158 158 159 - composite->div_hw = div_hw; 160 - composite->div_ops = div_ops; 159 + composite->rate_hw = rate_hw; 160 + composite->rate_ops = rate_ops; 161 161 clk_composite_ops->recalc_rate = clk_composite_recalc_rate; 162 162 clk_composite_ops->round_rate = clk_composite_round_rate; 163 163 clk_composite_ops->set_rate = clk_composite_set_rate; ··· 187 187 if (composite->mux_hw) 188 188 composite->mux_hw->clk = clk; 189 189 190 - if (composite->div_hw) 191 - composite->div_hw->clk = clk; 190 + if (composite->rate_hw) 191 + composite->rate_hw->clk = clk; 192 192 193 193 if (composite->gate_hw) 194 194 composite->gate_hw->clk = clk;
+7 -7
include/linux/clk-provider.h
··· 354 354 * struct clk_composite - aggregate clock of mux, divider and gate clocks 355 355 * 356 356 * @hw: handle between common and hardware-specific interfaces 357 - * @mux_hw: handle between composite and hardware-specifix mux clock 358 - * @div_hw: handle between composite and hardware-specifix divider clock 359 - * @gate_hw: handle between composite and hardware-specifix gate clock 357 + * @mux_hw: handle between composite and hardware-specific mux clock 358 + * @rate_hw: handle between composite and hardware-specific rate clock 359 + * @gate_hw: handle between composite and hardware-specific gate clock 360 360 * @mux_ops: clock ops for mux 361 - * @div_ops: clock ops for divider 361 + * @rate_ops: clock ops for rate 362 362 * @gate_ops: clock ops for gate 363 363 */ 364 364 struct clk_composite { ··· 366 366 struct clk_ops ops; 367 367 368 368 struct clk_hw *mux_hw; 369 - struct clk_hw *div_hw; 369 + struct clk_hw *rate_hw; 370 370 struct clk_hw *gate_hw; 371 371 372 372 const struct clk_ops *mux_ops; 373 - const struct clk_ops *div_ops; 373 + const struct clk_ops *rate_ops; 374 374 const struct clk_ops *gate_ops; 375 375 }; 376 376 377 377 struct clk *clk_register_composite(struct device *dev, const char *name, 378 378 const char **parent_names, int num_parents, 379 379 struct clk_hw *mux_hw, const struct clk_ops *mux_ops, 380 - struct clk_hw *div_hw, const struct clk_ops *div_ops, 380 + struct clk_hw *rate_hw, const struct clk_ops *rate_ops, 381 381 struct clk_hw *gate_hw, const struct clk_ops *gate_ops, 382 382 unsigned long flags); 383 383