Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: Remove redundant i2c structs

[Why]
The i2c code contains two structs that contain the same
information as i2c_payload

[How]
Replace references to those structs with references to
i2c_payload

dce_i2c_transaction_request->status was written to but never read,
so all references to it are removed

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

David Francis and committed by
Alex Deucher
d377ae4e 46659a83

+28 -177
-33
drivers/gpu/drm/amd/display/dc/dce/dce_i2c.h
··· 30 30 #include "dce_i2c_hw.h" 31 31 #include "dce_i2c_sw.h" 32 32 33 - enum dce_i2c_transaction_status { 34 - DCE_I2C_TRANSACTION_STATUS_UNKNOWN = (-1L), 35 - DCE_I2C_TRANSACTION_STATUS_SUCCEEDED, 36 - DCE_I2C_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY, 37 - DCE_I2C_TRANSACTION_STATUS_FAILED_TIMEOUT, 38 - DCE_I2C_TRANSACTION_STATUS_FAILED_PROTOCOL_ERROR, 39 - DCE_I2C_TRANSACTION_STATUS_FAILED_NACK, 40 - DCE_I2C_TRANSACTION_STATUS_FAILED_INCOMPLETE, 41 - DCE_I2C_TRANSACTION_STATUS_FAILED_OPERATION, 42 - DCE_I2C_TRANSACTION_STATUS_FAILED_INVALID_OPERATION, 43 - DCE_I2C_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW, 44 - DCE_I2C_TRANSACTION_STATUS_FAILED_HPD_DISCON 45 - }; 46 - 47 - enum dce_i2c_transaction_operation { 48 - DCE_I2C_TRANSACTION_READ, 49 - DCE_I2C_TRANSACTION_WRITE 50 - }; 51 - 52 - struct dce_i2c_transaction_payload { 53 - enum dce_i2c_transaction_address_space address_space; 54 - uint32_t address; 55 - uint32_t length; 56 - uint8_t *data; 57 - }; 58 - 59 - struct dce_i2c_transaction_request { 60 - enum dce_i2c_transaction_operation operation; 61 - struct dce_i2c_transaction_payload payload; 62 - enum dce_i2c_transaction_status status; 63 - }; 64 - 65 - 66 33 bool dce_i2c_submit_command( 67 34 struct resource_pool *pool, 68 35 struct ddc *ddc,
+17 -67
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c
··· 129 129 130 130 static void process_channel_reply( 131 131 struct dce_i2c_hw *dce_i2c_hw, 132 - struct i2c_reply_transaction_data *reply) 132 + struct i2c_payload *reply) 133 133 { 134 134 uint32_t length = reply->length; 135 135 uint8_t *buffer = reply->data; ··· 522 522 return period_timeout * num_of_clock_stretches; 523 523 } 524 524 525 - bool dce_i2c_hw_engine_submit_request( 525 + bool dce_i2c_hw_engine_submit_payload( 526 526 struct dce_i2c_hw *dce_i2c_hw, 527 - struct dce_i2c_transaction_request *dce_i2c_request, 527 + struct i2c_payload *payload, 528 528 bool middle_of_transaction) 529 529 { 530 530 ··· 541 541 * the number of free bytes in HW buffer (minus one for address) 542 542 */ 543 543 544 - if (dce_i2c_request->payload.length >= 544 + if (payload->length >= 545 545 get_hw_buffer_available_size(dce_i2c_hw)) { 546 - dce_i2c_request->status = 547 - DCE_I2C_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW; 548 546 return false; 549 547 } 550 548 551 - if (dce_i2c_request->operation == DCE_I2C_TRANSACTION_READ) 549 + if (!payload->write) 552 550 request.action = middle_of_transaction ? 553 551 DCE_I2C_TRANSACTION_ACTION_I2C_READ_MOT : 554 552 DCE_I2C_TRANSACTION_ACTION_I2C_READ; 555 - else if (dce_i2c_request->operation == DCE_I2C_TRANSACTION_WRITE) 553 + else 556 554 request.action = middle_of_transaction ? 557 555 DCE_I2C_TRANSACTION_ACTION_I2C_WRITE_MOT : 558 556 DCE_I2C_TRANSACTION_ACTION_I2C_WRITE; 559 - else { 560 - dce_i2c_request->status = 561 - DCE_I2C_TRANSACTION_STATUS_FAILED_INVALID_OPERATION; 562 - /* [anaumov] in DAL2, there was no "return false" */ 563 - return false; 564 - } 565 557 566 - request.address = (uint8_t) dce_i2c_request->payload.address; 567 - request.length = dce_i2c_request->payload.length; 568 - request.data = dce_i2c_request->payload.data; 558 + 559 + request.address = (uint8_t) ((payload->address << 1) | !payload->write); 560 + request.length = payload->length; 561 + request.data = payload->data; 569 562 570 563 /* obtain timeout value before submitting request */ 571 564 572 565 transaction_timeout = get_transaction_timeout_hw( 573 - dce_i2c_hw, dce_i2c_request->payload.length + 1); 566 + dce_i2c_hw, payload->length + 1); 574 567 575 568 submit_channel_request_hw( 576 569 dce_i2c_hw, &request); 577 570 578 571 if ((request.status == I2C_CHANNEL_OPERATION_FAILED) || 579 - (request.status == I2C_CHANNEL_OPERATION_ENGINE_BUSY)) { 580 - dce_i2c_request->status = 581 - DCE_I2C_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY; 572 + (request.status == I2C_CHANNEL_OPERATION_ENGINE_BUSY)) 582 573 return false; 583 - } 584 574 585 575 /* wait until transaction proceed */ 586 576 ··· 581 591 582 592 /* update transaction status */ 583 593 584 - switch (operation_result) { 585 - case I2C_CHANNEL_OPERATION_SUCCEEDED: 586 - dce_i2c_request->status = 587 - DCE_I2C_TRANSACTION_STATUS_SUCCEEDED; 594 + if (operation_result == I2C_CHANNEL_OPERATION_SUCCEEDED) 588 595 result = true; 589 - break; 590 - case I2C_CHANNEL_OPERATION_NO_RESPONSE: 591 - dce_i2c_request->status = 592 - DCE_I2C_TRANSACTION_STATUS_FAILED_NACK; 593 - break; 594 - case I2C_CHANNEL_OPERATION_TIMEOUT: 595 - dce_i2c_request->status = 596 - DCE_I2C_TRANSACTION_STATUS_FAILED_TIMEOUT; 597 - break; 598 - case I2C_CHANNEL_OPERATION_FAILED: 599 - dce_i2c_request->status = 600 - DCE_I2C_TRANSACTION_STATUS_FAILED_INCOMPLETE; 601 - break; 602 - default: 603 - dce_i2c_request->status = 604 - DCE_I2C_TRANSACTION_STATUS_FAILED_OPERATION; 605 - } 606 596 607 - if (result && (dce_i2c_request->operation == DCE_I2C_TRANSACTION_READ)) { 608 - struct i2c_reply_transaction_data reply; 609 - 610 - reply.data = dce_i2c_request->payload.data; 611 - reply.length = dce_i2c_request->payload.length; 612 - 613 - process_channel_reply(dce_i2c_hw, &reply); 614 - } 597 + if (result && (!payload->write)) 598 + process_channel_reply(dce_i2c_hw, payload); 615 599 616 600 return result; 617 601 } ··· 608 644 609 645 struct i2c_payload *payload = cmd->payloads + index_of_payload; 610 646 611 - struct dce_i2c_transaction_request request = { 0 }; 612 - 613 - request.operation = payload->write ? 614 - DCE_I2C_TRANSACTION_WRITE : 615 - DCE_I2C_TRANSACTION_READ; 616 - 617 - request.payload.address_space = 618 - DCE_I2C_TRANSACTION_ADDRESS_SPACE_I2C; 619 - request.payload.address = (payload->address << 1) | 620 - !payload->write; 621 - request.payload.length = payload->length; 622 - request.payload.data = payload->data; 623 - 624 - 625 - if (!dce_i2c_hw_engine_submit_request( 626 - dce_i2c_hw, &request, mot)) { 647 + if (!dce_i2c_hw_engine_submit_payload( 648 + dce_i2c_hw, payload, mot)) { 627 649 result = false; 628 650 break; 629 651 }
-5
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h
··· 236 236 uint8_t *data; 237 237 }; 238 238 239 - struct i2c_reply_transaction_data { 240 - uint32_t length; 241 - uint8_t *data; 242 - }; 243 - 244 239 struct dce_i2c_hw { 245 240 struct ddc *ddc; 246 241 uint32_t original_speed;
+11 -72
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c
··· 70 70 dce_i2c_sw->ddc = NULL; 71 71 } 72 72 73 - enum i2c_channel_operation_result dce_i2c_sw_engine_get_channel_status( 74 - struct dce_i2c_sw *engine, 75 - uint8_t *returned_bytes) 76 - { 77 - /* No arbitration with VBIOS is performed since DCE 6.0 */ 78 - return I2C_CHANNEL_OPERATION_SUCCEEDED; 79 - } 80 73 static bool get_hw_supported_ddc_line( 81 74 struct ddc *ddc, 82 75 enum gpio_ddc_line *line) ··· 462 469 I2C_CHANNEL_OPERATION_SUCCEEDED : 463 470 I2C_CHANNEL_OPERATION_FAILED; 464 471 } 465 - bool dce_i2c_sw_engine_submit_request( 472 + bool dce_i2c_sw_engine_submit_payload( 466 473 struct dce_i2c_sw *engine, 467 - struct dce_i2c_transaction_request *dce_i2c_request, 474 + struct i2c_payload *payload, 468 475 bool middle_of_transaction) 469 476 { 470 477 struct i2c_request_transaction_data request; 471 - bool operation_succeeded = false; 472 478 473 - if (dce_i2c_request->operation == DCE_I2C_TRANSACTION_READ) 479 + if (!payload->write) 474 480 request.action = middle_of_transaction ? 475 481 DCE_I2C_TRANSACTION_ACTION_I2C_READ_MOT : 476 482 DCE_I2C_TRANSACTION_ACTION_I2C_READ; 477 - else if (dce_i2c_request->operation == DCE_I2C_TRANSACTION_WRITE) 483 + else 478 484 request.action = middle_of_transaction ? 479 485 DCE_I2C_TRANSACTION_ACTION_I2C_WRITE_MOT : 480 486 DCE_I2C_TRANSACTION_ACTION_I2C_WRITE; 481 - else { 482 - dce_i2c_request->status = 483 - DCE_I2C_TRANSACTION_STATUS_FAILED_INVALID_OPERATION; 484 - /* in DAL2, there was no "return false" */ 485 - return false; 486 - } 487 487 488 - request.address = (uint8_t)dce_i2c_request->payload.address; 489 - request.length = dce_i2c_request->payload.length; 490 - request.data = dce_i2c_request->payload.data; 488 + request.address = (uint8_t) ((payload->address << 1) | !payload->write); 489 + request.length = payload->length; 490 + request.data = payload->data; 491 491 492 492 dce_i2c_sw_engine_submit_channel_request(engine, &request); 493 493 494 494 if ((request.status == I2C_CHANNEL_OPERATION_ENGINE_BUSY) || 495 495 (request.status == I2C_CHANNEL_OPERATION_FAILED)) 496 - dce_i2c_request->status = 497 - DCE_I2C_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY; 498 - else { 499 - enum i2c_channel_operation_result operation_result; 496 + return false; 500 497 501 - do { 502 - operation_result = 503 - dce_i2c_sw_engine_get_channel_status(engine, NULL); 504 - 505 - switch (operation_result) { 506 - case I2C_CHANNEL_OPERATION_SUCCEEDED: 507 - dce_i2c_request->status = 508 - DCE_I2C_TRANSACTION_STATUS_SUCCEEDED; 509 - operation_succeeded = true; 510 - break; 511 - case I2C_CHANNEL_OPERATION_NO_RESPONSE: 512 - dce_i2c_request->status = 513 - DCE_I2C_TRANSACTION_STATUS_FAILED_NACK; 514 - break; 515 - case I2C_CHANNEL_OPERATION_TIMEOUT: 516 - dce_i2c_request->status = 517 - DCE_I2C_TRANSACTION_STATUS_FAILED_TIMEOUT; 518 - break; 519 - case I2C_CHANNEL_OPERATION_FAILED: 520 - dce_i2c_request->status = 521 - DCE_I2C_TRANSACTION_STATUS_FAILED_INCOMPLETE; 522 - break; 523 - default: 524 - dce_i2c_request->status = 525 - DCE_I2C_TRANSACTION_STATUS_FAILED_OPERATION; 526 - break; 527 - } 528 - } while (operation_result == I2C_CHANNEL_OPERATION_ENGINE_BUSY); 529 - } 530 - 531 - return operation_succeeded; 498 + return true; 532 499 } 533 500 bool dce_i2c_submit_command_sw( 534 501 struct resource_pool *pool, ··· 508 555 509 556 struct i2c_payload *payload = cmd->payloads + index_of_payload; 510 557 511 - struct dce_i2c_transaction_request request = { 0 }; 512 - 513 - request.operation = payload->write ? 514 - DCE_I2C_TRANSACTION_WRITE : 515 - DCE_I2C_TRANSACTION_READ; 516 - 517 - request.payload.address_space = 518 - DCE_I2C_TRANSACTION_ADDRESS_SPACE_I2C; 519 - request.payload.address = (payload->address << 1) | 520 - !payload->write; 521 - request.payload.length = payload->length; 522 - request.payload.data = payload->data; 523 - 524 - 525 - if (!dce_i2c_sw_engine_submit_request( 526 - dce_i2c_sw, &request, mot)) { 558 + if (!dce_i2c_sw_engine_submit_payload( 559 + dce_i2c_sw, payload, mot)) { 527 560 result = false; 528 561 break; 529 562 }