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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
phy: qcom-qmp-usb: replace FLL layout writes for msm8996
Other PHYs tables directly reference FLL registers without using
reglayout. Define corresponding registers to be used by msm8996 PHY
tables and use them directly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-28-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Dmitry Baryshkov
and committed by
Vinod Koul
d36e341a
9f2fd65f
+12
-45
-5
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
-5
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
···
122
122
QPHY_COM_PCS_READY_STATUS,
123
123
/* PCS registers */
124
124
QPHY_PLL_LOCK_CHK_DLY_TIME,
125
-
QPHY_FLL_CNTRL1,
126
-
QPHY_FLL_CNTRL2,
127
-
QPHY_FLL_CNT_VAL_L,
128
-
QPHY_FLL_CNT_VAL_H_TOL,
129
-
QPHY_FLL_MAN_CODE,
130
125
QPHY_SW_RESET,
131
126
QPHY_START_CTRL,
132
127
QPHY_PCS_READY_STATUS,
-10
drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
-10
drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
···
122
122
QPHY_COM_PCS_READY_STATUS,
123
123
/* PCS registers */
124
124
QPHY_PLL_LOCK_CHK_DLY_TIME,
125
-
QPHY_FLL_CNTRL1,
126
-
QPHY_FLL_CNTRL2,
127
-
QPHY_FLL_CNT_VAL_L,
128
-
QPHY_FLL_CNT_VAL_H_TOL,
129
-
QPHY_FLL_MAN_CODE,
130
125
QPHY_SW_RESET,
131
126
QPHY_START_CTRL,
132
127
QPHY_PCS_READY_STATUS,
···
142
147
[QPHY_COM_START_CONTROL] = 0x408,
143
148
[QPHY_COM_PCS_READY_STATUS] = 0x448,
144
149
[QPHY_PLL_LOCK_CHK_DLY_TIME] = 0xa8,
145
-
[QPHY_FLL_CNTRL1] = 0xc4,
146
-
[QPHY_FLL_CNTRL2] = 0xc8,
147
-
[QPHY_FLL_CNT_VAL_L] = 0xcc,
148
-
[QPHY_FLL_CNT_VAL_H_TOL] = 0xd0,
149
-
[QPHY_FLL_MAN_CODE] = 0xd4,
150
150
[QPHY_SW_RESET] = 0x00,
151
151
[QPHY_START_CTRL] = 0x08,
152
152
[QPHY_PCS_STATUS] = 0x174,
-10
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
-10
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
···
122
122
QPHY_COM_PCS_READY_STATUS,
123
123
/* PCS registers */
124
124
QPHY_PLL_LOCK_CHK_DLY_TIME,
125
-
QPHY_FLL_CNTRL1,
126
-
QPHY_FLL_CNTRL2,
127
-
QPHY_FLL_CNT_VAL_L,
128
-
QPHY_FLL_CNT_VAL_H_TOL,
129
-
QPHY_FLL_MAN_CODE,
130
125
QPHY_SW_RESET,
131
126
QPHY_START_CTRL,
132
127
QPHY_PCS_READY_STATUS,
···
149
154
[QPHY_COM_START_CONTROL] = 0x408,
150
155
[QPHY_COM_PCS_READY_STATUS] = 0x448,
151
156
[QPHY_PLL_LOCK_CHK_DLY_TIME] = 0xa8,
152
-
[QPHY_FLL_CNTRL1] = 0xc4,
153
-
[QPHY_FLL_CNTRL2] = 0xc8,
154
-
[QPHY_FLL_CNT_VAL_L] = 0xcc,
155
-
[QPHY_FLL_CNT_VAL_H_TOL] = 0xd0,
156
-
[QPHY_FLL_MAN_CODE] = 0xd4,
157
157
[QPHY_SW_RESET] = 0x00,
158
158
[QPHY_START_CTRL] = 0x08,
159
159
[QPHY_PCS_STATUS] = 0x174,
+7
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h
+7
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h
···
24
24
#define QPHY_V2_PCS_LOCK_DETECT_CONFIG3 0x088
25
25
#define QPHY_V2_PCS_PWRUP_RESET_DLY_TIME_AUXCLK 0x0a0
26
26
#define QPHY_V2_PCS_LP_WAKEUP_DLY_TIME_AUXCLK 0x0a4
27
+
#define QPHY_V2_PCS_FLL_CNTRL1 0x0c0
28
+
#define QPHY_V2_PCS_FLL_CNTRL2 0x0c4
29
+
#define QPHY_V2_PCS_FLL_CNT_VAL_L 0x0c8
30
+
#define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL 0x0cc
31
+
#define QPHY_V2_PCS_FLL_MAN_CODE 0x0d0
32
+
33
+
/* UFS only ? */
27
34
#define QPHY_V2_PCS_RX_MIN_STALL_NOCONFIG_TIME_CAP 0x0cc
28
35
#define QPHY_V2_PCS_RX_SYM_RESYNC_CTRL 0x13c
29
36
#define QPHY_V2_PCS_RX_MIN_HIBERN8_TIME 0x140
-5
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
-5
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
···
122
122
QPHY_COM_PCS_READY_STATUS,
123
123
/* PCS registers */
124
124
QPHY_PLL_LOCK_CHK_DLY_TIME,
125
-
QPHY_FLL_CNTRL1,
126
-
QPHY_FLL_CNTRL2,
127
-
QPHY_FLL_CNT_VAL_L,
128
-
QPHY_FLL_CNT_VAL_H_TOL,
129
-
QPHY_FLL_MAN_CODE,
130
125
QPHY_SW_RESET,
131
126
QPHY_START_CTRL,
132
127
QPHY_PCS_READY_STATUS,
+5
-15
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+5
-15
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
···
122
122
QPHY_COM_PCS_READY_STATUS,
123
123
/* PCS registers */
124
124
QPHY_PLL_LOCK_CHK_DLY_TIME,
125
-
QPHY_FLL_CNTRL1,
126
-
QPHY_FLL_CNTRL2,
127
-
QPHY_FLL_CNT_VAL_L,
128
-
QPHY_FLL_CNT_VAL_H_TOL,
129
-
QPHY_FLL_MAN_CODE,
130
125
QPHY_SW_RESET,
131
126
QPHY_START_CTRL,
132
127
QPHY_PCS_READY_STATUS,
···
137
142
};
138
143
139
144
static const unsigned int usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
140
-
[QPHY_FLL_CNTRL1] = 0xc0,
141
-
[QPHY_FLL_CNTRL2] = 0xc4,
142
-
[QPHY_FLL_CNT_VAL_L] = 0xc8,
143
-
[QPHY_FLL_CNT_VAL_H_TOL] = 0xcc,
144
-
[QPHY_FLL_MAN_CODE] = 0xd0,
145
145
[QPHY_SW_RESET] = 0x00,
146
146
[QPHY_START_CTRL] = 0x08,
147
147
[QPHY_PCS_STATUS] = 0x17c,
···
308
318
309
319
static const struct qmp_phy_init_tbl msm8996_usb3_pcs_tbl[] = {
310
320
/* FLL settings */
311
-
QMP_PHY_INIT_CFG_L(QPHY_FLL_CNTRL2, 0x03),
312
-
QMP_PHY_INIT_CFG_L(QPHY_FLL_CNTRL1, 0x02),
313
-
QMP_PHY_INIT_CFG_L(QPHY_FLL_CNT_VAL_L, 0x09),
314
-
QMP_PHY_INIT_CFG_L(QPHY_FLL_CNT_VAL_H_TOL, 0x42),
315
-
QMP_PHY_INIT_CFG_L(QPHY_FLL_MAN_CODE, 0x85),
321
+
QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_CNTRL2, 0x03),
322
+
QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_CNTRL1, 0x02),
323
+
QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_CNT_VAL_L, 0x09),
324
+
QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_CNT_VAL_H_TOL, 0x42),
325
+
QMP_PHY_INIT_CFG(QPHY_V2_PCS_FLL_MAN_CODE, 0x85),
316
326
317
327
/* Lock Det settings */
318
328
QMP_PHY_INIT_CFG(QPHY_V2_PCS_LOCK_DETECT_CONFIG1, 0xd1),