Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

crypto: aspeed - Remove non-standard sha512 algorithms

Algorithms must never be added to a driver unless there is a generic
implementation. These truncated versions of sha512 slipped through.
Remove them as they are useless.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

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drivers/crypto/aspeed/aspeed-hace-hash.c
··· 59 59 cpu_to_be64(SHA512_H6), cpu_to_be64(SHA512_H7) 60 60 }; 61 61 62 - static const __be32 sha512_224_iv[16] = { 63 - cpu_to_be32(0xC8373D8CUL), cpu_to_be32(0xA24D5419UL), 64 - cpu_to_be32(0x6699E173UL), cpu_to_be32(0xD6D4DC89UL), 65 - cpu_to_be32(0xAEB7FA1DUL), cpu_to_be32(0x829CFF32UL), 66 - cpu_to_be32(0x14D59D67UL), cpu_to_be32(0xCF9F2F58UL), 67 - cpu_to_be32(0x692B6D0FUL), cpu_to_be32(0xA84DD47BUL), 68 - cpu_to_be32(0x736FE377UL), cpu_to_be32(0x4289C404UL), 69 - cpu_to_be32(0xA8859D3FUL), cpu_to_be32(0xC8361D6AUL), 70 - cpu_to_be32(0xADE61211UL), cpu_to_be32(0xA192D691UL) 71 - }; 72 - 73 - static const __be32 sha512_256_iv[16] = { 74 - cpu_to_be32(0x94213122UL), cpu_to_be32(0x2CF72BFCUL), 75 - cpu_to_be32(0xA35F559FUL), cpu_to_be32(0xC2644CC8UL), 76 - cpu_to_be32(0x6BB89323UL), cpu_to_be32(0x51B1536FUL), 77 - cpu_to_be32(0x19773896UL), cpu_to_be32(0xBDEA4059UL), 78 - cpu_to_be32(0xE23E2896UL), cpu_to_be32(0xE3FF8EA8UL), 79 - cpu_to_be32(0x251E5EBEUL), cpu_to_be32(0x92398653UL), 80 - cpu_to_be32(0xFC99012BUL), cpu_to_be32(0xAAB8852CUL), 81 - cpu_to_be32(0xDC2DB70EUL), cpu_to_be32(0xA22CC581UL) 82 - }; 83 - 84 62 /* The purpose of this padding is to ensure that the padded message is a 85 63 * multiple of 512 bits (SHA1/SHA224/SHA256) or 1024 bits (SHA384/SHA512). 86 64 * The bit "1" is appended at the end of the message followed by ··· 743 765 return 0; 744 766 } 745 767 746 - static int aspeed_sha512s_init(struct ahash_request *req) 747 - { 748 - struct aspeed_sham_reqctx *rctx = ahash_request_ctx(req); 749 - struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 750 - struct aspeed_sham_ctx *tctx = crypto_ahash_ctx(tfm); 751 - struct aspeed_hace_dev *hace_dev = tctx->hace_dev; 752 - struct aspeed_sha_hmac_ctx *bctx = tctx->base; 753 - 754 - AHASH_DBG(hace_dev, "digest size: %d\n", crypto_ahash_digestsize(tfm)); 755 - 756 - rctx->cmd = HASH_CMD_ACC_MODE; 757 - rctx->flags = 0; 758 - 759 - switch (crypto_ahash_digestsize(tfm)) { 760 - case SHA224_DIGEST_SIZE: 761 - rctx->cmd |= HASH_CMD_SHA512_SER | HASH_CMD_SHA512_224 | 762 - HASH_CMD_SHA_SWAP; 763 - rctx->flags |= SHA_FLAGS_SHA512_224; 764 - rctx->digsize = SHA224_DIGEST_SIZE; 765 - rctx->block_size = SHA512_BLOCK_SIZE; 766 - rctx->sha_iv = sha512_224_iv; 767 - rctx->ivsize = 64; 768 - memcpy(rctx->digest, sha512_224_iv, rctx->ivsize); 769 - break; 770 - case SHA256_DIGEST_SIZE: 771 - rctx->cmd |= HASH_CMD_SHA512_SER | HASH_CMD_SHA512_256 | 772 - HASH_CMD_SHA_SWAP; 773 - rctx->flags |= SHA_FLAGS_SHA512_256; 774 - rctx->digsize = SHA256_DIGEST_SIZE; 775 - rctx->block_size = SHA512_BLOCK_SIZE; 776 - rctx->sha_iv = sha512_256_iv; 777 - rctx->ivsize = 64; 778 - memcpy(rctx->digest, sha512_256_iv, rctx->ivsize); 779 - break; 780 - default: 781 - dev_warn(tctx->hace_dev->dev, "digest size %d not support\n", 782 - crypto_ahash_digestsize(tfm)); 783 - return -EINVAL; 784 - } 785 - 786 - rctx->bufcnt = 0; 787 - rctx->total = 0; 788 - rctx->digcnt[0] = 0; 789 - rctx->digcnt[1] = 0; 790 - 791 - /* HMAC init */ 792 - if (tctx->flags & SHA_FLAGS_HMAC) { 793 - rctx->digcnt[0] = rctx->block_size; 794 - rctx->bufcnt = rctx->block_size; 795 - memcpy(rctx->buffer, bctx->ipad, rctx->block_size); 796 - rctx->flags |= SHA_FLAGS_HMAC; 797 - } 798 - 799 - return 0; 800 - } 801 - 802 768 static int aspeed_sham_digest(struct ahash_request *req) 803 769 { 804 770 return aspeed_sham_init(req) ? : aspeed_sham_finup(req); ··· 1118 1196 }, 1119 1197 }, 1120 1198 { 1121 - .alg.ahash.base = { 1122 - .init = aspeed_sha512s_init, 1123 - .update = aspeed_sham_update, 1124 - .final = aspeed_sham_final, 1125 - .finup = aspeed_sham_finup, 1126 - .digest = aspeed_sham_digest, 1127 - .export = aspeed_sham_export, 1128 - .import = aspeed_sham_import, 1129 - .halg = { 1130 - .digestsize = SHA224_DIGEST_SIZE, 1131 - .statesize = sizeof(struct aspeed_sham_reqctx), 1132 - .base = { 1133 - .cra_name = "sha512_224", 1134 - .cra_driver_name = "aspeed-sha512_224", 1135 - .cra_priority = 300, 1136 - .cra_flags = CRYPTO_ALG_TYPE_AHASH | 1137 - CRYPTO_ALG_ASYNC | 1138 - CRYPTO_ALG_KERN_DRIVER_ONLY, 1139 - .cra_blocksize = SHA512_BLOCK_SIZE, 1140 - .cra_ctxsize = sizeof(struct aspeed_sham_ctx), 1141 - .cra_alignmask = 0, 1142 - .cra_module = THIS_MODULE, 1143 - .cra_init = aspeed_sham_cra_init, 1144 - .cra_exit = aspeed_sham_cra_exit, 1145 - } 1146 - } 1147 - }, 1148 - .alg.ahash.op = { 1149 - .do_one_request = aspeed_ahash_do_one, 1150 - }, 1151 - }, 1152 - { 1153 - .alg.ahash.base = { 1154 - .init = aspeed_sha512s_init, 1155 - .update = aspeed_sham_update, 1156 - .final = aspeed_sham_final, 1157 - .finup = aspeed_sham_finup, 1158 - .digest = aspeed_sham_digest, 1159 - .export = aspeed_sham_export, 1160 - .import = aspeed_sham_import, 1161 - .halg = { 1162 - .digestsize = SHA256_DIGEST_SIZE, 1163 - .statesize = sizeof(struct aspeed_sham_reqctx), 1164 - .base = { 1165 - .cra_name = "sha512_256", 1166 - .cra_driver_name = "aspeed-sha512_256", 1167 - .cra_priority = 300, 1168 - .cra_flags = CRYPTO_ALG_TYPE_AHASH | 1169 - CRYPTO_ALG_ASYNC | 1170 - CRYPTO_ALG_KERN_DRIVER_ONLY, 1171 - .cra_blocksize = SHA512_BLOCK_SIZE, 1172 - .cra_ctxsize = sizeof(struct aspeed_sham_ctx), 1173 - .cra_alignmask = 0, 1174 - .cra_module = THIS_MODULE, 1175 - .cra_init = aspeed_sham_cra_init, 1176 - .cra_exit = aspeed_sham_cra_exit, 1177 - } 1178 - } 1179 - }, 1180 - .alg.ahash.op = { 1181 - .do_one_request = aspeed_ahash_do_one, 1182 - }, 1183 - }, 1184 - { 1185 1199 .alg_base = "sha384", 1186 1200 .alg.ahash.base = { 1187 1201 .init = aspeed_sham_init, ··· 1169 1311 .base = { 1170 1312 .cra_name = "hmac(sha512)", 1171 1313 .cra_driver_name = "aspeed-hmac-sha512", 1172 - .cra_priority = 300, 1173 - .cra_flags = CRYPTO_ALG_TYPE_AHASH | 1174 - CRYPTO_ALG_ASYNC | 1175 - CRYPTO_ALG_KERN_DRIVER_ONLY, 1176 - .cra_blocksize = SHA512_BLOCK_SIZE, 1177 - .cra_ctxsize = sizeof(struct aspeed_sham_ctx) + 1178 - sizeof(struct aspeed_sha_hmac_ctx), 1179 - .cra_alignmask = 0, 1180 - .cra_module = THIS_MODULE, 1181 - .cra_init = aspeed_sham_cra_init, 1182 - .cra_exit = aspeed_sham_cra_exit, 1183 - } 1184 - } 1185 - }, 1186 - .alg.ahash.op = { 1187 - .do_one_request = aspeed_ahash_do_one, 1188 - }, 1189 - }, 1190 - { 1191 - .alg_base = "sha512_224", 1192 - .alg.ahash.base = { 1193 - .init = aspeed_sha512s_init, 1194 - .update = aspeed_sham_update, 1195 - .final = aspeed_sham_final, 1196 - .finup = aspeed_sham_finup, 1197 - .digest = aspeed_sham_digest, 1198 - .setkey = aspeed_sham_setkey, 1199 - .export = aspeed_sham_export, 1200 - .import = aspeed_sham_import, 1201 - .halg = { 1202 - .digestsize = SHA224_DIGEST_SIZE, 1203 - .statesize = sizeof(struct aspeed_sham_reqctx), 1204 - .base = { 1205 - .cra_name = "hmac(sha512_224)", 1206 - .cra_driver_name = "aspeed-hmac-sha512_224", 1207 - .cra_priority = 300, 1208 - .cra_flags = CRYPTO_ALG_TYPE_AHASH | 1209 - CRYPTO_ALG_ASYNC | 1210 - CRYPTO_ALG_KERN_DRIVER_ONLY, 1211 - .cra_blocksize = SHA512_BLOCK_SIZE, 1212 - .cra_ctxsize = sizeof(struct aspeed_sham_ctx) + 1213 - sizeof(struct aspeed_sha_hmac_ctx), 1214 - .cra_alignmask = 0, 1215 - .cra_module = THIS_MODULE, 1216 - .cra_init = aspeed_sham_cra_init, 1217 - .cra_exit = aspeed_sham_cra_exit, 1218 - } 1219 - } 1220 - }, 1221 - .alg.ahash.op = { 1222 - .do_one_request = aspeed_ahash_do_one, 1223 - }, 1224 - }, 1225 - { 1226 - .alg_base = "sha512_256", 1227 - .alg.ahash.base = { 1228 - .init = aspeed_sha512s_init, 1229 - .update = aspeed_sham_update, 1230 - .final = aspeed_sham_final, 1231 - .finup = aspeed_sham_finup, 1232 - .digest = aspeed_sham_digest, 1233 - .setkey = aspeed_sham_setkey, 1234 - .export = aspeed_sham_export, 1235 - .import = aspeed_sham_import, 1236 - .halg = { 1237 - .digestsize = SHA256_DIGEST_SIZE, 1238 - .statesize = sizeof(struct aspeed_sham_reqctx), 1239 - .base = { 1240 - .cra_name = "hmac(sha512_256)", 1241 - .cra_driver_name = "aspeed-hmac-sha512_256", 1242 1314 .cra_priority = 300, 1243 1315 .cra_flags = CRYPTO_ALG_TYPE_AHASH | 1244 1316 CRYPTO_ALG_ASYNC |