drm/xe: Fix devcoredump readout of IPEHR

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

It was reading (base) + 0x8c but that is not a valid register
and instead it should read (base) + 0x68.
So here reading the correct register and removing the wrong and
duplicated.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

authored by

José Roberto de Souza and committed by

Rodrigo Vivi 2 years ago d32c49e3 f24cf6ce

+1 -2

2 changed files

expand all

drivers

gpu

drm

regs

xe_engine_regs.h

xe_hw_engine.c

-1

drivers/gpu/drm/xe/regs/xe_engine_regs.h

··· 37 37 #define RING_DMA_FADD(base) XE_REG((base) + 0x78) 38 38 #define RING_HWS_PGA(base) XE_REG((base) + 0x80) 39 39 #define IPEIR(base) XE_REG((base) + 0x88) 40 - #define IPEHR(base) XE_REG((base) + 0x8c) 41 40 #define RING_HWSTAM(base) XE_REG((base) + 0x98) 42 41 #define RING_MI_MODE(base) XE_REG((base) + 0x9c) 43 42 #define RING_NOPID(base) XE_REG((base) + 0x94)

+1 -1

drivers/gpu/drm/xe/xe_hw_engine.c

··· 728 728 snapshot->reg.ring_dma_fadd = 729 729 hw_engine_mmio_read32(hwe, RING_DMA_FADD(0)); 730 730 snapshot->reg.ipeir = hw_engine_mmio_read32(hwe, IPEIR(0)); 731 - snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, IPEHR(0)); 731 + snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, RING_IPEHR(0)); 732 732 733 733 if (snapshot->class == XE_ENGINE_CLASS_COMPUTE) 734 734 snapshot->reg.rcu_mode = xe_mmio_read32(hwe->gt, RCU_MODE);