Staging: et131x: Fix 2.6.33rc1 regression in et131x

et131x: Fix 12bit wrapping

From: Alan Cox <[e-mail]>

The 12bit wrap logic conversion is wrong and this shows up for some
memory sizes and layouts of card. Patch it up for now, once the kernel
view of status is cleaned up it'll become two variables and a lot saner.

Signed-off-by: Alan Cox <[e-mail]>
Cc: stable <[e-mail]>
Signed-off-by: Greg Kroah-Hartman <[e-mail]>

drivers/staging/et131x/et1310_address_map.h

···
  * 9-0: pr ndes
  */
 
-#define ET_DMA10_MASK		0x3FF	/* 10 bit mask for DMA10W types */
-#define ET_DMA10_WRAP		0x400
-#define ET_DMA4_MASK		0x00F	/* 4 bit mask for DMA4W types */
-#define ET_DMA4_WRAP		0x010
+#define ET_DMA12_MASK		0x0FFF	/* 12 bit mask for DMA12W types */
+#define ET_DMA12_WRAP		0x1000
+#define ET_DMA10_MASK		0x03FF	/* 10 bit mask for DMA10W types */
+#define ET_DMA10_WRAP		0x0400
+#define ET_DMA4_MASK		0x000F	/* 4 bit mask for DMA4W types */
+#define ET_DMA4_WRAP		0x0010
 
+#define INDEX12(x)	((x) & ET_DMA12_MASK)
 #define INDEX10(x)	((x) & ET_DMA10_MASK)
 #define INDEX4(x)	((x) & ET_DMA4_MASK)
 
 extern inline void add_10bit(u32 *v, int n)
 {
 	*v = INDEX10(*v + n) | (*v & ET_DMA10_WRAP);
+}
+
+extern inline void add_12bit(u32 *v, int n)
+{
+	*v = INDEX12(*v + n) | (*v & ET_DMA12_WRAP);
 }
 
 /*

drivers/staging/et131x/et1310_rx.c

···
 
 	/* Indicate that we have used this PSR entry. */
 	/* FIXME wrap 12 */
-	rx_local->local_psr_full = (rx_local->local_psr_full + 1) & 0xFFF;
-	if (rx_local->local_psr_full  > rx_local->PsrNumEntries - 1) {
+	add_12bit(&rx_local->local_psr_full, 1);
+	if ((rx_local->local_psr_full & 0xFFF)  > rx_local->PsrNumEntries - 1) {
 		/* Clear psr full and toggle the wrap bit */
-		rx_local->local_psr_full &=  0xFFF;
+		rx_local->local_psr_full &=  ~0xFFF;
 		rx_local->local_psr_full ^= 0x1000;
 	}