···673673 u8 tmp;674674675675 /* power up the sink */676676- if (dp_info->dpcd[0] >= 0x11)676676+ if (dp_info->dpcd[0] >= 0x11) {677677 radeon_write_dpcd_reg(dp_info->radeon_connector,678678 DP_SET_POWER, DP_SET_POWER_D0);679679+ usleep_range(1000, 2000);680680+ }679681680682 /* possibly enable downspread on the sink */681683 if (dp_info->dpcd[3] & 0x1)