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linux
ARM: dts: imx: add initial imx6sx-sdb board support
Add initial imx6sx-sdb board support with limited devices enabled.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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arch/arm/boot/dts/Makefile
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arch/arm/boot/dts/Makefile
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arch/arm/boot/dts/imx6sx-sdb.dts
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arch/arm/boot/dts/imx6sx-sdb.dts
···
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/*
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* Copyright (C) 2014 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "imx6sx.dtsi"
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/ {
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model = "Freescale i.MX6 SoloX SDB Board";
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compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
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chosen {
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stdout-path = &uart1;
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};
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memory {
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reg = <0x80000000 0x40000000>;
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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vcc_sd3: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_vcc_sd3>;
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regulator-name = "VCC_SD3";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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phy-mode = "rgmii";
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart5 { /* for bluetooth */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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non-removable;
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no-1-8-v;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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bus-width = <8>;
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cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
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wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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vmmc-supply = <&vcc_sd3>;
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status = "okay";
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};
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&usdhc4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4>;
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cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
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wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&iomuxc {
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imx6x-sdb {
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
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MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
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MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1
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MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
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MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
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MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
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MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
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MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
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MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
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MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
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MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
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MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
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MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
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MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
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>;
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};
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pinctrl_vcc_sd3: vccsd3grp {
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fsl,pins = <
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MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
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MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
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>;
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};
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pinctrl_uart5: uart5grp {
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fsl,pins = <
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MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
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MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
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MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
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MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
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MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
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MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
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MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
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MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
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MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
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MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
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MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
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MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
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MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
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MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
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MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
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MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
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MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
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MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
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MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
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MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
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fsl,pins = <
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MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
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MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
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MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
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MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
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MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
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MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
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MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
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MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
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MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
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MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
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fsl,pins = <
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MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
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MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
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MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
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MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
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MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
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MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
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MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
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MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
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MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
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MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
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>;
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};
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pinctrl_usdhc4: usdhc4grp {
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fsl,pins = <
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MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
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MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
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MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
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MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
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MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
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MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
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MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
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MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
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>;
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};
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};
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};