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[IA64] Sanitize assembler code for ia64_sal_os_state

struct ia64_sal_os_state has three semi-independent sections. The code
in mca_asm.S assumes that these three sections are contiguous, which
makes it very awkward to add new data to this structure. Remove the
assumption that the sections are contiguous. Define a macro to shorten
references to offsets in ia64_sal_os_state.

This patch does not change the way that the code behaves. It just
makes it easier to update the code in future and to add fields to
ia64_sal_os_state when debugging the MCA/INIT handlers.

Signed-off-by: Keith Owens <kaos@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

authored by

Keith Owens and committed by
Tony Luck d270acbc b7bb575c

+36 -18
+12 -4
arch/ia64/kernel/asm-offsets.c
··· 217 217 DEFINE(IA64_MCA_CPU_INIT_STACK_OFFSET, 218 218 offsetof (struct ia64_mca_cpu, init_stack)); 219 219 BLANK(); 220 - DEFINE(IA64_SAL_OS_STATE_COMMON_OFFSET, 221 - offsetof (struct ia64_sal_os_state, sal_ra)); 222 220 DEFINE(IA64_SAL_OS_STATE_OS_GP_OFFSET, 223 221 offsetof (struct ia64_sal_os_state, os_gp)); 224 - DEFINE(IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET, 225 - offsetof (struct ia64_sal_os_state, pal_min_state)); 226 222 DEFINE(IA64_SAL_OS_STATE_PROC_STATE_PARAM_OFFSET, 227 223 offsetof (struct ia64_sal_os_state, proc_state_param)); 224 + DEFINE(IA64_SAL_OS_STATE_SAL_RA_OFFSET, 225 + offsetof (struct ia64_sal_os_state, sal_ra)); 226 + DEFINE(IA64_SAL_OS_STATE_SAL_GP_OFFSET, 227 + offsetof (struct ia64_sal_os_state, sal_gp)); 228 + DEFINE(IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET, 229 + offsetof (struct ia64_sal_os_state, pal_min_state)); 230 + DEFINE(IA64_SAL_OS_STATE_OS_STATUS_OFFSET, 231 + offsetof (struct ia64_sal_os_state, os_status)); 232 + DEFINE(IA64_SAL_OS_STATE_CONTEXT_OFFSET, 233 + offsetof (struct ia64_sal_os_state, context)); 228 234 DEFINE(IA64_SAL_OS_STATE_SIZE, 229 235 sizeof (struct ia64_sal_os_state)); 236 + BLANK(); 237 + 230 238 DEFINE(IA64_PMSA_GR_OFFSET, 231 239 offsetof (struct pal_min_state_area_s, pmsa_gr)); 232 240 DEFINE(IA64_PMSA_BANK1_GR_OFFSET,
+1
arch/ia64/kernel/entry.h
··· 23 23 24 24 #define PT(f) (IA64_PT_REGS_##f##_OFFSET) 25 25 #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET) 26 + #define SOS(f) (IA64_SAL_OS_STATE_##f##_OFFSET) 26 27 27 28 #define PT_REGS_SAVES(off) \ 28 29 .unwabi 3, 'i'; \
+17 -11
arch/ia64/kernel/mca_asm.S
··· 159 159 GET_IA64_MCA_DATA(r2) 160 160 // Using MCA stack, struct ia64_sal_os_state, variable proc_state_param 161 161 ;; 162 - add r3=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET+IA64_SAL_OS_STATE_PROC_STATE_PARAM_OFFSET, r2 162 + add r3=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET+SOS(PROC_STATE_PARAM), r2 163 163 ;; 164 164 ld8 r18=[r3] // Get processor state parameter on existing PALE_CHECK. 165 165 ;; ··· 479 479 st8 [temp2]=r11,16 // rv_rc 480 480 mov r11=cr.iipa 481 481 ;; 482 - st8 [temp1]=r18,16 // proc_state_param 483 - st8 [temp2]=r19,16 // monarch 482 + st8 [temp1]=r18 // proc_state_param 483 + st8 [temp2]=r19 // monarch 484 484 mov r6=IA64_KR(CURRENT) 485 + add temp1=SOS(SAL_RA), regs 486 + add temp2=SOS(SAL_GP), regs 485 487 ;; 486 488 st8 [temp1]=r12,16 // sal_ra 487 489 st8 [temp2]=r10,16 // sal_gp ··· 505 503 st8 [temp2]=r11,16 // cr.iipa 506 504 mov r12=cr.iim 507 505 ;; 508 - st8 [temp1]=r12,16 // cr.iim 506 + st8 [temp1]=r12 // cr.iim 509 507 (p1) mov r12=IA64_MCA_COLD_BOOT 510 508 (p2) mov r12=IA64_INIT_WARM_BOOT 511 509 mov r6=cr.iha 510 + add temp1=SOS(OS_STATUS), regs 512 511 ;; 513 - st8 [temp2]=r6,16 // cr.iha 512 + st8 [temp2]=r6 // cr.iha 513 + add temp2=SOS(CONTEXT), regs 514 514 st8 [temp1]=r12 // os_status, default is cold boot 515 515 mov r6=IA64_MCA_SAME_CONTEXT 516 516 ;; ··· 824 820 // Restore the SAL to OS state. The previous code left regs at pt_regs. 825 821 add regs=MCA_SOS_OFFSET-MCA_PT_REGS_OFFSET, regs 826 822 ;; 827 - add temp1=IA64_SAL_OS_STATE_COMMON_OFFSET, regs 828 - add temp2=IA64_SAL_OS_STATE_COMMON_OFFSET+8, regs 823 + add temp1=SOS(SAL_RA), regs 824 + add temp2=SOS(SAL_GP), regs 829 825 ;; 830 826 ld8 r12=[temp1],16 // sal_ra 831 827 ld8 r9=[temp2],16 // sal_gp ··· 846 842 ;; 847 843 mov cr.itir=temp3 848 844 mov cr.iipa=temp4 849 - ld8 temp3=[temp1],16 // cr.iim 850 - ld8 temp4=[temp2],16 // cr.iha 845 + ld8 temp3=[temp1] // cr.iim 846 + ld8 temp4=[temp2] // cr.iha 847 + add temp1=SOS(OS_STATUS), regs 848 + add temp2=SOS(CONTEXT), regs 851 849 ;; 852 850 mov cr.iim=temp3 853 851 mov cr.iha=temp4 ··· 922 916 923 917 ia64_new_stack: 924 918 add regs=MCA_PT_REGS_OFFSET, r3 925 - add temp2=MCA_SOS_OFFSET+IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET, r3 919 + add temp2=MCA_SOS_OFFSET+SOS(PAL_MIN_STATE), r3 926 920 mov b0=r2 // save return address 927 921 GET_IA64_MCA_DATA(temp1) 928 922 invala ··· 1026 1020 1027 1021 ia64_set_kernel_registers: 1028 1022 add temp3=MCA_SP_OFFSET, r3 1029 - add temp4=MCA_SOS_OFFSET+IA64_SAL_OS_STATE_OS_GP_OFFSET, r3 1023 + add temp4=MCA_SOS_OFFSET+SOS(OS_GP), r3 1030 1024 mov b0=r2 // save return address 1031 1025 GET_IA64_MCA_DATA(temp1) 1032 1026 ;;
+6 -3
include/asm-ia64/mca.h
··· 69 69 */ 70 70 71 71 struct ia64_sal_os_state { 72 - /* SAL to OS, must be at offset 0 */ 72 + 73 + /* SAL to OS */ 73 74 u64 os_gp; /* GP of the os registered with the SAL, physical */ 74 75 u64 pal_proc; /* PAL_PROC entry point, physical */ 75 76 u64 sal_proc; /* SAL_PROC entry point, physical */ 76 77 u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */ 77 78 u64 proc_state_param; /* from R18 */ 78 79 u64 monarch; /* 1 for a monarch event, 0 for a slave */ 79 - /* common, must follow SAL to OS */ 80 + 81 + /* common */ 80 82 u64 sal_ra; /* Return address in SAL, physical */ 81 83 u64 sal_gp; /* GP of the SAL - physical */ 82 84 pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */ ··· 100 98 u64 iipa; 101 99 u64 iim; 102 100 u64 iha; 103 - /* OS to SAL, must follow common */ 101 + 102 + /* OS to SAL */ 104 103 u64 os_status; /* OS status to SAL, enum below */ 105 104 u64 context; /* 0 if return to same context 106 105 1 if return to new context */