hwmon: (nct6775) Monitor additional temperature registers

The number of SMIOVT registers on NCT6779 and NCT6791 is limited to 2.
As result, the driver may not report some of the temperatures used
for fan control. This can result in some of the pwmX_temp_sel or
pwm2_weight_temp_sel attributes to wrongly return 0.
Fortunately, the chip has registers to monitor those temperatures.
Add them to the list of temperatures to report.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>

+60 -2
+60 -2
drivers/hwmon/nct6775.c
··· 274 static const u16 NCT6775_REG_TEMP[] = { 275 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d }; 276 277 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 278 0, 0x152, 0x252, 0x628, 0x629, 0x62A }; 279 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = { ··· 456 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 }; 457 458 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 }; 459 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 460 0x18, 0x152 }; 461 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = { ··· 537 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 }; 538 539 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }; 540 static const u16 NCT6106_REG_TEMP_HYST[] = { 541 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 }; 542 static const u16 NCT6106_REG_TEMP_OVER[] = { ··· 3257 int i, s, err = 0; 3258 int src, mask, available; 3259 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config; 3260 - const u16 *reg_temp_alternate, *reg_temp_crit; 3261 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL; 3262 - int num_reg_temp; 3263 u8 cr2a; 3264 struct attribute_group *group; 3265 struct device *hwmon_dev; ··· 3342 data->BEEP_BITS = NCT6106_BEEP_BITS; 3343 3344 reg_temp = NCT6106_REG_TEMP; 3345 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3346 reg_temp_over = NCT6106_REG_TEMP_OVER; 3347 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3348 reg_temp_config = NCT6106_REG_TEMP_CONFIG; ··· 3416 data->REG_BEEP = NCT6775_REG_BEEP; 3417 3418 reg_temp = NCT6775_REG_TEMP; 3419 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3420 reg_temp_over = NCT6775_REG_TEMP_OVER; 3421 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3422 reg_temp_config = NCT6775_REG_TEMP_CONFIG; ··· 3488 data->REG_BEEP = NCT6776_REG_BEEP; 3489 3490 reg_temp = NCT6775_REG_TEMP; 3491 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3492 reg_temp_over = NCT6775_REG_TEMP_OVER; 3493 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3494 reg_temp_config = NCT6776_REG_TEMP_CONFIG; ··· 3564 data->REG_BEEP = NCT6776_REG_BEEP; 3565 3566 reg_temp = NCT6779_REG_TEMP; 3567 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3568 reg_temp_over = NCT6779_REG_TEMP_OVER; 3569 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3570 reg_temp_config = NCT6779_REG_TEMP_CONFIG; ··· 3640 data->REG_BEEP = NCT6776_REG_BEEP; 3641 3642 reg_temp = NCT6779_REG_TEMP; 3643 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3644 reg_temp_over = NCT6779_REG_TEMP_OVER; 3645 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3646 reg_temp_config = NCT6779_REG_TEMP_CONFIG; ··· 3739 if (reg_temp_crit_l && reg_temp_crit_l[i]) 3740 data->reg_temp[4][s] = reg_temp_crit_l[i]; 3741 3742 data->temp_src[s] = src; 3743 s++; 3744 }
··· 274 static const u16 NCT6775_REG_TEMP[] = { 275 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d }; 276 277 + static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 }; 278 + 279 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 280 0, 0x152, 0x252, 0x628, 0x629, 0x62A }; 281 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = { ··· 454 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 }; 455 456 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 }; 457 + static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b }; 458 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 459 0x18, 0x152 }; 460 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = { ··· 534 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 }; 535 536 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }; 537 + static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a }; 538 static const u16 NCT6106_REG_TEMP_HYST[] = { 539 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 }; 540 static const u16 NCT6106_REG_TEMP_OVER[] = { ··· 3253 int i, s, err = 0; 3254 int src, mask, available; 3255 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config; 3256 + const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit; 3257 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL; 3258 + int num_reg_temp, num_reg_temp_mon; 3259 u8 cr2a; 3260 struct attribute_group *group; 3261 struct device *hwmon_dev; ··· 3338 data->BEEP_BITS = NCT6106_BEEP_BITS; 3339 3340 reg_temp = NCT6106_REG_TEMP; 3341 + reg_temp_mon = NCT6106_REG_TEMP_MON; 3342 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3343 + num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3344 reg_temp_over = NCT6106_REG_TEMP_OVER; 3345 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3346 reg_temp_config = NCT6106_REG_TEMP_CONFIG; ··· 3410 data->REG_BEEP = NCT6775_REG_BEEP; 3411 3412 reg_temp = NCT6775_REG_TEMP; 3413 + reg_temp_mon = NCT6775_REG_TEMP_MON; 3414 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3415 + num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3416 reg_temp_over = NCT6775_REG_TEMP_OVER; 3417 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3418 reg_temp_config = NCT6775_REG_TEMP_CONFIG; ··· 3480 data->REG_BEEP = NCT6776_REG_BEEP; 3481 3482 reg_temp = NCT6775_REG_TEMP; 3483 + reg_temp_mon = NCT6775_REG_TEMP_MON; 3484 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3485 + num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3486 reg_temp_over = NCT6775_REG_TEMP_OVER; 3487 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3488 reg_temp_config = NCT6776_REG_TEMP_CONFIG; ··· 3554 data->REG_BEEP = NCT6776_REG_BEEP; 3555 3556 reg_temp = NCT6779_REG_TEMP; 3557 + reg_temp_mon = NCT6779_REG_TEMP_MON; 3558 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3559 + num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3560 reg_temp_over = NCT6779_REG_TEMP_OVER; 3561 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3562 reg_temp_config = NCT6779_REG_TEMP_CONFIG; ··· 3628 data->REG_BEEP = NCT6776_REG_BEEP; 3629 3630 reg_temp = NCT6779_REG_TEMP; 3631 + reg_temp_mon = NCT6779_REG_TEMP_MON; 3632 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3633 + num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3634 reg_temp_over = NCT6779_REG_TEMP_OVER; 3635 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3636 reg_temp_config = NCT6779_REG_TEMP_CONFIG; ··· 3725 if (reg_temp_crit_l && reg_temp_crit_l[i]) 3726 data->reg_temp[4][s] = reg_temp_crit_l[i]; 3727 3728 + data->temp_src[s] = src; 3729 + s++; 3730 + } 3731 + 3732 + /* 3733 + * Repeat with temperatures used for fan control. 3734 + * This set of registers does not support limits. 3735 + */ 3736 + for (i = 0; i < num_reg_temp_mon; i++) { 3737 + if (reg_temp_mon[i] == 0) 3738 + continue; 3739 + 3740 + src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f; 3741 + if (!src || (mask & (1 << src))) 3742 + continue; 3743 + 3744 + if (src >= data->temp_label_num || 3745 + !strlen(data->temp_label[src])) { 3746 + dev_info(dev, 3747 + "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 3748 + src, i, data->REG_TEMP_SEL[i], 3749 + reg_temp_mon[i]); 3750 + continue; 3751 + } 3752 + 3753 + mask |= 1 << src; 3754 + 3755 + /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 3756 + if (src <= data->temp_fixed_num) { 3757 + if (data->have_temp & (1 << (src - 1))) 3758 + continue; 3759 + data->have_temp |= 1 << (src - 1); 3760 + data->have_temp_fixed |= 1 << (src - 1); 3761 + data->reg_temp[0][src - 1] = reg_temp_mon[i]; 3762 + data->temp_src[src - 1] = src; 3763 + continue; 3764 + } 3765 + 3766 + if (s >= NUM_TEMP) 3767 + continue; 3768 + 3769 + /* Use dynamic index for other sources */ 3770 + data->have_temp |= 1 << s; 3771 + data->reg_temp[0][s] = reg_temp_mon[i]; 3772 data->temp_src[s] = src; 3773 s++; 3774 }