Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

MIPS: Octeon: Add PCIe2 support in arch_setup_msi_irq()

In arch_setup_msi_irq(), there is no case for PCIe2. So board which have PCIe2 functionality
fails to boot with "Kernel panic - not syncing: arch_setup_msi_irq: Invalid octeon_dma_bar_type"
message. This patch solve this problem.

Signed-off-by: Eunbong Song <eunb.song@samsung.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/6747/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Eunbong Song and committed by
Ralf Baechle
d19648d7 b8bca000

+6
+6
arch/mips/pci/msi-octeon.c
··· 15 15 #include <asm/octeon/cvmx-npi-defs.h> 16 16 #include <asm/octeon/cvmx-pci-defs.h> 17 17 #include <asm/octeon/cvmx-npei-defs.h> 18 + #include <asm/octeon/cvmx-sli-defs.h> 18 19 #include <asm/octeon/cvmx-pexp-defs.h> 19 20 #include <asm/octeon/pci-octeon.h> 20 21 ··· 162 161 /* FIXME CVMX_NPEI_MSI_RCV* other than 0? */ 163 162 msg.address_lo = (0 + CVMX_NPEI_PCIE_MSI_RCV) & 0xffffffff; 164 163 msg.address_hi = (0 + CVMX_NPEI_PCIE_MSI_RCV) >> 32; 164 + break; 165 + case OCTEON_DMA_BAR_TYPE_PCIE2: 166 + /* When using PCIe2, Bar 0 is based at 0 */ 167 + msg.address_lo = (0 + CVMX_SLI_PCIE_MSI_RCV) & 0xffffffff; 168 + msg.address_hi = (0 + CVMX_SLI_PCIE_MSI_RCV) >> 32; 165 169 break; 166 170 default: 167 171 panic("arch_setup_msi_irq: Invalid octeon_dma_bar_type");