tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
iio: adc: Add PMIC7 ADC bindings
Add documentation for PMIC7 ADC peripheral.
For the PMIC7-type PMICs, ADC peripheral is present in HW for the
following PMICs: PMK8350, PM8350, PM8350b, PMR735a and PMR735b.
Of these, only the ADC peripheral on PMK8350 is exposed directly to SW.
If SW needs to communicate with ADCs on other PMICs, it specifies the
PMIC to PMK8350 through the newly added SID register and communication
between PMK8350 ADC and other PMIC ADCs is carried out through
PBS(Programmable Boot Sequence) at the firmware level.
In addition, add definitions for ADC channels and virtual channel
definitions (combination of ADC channel number and PMIC SID number)
per PMIC, to be used by ADC clients for PMIC7.
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
Jishnu Prakash
and committed by
Jonathan Cameron
d1492bbd
5a471662
+366
-7
+32
-6
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml
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-6
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml
···
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description: |
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SPMI PMIC voltage ADC (VADC) provides interface to clients to read
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voltage. The VADC is a 15-bit sigma-delta ADC.
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-
SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read
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SPMI PMIC5/PMIC7 voltage ADC (ADC) provides interface to clients to read
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voltage. The VADC is a 16-bit sigma-delta ADC.
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properties:
···
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- qcom,spmi-vadc
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- qcom,spmi-adc5
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- qcom,spmi-adc-rev2
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- qcom,spmi-adc7
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reg:
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description: VADC base address in the SPMI PMIC register map
···
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description: |
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ADC channel number.
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See include/dt-bindings/iio/qcom,spmi-vadc.h
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For PMIC7 ADC, the channel numbers are specified separately per PMIC
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in the PMIC-specific files in include/dt-bindings/iio/.
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label:
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$ref: /schemas/types.yaml#/definitions/string
···
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channel calibration. If property is not found, channel will be
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calibrated with 0.625V and 1.25V reference channels, also
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known as absolute calibration.
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- For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2",
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if this property is specified VADC will use the VDD reference (1.875V)
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and GND for channel calibration. If property is not found, channel
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-
will be calibrated with 0V and 1.25V reference channels, also known
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as absolute calibration.
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- For compatible property "qcom,spmi-adc5", "qcom,spmi-adc7" and
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"qcom,spmi-adc-rev2", if this property is specified VADC will use
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the VDD reference (1.875V) and GND for channel calibration. If
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property is not found, channel will be calibrated with 0V and 1.25V
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reference channels, also known as absolute calibration.
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type: boolean
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qcom,hw-settle-time:
···
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qcom,hw-settle-time:
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enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2,
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4, 6, 8, 10, 16, 32, 64, 128 ]
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default: 15
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qcom,avg-samples:
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enum: [ 1, 2, 4, 8, 16 ]
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default: 1
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- if:
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properties:
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compatible:
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contains:
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const: qcom,spmi-adc7
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then:
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patternProperties:
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"^.*@[0-9a-f]+$":
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properties:
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qcom,decimation:
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enum: [ 85, 340, 1360 ]
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default: 1360
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qcom,hw-settle-time:
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enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000,
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8000, 16000, 32000, 64000, 128000 ]
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default: 15
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qcom,avg-samples:
+67
include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
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include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
···
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
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#ifndef PM8350_SID
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#define PM8350_SID 1
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#endif
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/* ADC channels for PM8350_ADC for PMIC7 */
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#define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0)
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#define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01)
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#define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02)
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#define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03)
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#define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04)
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#define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05)
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#define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06)
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#define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07)
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#define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08)
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#define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a)
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#define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b)
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#define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c)
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#define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d)
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/* 30k pull-up1 */
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#define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24)
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#define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25)
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#define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26)
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#define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27)
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#define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28)
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#define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a)
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#define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b)
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#define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c)
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#define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d)
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/* 100k pull-up2 */
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#define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44)
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#define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45)
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#define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46)
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#define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47)
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#define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48)
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#define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a)
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#define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b)
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#define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c)
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#define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d)
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/* 400k pull-up3 */
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#define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64)
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#define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65)
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#define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66)
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#define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67)
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#define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68)
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#define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a)
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#define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b)
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#define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c)
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#define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d)
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/* 1/3 Divider */
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#define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d)
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#define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e)
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */
+88
include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h
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include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h
···
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H
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#ifndef PM8350B_SID
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#define PM8350B_SID 3
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#endif
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/* ADC channels for PM8350B_ADC for PMIC7 */
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#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | 0x0)
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#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | 0x01)
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#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | 0x02)
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#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | 0x03)
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#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | 0x04)
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#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | 0x05)
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#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | 0x06)
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#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | 0x07)
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#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | 0x08)
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#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | 0x09)
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#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | 0x0a)
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#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | 0x0b)
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#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | 0x0c)
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#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | 0x0d)
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#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | 0x10)
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#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | 0x11)
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#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | 0x12)
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#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | 0x13)
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#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | 0x15)
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#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | 0x17)
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/* 30k pull-up1 */
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#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | 0x24)
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#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | 0x25)
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#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | 0x26)
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#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | 0x27)
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#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | 0x28)
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#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | 0x29)
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#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | 0x2a)
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#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | 0x2b)
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#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | 0x2c)
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#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | 0x2d)
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#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | 0x33)
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/* 100k pull-up2 */
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#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | 0x44)
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#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | 0x45)
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#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | 0x46)
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#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | 0x47)
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#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | 0x48)
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#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | 0x49)
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#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | 0x4a)
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#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | 0x4b)
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#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | 0x4c)
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#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | 0x4d)
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#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | 0x53)
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/* 400k pull-up3 */
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#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | 0x64)
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#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | 0x65)
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#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | 0x66)
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#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | 0x67)
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#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | 0x68)
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#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | 0x69)
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#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | 0x6a)
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#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | 0x6b)
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#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | 0x6c)
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#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | 0x6d)
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#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | 0x73)
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/* 1/3 Divider */
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#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | 0x8a)
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#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | 0x8b)
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#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | 0x8c)
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#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | 0x8d)
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#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | 0x8e)
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#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | 0x8f)
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#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | 0x94)
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#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | 0x96)
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H */
+46
include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h
+46
include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H
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#ifndef PMK8350_SID
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#define PMK8350_SID 0
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#endif
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/* ADC channels for PMK8350_ADC for PMIC7 */
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#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0)
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#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01)
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#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02)
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#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03)
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#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04)
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#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05)
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#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06)
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#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07)
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#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08)
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+
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/* 30k pull-up1 */
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#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24)
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#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25)
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#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26)
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#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27)
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#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28)
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+
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/* 100k pull-up2 */
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#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44)
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#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45)
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#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46)
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#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47)
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#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48)
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+
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/* 400k pull-up3 */
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#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64)
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#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65)
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#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66)
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#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67)
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#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68)
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+
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#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */
+28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h
+28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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+
*/
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+
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#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H
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#define _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H
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#ifndef PMR735A_SID
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#define PMR735A_SID 4
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#endif
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/* ADC channels for PMR735A_ADC for PMIC7 */
14
+
#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | 0x0)
15
+
#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | 0x01)
16
+
#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | 0x02)
17
+
#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | 0x03)
18
+
19
+
#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | 0x0a)
20
+
#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | 0x0b)
21
+
#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | 0x0c)
22
+
23
+
/* 100k pull-up2 */
24
+
#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | 0x4a)
25
+
#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | 0x4b)
26
+
#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | 0x4c)
27
+
28
+
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H */
+28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h
+28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-only */
2
+
/*
3
+
* Copyright (c) 2020 The Linux Foundation. All rights reserved.
4
+
*/
5
+
6
+
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H
7
+
#define _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H
8
+
9
+
#ifndef PMR735B_SID
10
+
#define PMR735B_SID 5
11
+
#endif
12
+
13
+
/* ADC channels for PMR735B_ADC for PMIC7 */
14
+
#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | 0x0)
15
+
#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | 0x01)
16
+
#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | 0x02)
17
+
#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | 0x03)
18
+
19
+
#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | 0x0a)
20
+
#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | 0x0b)
21
+
#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | 0x0c)
22
+
23
+
/* 100k pull-up2 */
24
+
#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | 0x4a)
25
+
#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | 0x4b)
26
+
#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | 0x4c)
27
+
28
+
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H */
+77
-1
include/dt-bindings/iio/qcom,spmi-vadc.h
+77
-1
include/dt-bindings/iio/qcom,spmi-vadc.h
···
1
1
/* SPDX-License-Identifier: GPL-2.0 */
2
2
/*
3
-
* Copyright (c) 2012-2014,2018 The Linux Foundation. All rights reserved.
3
+
* Copyright (c) 2012-2014,2018,2020 The Linux Foundation. All rights reserved.
4
4
*/
5
5
6
6
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
···
220
220
#define ADC5_PARALLEL_ISENSE_VBAT_IDATA 0xb5
221
221
222
222
#define ADC5_MAX_CHANNEL 0xc0
223
+
224
+
/* ADC channels for ADC for PMIC7 */
225
+
226
+
#define ADC7_REF_GND 0x00
227
+
#define ADC7_1P25VREF 0x01
228
+
#define ADC7_VREF_VADC 0x02
229
+
#define ADC7_DIE_TEMP 0x03
230
+
231
+
#define ADC7_AMUX_THM1 0x04
232
+
#define ADC7_AMUX_THM2 0x05
233
+
#define ADC7_AMUX_THM3 0x06
234
+
#define ADC7_AMUX_THM4 0x07
235
+
#define ADC7_AMUX_THM5 0x08
236
+
#define ADC7_AMUX_THM6 0x09
237
+
#define ADC7_GPIO1 0x0a
238
+
#define ADC7_GPIO2 0x0b
239
+
#define ADC7_GPIO3 0x0c
240
+
#define ADC7_GPIO4 0x0d
241
+
242
+
#define ADC7_CHG_TEMP 0x10
243
+
#define ADC7_USB_IN_V_16 0x11
244
+
#define ADC7_VDC_16 0x12
245
+
#define ADC7_CC1_ID 0x13
246
+
#define ADC7_VREF_BAT_THERM 0x15
247
+
#define ADC7_IIN_FB 0x17
248
+
249
+
/* 30k pull-up1 */
250
+
#define ADC7_AMUX_THM1_30K_PU 0x24
251
+
#define ADC7_AMUX_THM2_30K_PU 0x25
252
+
#define ADC7_AMUX_THM3_30K_PU 0x26
253
+
#define ADC7_AMUX_THM4_30K_PU 0x27
254
+
#define ADC7_AMUX_THM5_30K_PU 0x28
255
+
#define ADC7_AMUX_THM6_30K_PU 0x29
256
+
#define ADC7_GPIO1_30K_PU 0x2a
257
+
#define ADC7_GPIO2_30K_PU 0x2b
258
+
#define ADC7_GPIO3_30K_PU 0x2c
259
+
#define ADC7_GPIO4_30K_PU 0x2d
260
+
#define ADC7_CC1_ID_30K_PU 0x33
261
+
262
+
/* 100k pull-up2 */
263
+
#define ADC7_AMUX_THM1_100K_PU 0x44
264
+
#define ADC7_AMUX_THM2_100K_PU 0x45
265
+
#define ADC7_AMUX_THM3_100K_PU 0x46
266
+
#define ADC7_AMUX_THM4_100K_PU 0x47
267
+
#define ADC7_AMUX_THM5_100K_PU 0x48
268
+
#define ADC7_AMUX_THM6_100K_PU 0x49
269
+
#define ADC7_GPIO1_100K_PU 0x4a
270
+
#define ADC7_GPIO2_100K_PU 0x4b
271
+
#define ADC7_GPIO3_100K_PU 0x4c
272
+
#define ADC7_GPIO4_100K_PU 0x4d
273
+
#define ADC7_CC1_ID_100K_PU 0x53
274
+
275
+
/* 400k pull-up3 */
276
+
#define ADC7_AMUX_THM1_400K_PU 0x64
277
+
#define ADC7_AMUX_THM2_400K_PU 0x65
278
+
#define ADC7_AMUX_THM3_400K_PU 0x66
279
+
#define ADC7_AMUX_THM4_400K_PU 0x67
280
+
#define ADC7_AMUX_THM5_400K_PU 0x68
281
+
#define ADC7_AMUX_THM6_400K_PU 0x69
282
+
#define ADC7_GPIO1_400K_PU 0x6a
283
+
#define ADC7_GPIO2_400K_PU 0x6b
284
+
#define ADC7_GPIO3_400K_PU 0x6c
285
+
#define ADC7_GPIO4_400K_PU 0x6d
286
+
#define ADC7_CC1_ID_400K_PU 0x73
287
+
288
+
/* 1/3 Divider */
289
+
#define ADC7_GPIO1_DIV3 0x8a
290
+
#define ADC7_GPIO2_DIV3 0x8b
291
+
#define ADC7_GPIO3_DIV3 0x8c
292
+
#define ADC7_GPIO4_DIV3 0x8d
293
+
294
+
#define ADC7_VPH_PWR 0x8e
295
+
#define ADC7_VBAT_SNS 0x8f
296
+
297
+
#define ADC7_SBUx 0x94
298
+
#define ADC7_VBAT_2S_MID 0x96
223
299
224
300
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */