Merge remote-tracking branch 'asoc/for-5.12' into asoc-linus

+2 -4

sound/soc/amd/raven/acp3x-i2s.c

··· 264 264 .playback = { 265 265 .rates = SNDRV_PCM_RATE_8000_96000, 266 266 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | 267 - SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE | 268 - SNDRV_PCM_FMTBIT_S32_LE, 267 + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, 269 268 .channels_min = 2, 270 269 .channels_max = 8, 271 270 .rate_min = 8000, ··· 273 274 .capture = { 274 275 .rates = SNDRV_PCM_RATE_8000_48000, 275 276 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | 276 - SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE | 277 - SNDRV_PCM_FMTBIT_S32_LE, 277 + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, 278 278 .channels_min = 2, 279 279 .channels_max = 2, 280 280 .rate_min = 8000,

+2 -4

sound/soc/amd/raven/acp3x-pcm-dma.c

··· 24 24 SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | 25 25 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME, 26 26 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | 27 - SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE | 28 - SNDRV_PCM_FMTBIT_S32_LE, 27 + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, 29 28 .channels_min = 2, 30 29 .channels_max = 8, 31 30 .rates = SNDRV_PCM_RATE_8000_96000, ··· 44 45 SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | 45 46 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME, 46 47 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | 47 - SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE | 48 - SNDRV_PCM_FMTBIT_S32_LE, 48 + SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE, 49 49 .channels_min = 2, 50 50 .channels_max = 2, 51 51 .rates = SNDRV_PCM_RATE_8000_48000,

+11 -2

sound/soc/codecs/adau17x1.c

··· 553 553 { 554 554 struct adau *adau = snd_soc_component_get_drvdata(dai->component); 555 555 unsigned int ctrl0, ctrl1; 556 + unsigned int ctrl0_mask; 556 557 int lrclk_pol; 557 558 558 559 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { ··· 613 612 if (lrclk_pol) 614 613 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL; 615 614 616 - regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0); 617 - regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT1, ctrl1); 615 + /* Set the mask to update all relevant bits in ADAU17X1_SERIAL_PORT0 */ 616 + ctrl0_mask = ADAU17X1_SERIAL_PORT0_MASTER | 617 + ADAU17X1_SERIAL_PORT0_LRCLK_POL | 618 + ADAU17X1_SERIAL_PORT0_BCLK_POL | 619 + ADAU17X1_SERIAL_PORT0_PULSE_MODE; 620 + 621 + regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0_mask, 622 + ctrl0); 623 + regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1, 624 + ADAU17X1_SERIAL_PORT1_DELAY_MASK, ctrl1); 618 625 619 626 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; 620 627

+2 -14

sound/soc/codecs/rt1011.c

··· 2239 2239 dc_offset |= (value & 0xffff); 2240 2240 dev_info(dev, "Gain1 offset=0x%x\n", dc_offset); 2241 2241 2242 - /* check the package info. */ 2243 - regmap_read(rt1011->regmap, RT1011_EFUSE_MATCH_DONE, &value); 2244 - if (value & 0x4) 2245 - rt1011->pack_id = 1; 2246 - 2247 2242 if (cali_flag) { 2248 2243 2249 - if (rt1011->pack_id) 2250 - regmap_write(rt1011->regmap, RT1011_ADC_SET_1, 0x292c); 2251 - else 2252 - regmap_write(rt1011->regmap, RT1011_ADC_SET_1, 0x2925); 2253 - 2244 + regmap_write(rt1011->regmap, RT1011_ADC_SET_1, 0x2925); 2254 2245 /* Class D on */ 2255 2246 regmap_write(rt1011->regmap, RT1011_CLASS_D_POS, 0x010e); 2256 2247 regmap_write(rt1011->regmap, ··· 2367 2376 rt1011_r0_load(rt1011); 2368 2377 } 2369 2378 2370 - if (rt1011->pack_id) 2371 - snd_soc_component_write(component, RT1011_ADC_SET_1, 0x292c); 2372 - else 2373 - snd_soc_component_write(component, RT1011_ADC_SET_1, 0x2925); 2379 + snd_soc_component_write(component, RT1011_ADC_SET_1, 0x2925); 2374 2380 } 2375 2381 2376 2382 static int rt1011_parse_dp(struct rt1011_priv *rt1011, struct device *dev)

-1

sound/soc/codecs/rt1011.h

··· 692 692 unsigned int r0_reg, cali_done; 693 693 unsigned int r0_calib, temperature_calib; 694 694 int recv_spk_mode; 695 - unsigned int pack_id; /* 0: WLCSP; 1: QFN */ 696 695 }; 697 696 698 697 #endif /* end of _RT1011_H_ */

+4 -1

sound/soc/codecs/rt286.c

··· 171 171 case RT286_PROC_COEF: 172 172 case RT286_SET_AMP_GAIN_ADC_IN1: 173 173 case RT286_SET_AMP_GAIN_ADC_IN2: 174 + case RT286_SET_GPIO_MASK: 175 + case RT286_SET_GPIO_DIRECTION: 176 + case RT286_SET_GPIO_DATA: 174 177 case RT286_SET_POWER(RT286_DAC_OUT1): 175 178 case RT286_SET_POWER(RT286_DAC_OUT2): 176 179 case RT286_SET_POWER(RT286_ADC_IN1): ··· 1207 1204 mdelay(10); 1208 1205 1209 1206 if (!rt286->pdata.gpio2_en) 1210 - regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x4000); 1207 + regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x40); 1211 1208 else 1212 1209 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0); 1213 1210

+3 -1

sound/soc/codecs/tas2552.c

··· 730 730 ret = devm_snd_soc_register_component(&client->dev, 731 731 &soc_component_dev_tas2552, 732 732 tas2552_dai, ARRAY_SIZE(tas2552_dai)); 733 - if (ret < 0) 733 + if (ret < 0) { 734 734 dev_err(&client->dev, "Failed to register component: %d\n", ret); 735 + pm_runtime_get_noresume(&client->dev); 736 + } 735 737 736 738 return ret; 737 739 }

+6 -6

sound/soc/codecs/tlv320aic32x4.c

··· 577 577 .window_start = 0, 578 578 .window_len = 128, 579 579 .range_min = 0, 580 - .range_max = AIC32X4_RMICPGAVOL, 580 + .range_max = AIC32X4_REFPOWERUP, 581 581 }, 582 582 }; 583 583 584 584 const struct regmap_config aic32x4_regmap_config = { 585 - .max_register = AIC32X4_RMICPGAVOL, 585 + .max_register = AIC32X4_REFPOWERUP, 586 586 .ranges = aic32x4_regmap_pages, 587 587 .num_ranges = ARRAY_SIZE(aic32x4_regmap_pages), 588 588 }; ··· 1243 1243 if (ret) 1244 1244 goto err_disable_regulators; 1245 1245 1246 + ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); 1247 + if (ret) 1248 + goto err_disable_regulators; 1249 + 1246 1250 ret = devm_snd_soc_register_component(dev, 1247 1251 &soc_component_dev_aic32x4, &aic32x4_dai, 1); 1248 1252 if (ret) { 1249 1253 dev_err(dev, "Failed to register component\n"); 1250 1254 goto err_disable_regulators; 1251 1255 } 1252 - 1253 - ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); 1254 - if (ret) 1255 - goto err_disable_regulators; 1256 1256 1257 1257 return 0; 1258 1258

+30 -8

sound/soc/intel/boards/kbl_da7219_max98927.c

··· 282 282 struct snd_interval *chan = hw_param_interval(params, 283 283 SNDRV_PCM_HW_PARAM_CHANNELS); 284 284 struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); 285 - struct snd_soc_dpcm *dpcm = container_of( 286 - params, struct snd_soc_dpcm, hw_params); 287 - struct snd_soc_dai_link *fe_dai_link = dpcm->fe->dai_link; 288 - struct snd_soc_dai_link *be_dai_link = dpcm->be->dai_link; 285 + struct snd_soc_dpcm *dpcm, *rtd_dpcm = NULL; 289 286 287 + /* 288 + * The following loop will be called only for playback stream 289 + * In this platform, there is only one playback device on every SSP 290 + */ 291 + for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_PLAYBACK, dpcm) { 292 + rtd_dpcm = dpcm; 293 + break; 294 + } 295 + 296 + /* 297 + * This following loop will be called only for capture stream 298 + * In this platform, there is only one capture device on every SSP 299 + */ 300 + for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_CAPTURE, dpcm) { 301 + rtd_dpcm = dpcm; 302 + break; 303 + } 304 + 305 + if (!rtd_dpcm) 306 + return -EINVAL; 307 + 308 + /* 309 + * The above 2 loops are mutually exclusive based on the stream direction, 310 + * thus rtd_dpcm variable will never be overwritten 311 + */ 290 312 /* 291 313 * Topology for kblda7219m98373 & kblmax98373 supports only S24_LE, 292 314 * where as kblda7219m98927 & kblmax98927 supports S16_LE by default. ··· 331 309 /* 332 310 * The ADSP will convert the FE rate to 48k, stereo, 24 bit 333 311 */ 334 - if (!strcmp(fe_dai_link->name, "Kbl Audio Port") || 335 - !strcmp(fe_dai_link->name, "Kbl Audio Headset Playback") || 336 - !strcmp(fe_dai_link->name, "Kbl Audio Capture Port")) { 312 + if (!strcmp(rtd_dpcm->fe->dai_link->name, "Kbl Audio Port") || 313 + !strcmp(rtd_dpcm->fe->dai_link->name, "Kbl Audio Headset Playback") || 314 + !strcmp(rtd_dpcm->fe->dai_link->name, "Kbl Audio Capture Port")) { 337 315 rate->min = rate->max = 48000; 338 316 chan->min = chan->max = 2; 339 317 snd_mask_none(fmt); ··· 344 322 * The speaker on the SSP0 supports S16_LE and not S24_LE. 345 323 * thus changing the mask here 346 324 */ 347 - if (!strcmp(be_dai_link->name, "SSP0-Codec")) 325 + if (!strcmp(rtd_dpcm->be->dai_link->name, "SSP0-Codec")) 348 326 snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE); 349 327 350 328 return 0;

+3 -2

sound/soc/intel/keembay/kmb_platform.c

··· 105 105 void *buf = runtime->dma_area; 106 106 int i; 107 107 108 + if (kmb_i2s->iec958_fmt) 109 + hdmi_reformat_iec958(runtime, kmb_i2s, tx_ptr); 110 + 108 111 /* KMB i2s uses two separate L/R FIFO */ 109 112 for (i = 0; i < kmb_i2s->fifo_th; i++) { 110 113 if (kmb_i2s->config.data_width == 16) { 111 114 writel(((u16(*)[2])buf)[tx_ptr][0], i2s_base + LRBR_LTHR(0)); 112 115 writel(((u16(*)[2])buf)[tx_ptr][1], i2s_base + RRBR_RTHR(0)); 113 116 } else { 114 - if (kmb_i2s->iec958_fmt) 115 - hdmi_reformat_iec958(runtime, kmb_i2s, tx_ptr); 116 117 writel(((u32(*)[2])buf)[tx_ptr][0], i2s_base + LRBR_LTHR(0)); 117 118 writel(((u32(*)[2])buf)[tx_ptr][1], i2s_base + RRBR_RTHR(0)); 118 119 }

+21 -6

sound/soc/meson/axg-frddr.c

··· 11 11 #include <linux/regmap.h> 12 12 #include <linux/module.h> 13 13 #include <linux/of_platform.h> 14 + #include <sound/pcm_params.h> 14 15 #include <sound/soc.h> 15 16 #include <sound/soc-dai.h> 16 17 ··· 47 46 return 0; 48 47 } 49 48 49 + static int axg_frddr_dai_hw_params(struct snd_pcm_substream *substream, 50 + struct snd_pcm_hw_params *params, 51 + struct snd_soc_dai *dai) 52 + { 53 + struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); 54 + unsigned int period, depth, val; 55 + 56 + period = params_period_bytes(params); 57 + 58 + /* Trim the FIFO depth if the period is small to improve latency */ 59 + depth = min(period, fifo->depth); 60 + val = (depth / AXG_FIFO_BURST) - 1; 61 + regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_FRDDR_DEPTH_MASK, 62 + CTRL1_FRDDR_DEPTH(val)); 63 + 64 + return 0; 65 + } 66 + 50 67 static int axg_frddr_dai_startup(struct snd_pcm_substream *substream, 51 68 struct snd_soc_dai *dai) 52 69 { 53 70 struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); 54 - unsigned int val; 55 71 int ret; 56 72 57 73 /* Enable pclk to access registers and clock the fifo ip */ ··· 78 60 79 61 /* Apply single buffer mode to the interface */ 80 62 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_FRDDR_PP_MODE, 0); 81 - 82 - /* Use all fifo depth */ 83 - val = (fifo->depth / AXG_FIFO_BURST) - 1; 84 - regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_FRDDR_DEPTH_MASK, 85 - CTRL1_FRDDR_DEPTH(val)); 86 63 87 64 return 0; 88 65 } ··· 97 84 } 98 85 99 86 static const struct snd_soc_dai_ops axg_frddr_ops = { 87 + .hw_params = axg_frddr_dai_hw_params, 100 88 .startup = axg_frddr_dai_startup, 101 89 .shutdown = axg_frddr_dai_shutdown, 102 90 }; ··· 171 157 172 158 static const struct snd_soc_dai_ops g12a_frddr_ops = { 173 159 .prepare = g12a_frddr_dai_prepare, 160 + .hw_params = axg_frddr_dai_hw_params, 174 161 .startup = axg_frddr_dai_startup, 175 162 .shutdown = axg_frddr_dai_shutdown, 176 163 };