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dt-bindings: timer: Add andestech atcpit100 timer binding doc

Add a document to describe Andestech atcpit100 timer and
binding information.

Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>

authored by

Rick Chen and committed by
Greentime Hu
d0d7a6fe ea4625c3

+33
+33
Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt
··· 1 + Andestech ATCPIT100 timer 2 + ------------------------------------------------------------------ 3 + ATCPIT100 is a generic IP block from Andes Technology, embedded in 4 + Andestech AE3XX platforms and other designs. 5 + 6 + This timer is a set of compact multi-function timers, which can be 7 + used as pulse width modulators (PWM) as well as simple timers. 8 + 9 + It supports up to 4 PIT channels. Each PIT channel is a 10 + multi-function timer and provide the following usage scenarios: 11 + One 32-bit timer 12 + Two 16-bit timers 13 + Four 8-bit timers 14 + One 16-bit PWM 15 + One 16-bit timer and one 8-bit PWM 16 + Two 8-bit timer and one 8-bit PWM 17 + 18 + Required properties: 19 + - compatible : Should be "andestech,atcpit100" 20 + - reg : Address and length of the register set 21 + - interrupts : Reference to the timer interrupt 22 + - clocks : a clock to provide the tick rate for "andestech,atcpit100" 23 + - clock-names : should be "PCLK" for the peripheral clock source. 24 + 25 + Examples: 26 + 27 + timer0: timer@f0400000 { 28 + compatible = "andestech,atcpit100"; 29 + reg = <0xf0400000 0x1000>; 30 + interrupts = <2>; 31 + clocks = <&apb>; 32 + clock-names = "PCLK"; 33 + };