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devicetree: Add binding for Sigma Designs SMP86xx interrupt controller

This adds a binding for the secondary interrupt controller in
Sigma Designs SMP86xx and SMP87xx chips.

Signed-off-by: Mans Rullgard <mans@mansr.com>
[ jac: use 'interrupt-controller@XXX' notation in binding doc ]
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1453313237-18570-1-git-send-email-mans@mansr.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

authored by

Mans Rullgard and committed by
Jason Cooper
d08b82c9 92e963f5

+49
+49
Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt
··· 1 + Sigma Designs SMP86xx/SMP87xx secondary interrupt controller 2 + 3 + Required properties: 4 + - compatible: should be "sigma,smp8642-intc" 5 + - reg: physical address of MMIO region 6 + - ranges: address space mapping of child nodes 7 + - interrupt-parent: phandle of parent interrupt controller 8 + - interrupt-controller: boolean 9 + - #address-cells: should be <1> 10 + - #size-cells: should be <1> 11 + 12 + One child node per control block with properties: 13 + - reg: address of registers for this control block 14 + - interrupt-controller: boolean 15 + - #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt 16 + - interrupts: interrupt spec of primary interrupt controller 17 + 18 + Example: 19 + 20 + interrupt-controller@6e000 { 21 + compatible = "sigma,smp8642-intc"; 22 + reg = <0x6e000 0x400>; 23 + ranges = <0x0 0x6e000 0x400>; 24 + interrupt-parent = <&gic>; 25 + interrupt-controller; 26 + #address-cells = <1>; 27 + #size-cells = <1>; 28 + 29 + irq0: interrupt-controller@0 { 30 + reg = <0x000 0x100>; 31 + interrupt-controller; 32 + #interrupt-cells = <2>; 33 + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 34 + }; 35 + 36 + irq1: interrupt-controller@100 { 37 + reg = <0x100 0x100>; 38 + interrupt-controller; 39 + #interrupt-cells = <2>; 40 + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 41 + }; 42 + 43 + irq2: interrupt-controller@300 { 44 + reg = <0x300 0x100>; 45 + interrupt-controller; 46 + #interrupt-cells = <2>; 47 + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 48 + }; 49 + };