tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'devicetree-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
- DT binding schema examples are now validated against the schemas.
Various examples are fixed due to that.
- Sync dtc with upstream version v1.5.0-30-g702c1b6c0e73
- Initial schemas for networking bindings. This includes ethernet, phy
and mdio common bindings with several Allwinner and stmmac converted
to the schema.
- Conversion of more Arm top-level SoC/board bindings to DT schema
- Conversion of PSCI binding to DT schema
- Rework Arm CPU schema to coexist with other CPU schemas
- Add a bunch of missing vendor prefixes and new ones for SoChip,
Sipeed, Kontron, B&R Industrial Automation GmbH, and Espressif
- Add Mediatek UART RX wakeup support to binding
- Add reset to ST UART binding
- Remove some Linuxisms from the endianness common-properties.txt
binding
- Make the flattened DT read-only after init
- Ignore disabled reserved memory nodes
- Clean-up some dead code in FDT functions
* tag 'devicetree-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits)
dt-bindings: vendor-prefixes: add Sipeed
dt-bindings: vendor-prefixes: add SoChip
dt-bindings: 83xx-512x-pci: Drop cell-index property
dt-bindings: serial: add documentation for Rx in-band wakeup support
dt-bindings: arm: Convert RDA Micro board/soc bindings to json-schema
of: unittest: simplify getting the adapter of a client
of/fdt: pass early_init_dt_reserve_memory_arch() with bool type nomap
of/platform: Drop superfluous cast in of_device_make_bus_id()
dt-bindings: usb: ehci: Fix example warnings
dt-bindings: net: Use phy-mode instead of phy-connection-type
dt-bindings: simple-framebuffer: Add requirement for pipelines
dt-bindings: display: Fix simple-framebuffer example
dt-bindings: net: mdio: Add child nodes
dt-bindings: net: mdio: Add address and size cells
dt-bindings: net: mdio: Add a nodename pattern
dt-bindings: mtd: sunxi-nand: Drop 'maxItems' from child 'reg' property
dt-bindings: arm: Limit cpus schema to only check Arm 'cpu' nodes
dt-bindings: backlight: lm3630a: correct schema validation
dt-bindings: net: dwmac: Deprecate the PHY reset properties
dt-bindings: net: sun8i-emac: Convert the binding to a schemas
...
+2519
-1951
+1
-1
Documentation/arm64/booting.rst
+1
-1
Documentation/arm64/booting.rst
···
284
284
processors") to bring CPUs into the kernel.
285
285
286
286
The device tree should contain a 'psci' node, as described in
287
-
Documentation/devicetree/bindings/arm/psci.txt.
287
+
Documentation/devicetree/bindings/arm/psci.yaml.
288
288
289
289
- Secondary CPU general-purpose register settings
290
290
x0 = 0 (reserved for future use)
+1
-1
Documentation/devicetree/bindings/Makefile
+1
-1
Documentation/devicetree/bindings/Makefile
···
25
25
DT_SCHEMA_FILES ?= $(addprefix $(src)/,$(DT_DOCS))
26
26
27
27
extra-y += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES))
28
-
extra-y += $(patsubst $(src)/%.yaml,%.example.dtb, $(DT_SCHEMA_FILES))
28
+
extra-y += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES))
29
29
30
30
$(obj)/$(DT_TMP_SCHEMA): $(DT_SCHEMA_FILES) FORCE
31
31
$(call if_changed,mk_schema)
-16
Documentation/devicetree/bindings/arm/al,alpine.txt
-16
Documentation/devicetree/bindings/arm/al,alpine.txt
···
1
-
Annapurna Labs Alpine Platform Device Tree Bindings
2
-
---------------------------------------------------------------
3
-
4
-
Boards in the Alpine family shall have the following properties:
5
-
6
-
* Required root node properties:
7
-
compatible: must contain "al,alpine"
8
-
9
-
* Example:
10
-
11
-
/ {
12
-
model = "Annapurna Labs Alpine Dev Board";
13
-
compatible = "al,alpine";
14
-
15
-
...
16
-
}
+21
Documentation/devicetree/bindings/arm/al,alpine.yaml
+21
Documentation/devicetree/bindings/arm/al,alpine.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/arm/al,alpine.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Annapurna Labs Alpine Platform Device Tree Bindings
8
+
9
+
maintainers:
10
+
- Tsahee Zidenberg <tsahee@annapurnalabs.com>
11
+
- Antoine Tenart <antoine.tenart@bootlin.com>
12
+
13
+
properties:
14
+
compatible:
15
+
items:
16
+
- const: al,alpine
17
+
model:
18
+
items:
19
+
- const: "Annapurna Labs Alpine Dev Board"
20
+
21
+
...
+1
-1
Documentation/devicetree/bindings/arm/arm-boards
+1
-1
Documentation/devicetree/bindings/arm/arm-boards
···
197
197
The description for the board must include:
198
198
- a "psci" node describing the boot method used for the secondary CPUs.
199
199
A detailed description of the bindings used for "psci" nodes is present
200
-
in the psci.txt file.
200
+
in the psci.yaml file.
201
201
- a "cpus" node describing the available cores and their associated
202
202
"enable-method"s. For more details see cpus.txt file.
203
203
-12
Documentation/devicetree/bindings/arm/axxia.txt
-12
Documentation/devicetree/bindings/arm/axxia.txt
···
1
-
Axxia AXM55xx device tree bindings
2
-
3
-
Boards using the AXM55xx SoC need to have the following properties:
4
-
5
-
Required root node property:
6
-
7
-
- compatible = "lsi,axm5516"
8
-
9
-
Boards:
10
-
11
-
LSI AXM5516 Validation board (Amarillo)
12
-
compatible = "lsi,axm5516-amarillo", "lsi,axm5516"
+19
Documentation/devicetree/bindings/arm/axxia.yaml
+19
Documentation/devicetree/bindings/arm/axxia.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/arm/axxia.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Axxia AXM55xx device tree bindings
8
+
9
+
maintainers:
10
+
- Anders Berg <anders.berg@lsi.com>
11
+
12
+
properties:
13
+
compatible:
14
+
description: LSI AXM5516 Validation board (Amarillo)
15
+
items:
16
+
- const: lsi,axm5516-amarillo
17
+
- const: lsi,axm5516
18
+
19
+
...
+198
-237
Documentation/devicetree/bindings/arm/cpus.yaml
+198
-237
Documentation/devicetree/bindings/arm/cpus.yaml
···
39
39
described below.
40
40
41
41
properties:
42
-
$nodename:
43
-
const: cpus
44
-
description: Container of cpu nodes
45
-
46
-
'#address-cells':
47
-
enum: [1, 2]
42
+
reg:
43
+
maxItems: 1
48
44
description: |
49
-
Definition depends on ARM architecture version and configuration:
45
+
Usage and definition depend on ARM architecture version and
46
+
configuration:
50
47
51
48
On uniprocessor ARM architectures previous to v7
52
-
value must be 1, to enable a simple enumeration
53
-
scheme for processors that do not have a HW CPU
54
-
identification register.
55
-
On 32-bit ARM 11 MPcore, ARM v7 or later systems
56
-
value must be 1, that corresponds to CPUID/MPIDR
57
-
registers sizes.
58
-
On ARM v8 64-bit systems value should be set to 2,
59
-
that corresponds to the MPIDR_EL1 register size.
60
-
If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
61
-
in the system, #address-cells can be set to 1, since
62
-
MPIDR_EL1[63:32] bits are not used for CPUs
63
-
identification.
49
+
this property is required and must be set to 0.
64
50
65
-
'#size-cells':
66
-
const: 0
51
+
On ARM 11 MPcore based systems this property is
52
+
required and matches the CPUID[11:0] register bits.
67
53
68
-
patternProperties:
69
-
'^cpu@[0-9a-f]+$':
70
-
type: object
71
-
properties:
72
-
device_type:
73
-
const: cpu
54
+
Bits [11:0] in the reg cell must be set to
55
+
bits [11:0] in CPU ID register.
74
56
75
-
reg:
76
-
maxItems: 1
77
-
description: |
78
-
Usage and definition depend on ARM architecture version and
79
-
configuration:
57
+
All other bits in the reg cell must be set to 0.
80
58
81
-
On uniprocessor ARM architectures previous to v7
82
-
this property is required and must be set to 0.
59
+
On 32-bit ARM v7 or later systems this property is
60
+
required and matches the CPU MPIDR[23:0] register
61
+
bits.
83
62
84
-
On ARM 11 MPcore based systems this property is
85
-
required and matches the CPUID[11:0] register bits.
63
+
Bits [23:0] in the reg cell must be set to
64
+
bits [23:0] in MPIDR.
86
65
87
-
Bits [11:0] in the reg cell must be set to
88
-
bits [11:0] in CPU ID register.
66
+
All other bits in the reg cell must be set to 0.
89
67
90
-
All other bits in the reg cell must be set to 0.
68
+
On ARM v8 64-bit systems this property is required
69
+
and matches the MPIDR_EL1 register affinity bits.
91
70
92
-
On 32-bit ARM v7 or later systems this property is
93
-
required and matches the CPU MPIDR[23:0] register
94
-
bits.
71
+
* If cpus node's #address-cells property is set to 2
95
72
96
-
Bits [23:0] in the reg cell must be set to
97
-
bits [23:0] in MPIDR.
73
+
The first reg cell bits [7:0] must be set to
74
+
bits [39:32] of MPIDR_EL1.
98
75
99
-
All other bits in the reg cell must be set to 0.
76
+
The second reg cell bits [23:0] must be set to
77
+
bits [23:0] of MPIDR_EL1.
100
78
101
-
On ARM v8 64-bit systems this property is required
102
-
and matches the MPIDR_EL1 register affinity bits.
79
+
* If cpus node's #address-cells property is set to 1
103
80
104
-
* If cpus node's #address-cells property is set to 2
81
+
The reg cell bits [23:0] must be set to bits [23:0]
82
+
of MPIDR_EL1.
105
83
106
-
The first reg cell bits [7:0] must be set to
107
-
bits [39:32] of MPIDR_EL1.
84
+
All other bits in the reg cells must be set to 0.
108
85
109
-
The second reg cell bits [23:0] must be set to
110
-
bits [23:0] of MPIDR_EL1.
86
+
compatible:
87
+
enum:
88
+
- arm,arm710t
89
+
- arm,arm720t
90
+
- arm,arm740t
91
+
- arm,arm7ej-s
92
+
- arm,arm7tdmi
93
+
- arm,arm7tdmi-s
94
+
- arm,arm9es
95
+
- arm,arm9ej-s
96
+
- arm,arm920t
97
+
- arm,arm922t
98
+
- arm,arm925
99
+
- arm,arm926e-s
100
+
- arm,arm926ej-s
101
+
- arm,arm940t
102
+
- arm,arm946e-s
103
+
- arm,arm966e-s
104
+
- arm,arm968e-s
105
+
- arm,arm9tdmi
106
+
- arm,arm1020e
107
+
- arm,arm1020t
108
+
- arm,arm1022e
109
+
- arm,arm1026ej-s
110
+
- arm,arm1136j-s
111
+
- arm,arm1136jf-s
112
+
- arm,arm1156t2-s
113
+
- arm,arm1156t2f-s
114
+
- arm,arm1176jzf
115
+
- arm,arm1176jz-s
116
+
- arm,arm1176jzf-s
117
+
- arm,arm11mpcore
118
+
- arm,armv8 # Only for s/w models
119
+
- arm,cortex-a5
120
+
- arm,cortex-a7
121
+
- arm,cortex-a8
122
+
- arm,cortex-a9
123
+
- arm,cortex-a12
124
+
- arm,cortex-a15
125
+
- arm,cortex-a17
126
+
- arm,cortex-a53
127
+
- arm,cortex-a57
128
+
- arm,cortex-a72
129
+
- arm,cortex-a73
130
+
- arm,cortex-m0
131
+
- arm,cortex-m0+
132
+
- arm,cortex-m1
133
+
- arm,cortex-m3
134
+
- arm,cortex-m4
135
+
- arm,cortex-r4
136
+
- arm,cortex-r5
137
+
- arm,cortex-r7
138
+
- brcm,brahma-b15
139
+
- brcm,brahma-b53
140
+
- brcm,vulcan
141
+
- cavium,thunder
142
+
- cavium,thunder2
143
+
- faraday,fa526
144
+
- intel,sa110
145
+
- intel,sa1100
146
+
- marvell,feroceon
147
+
- marvell,mohawk
148
+
- marvell,pj4a
149
+
- marvell,pj4b
150
+
- marvell,sheeva-v5
151
+
- marvell,sheeva-v7
152
+
- nvidia,tegra132-denver
153
+
- nvidia,tegra186-denver
154
+
- nvidia,tegra194-carmel
155
+
- qcom,krait
156
+
- qcom,kryo
157
+
- qcom,kryo385
158
+
- qcom,scorpion
111
159
112
-
* If cpus node's #address-cells property is set to 1
113
-
114
-
The reg cell bits [23:0] must be set to bits [23:0]
115
-
of MPIDR_EL1.
116
-
117
-
All other bits in the reg cells must be set to 0.
118
-
119
-
compatible:
120
-
items:
160
+
enable-method:
161
+
allOf:
162
+
- $ref: '/schemas/types.yaml#/definitions/string'
163
+
- oneOf:
164
+
# On ARM v8 64-bit this property is required
121
165
- enum:
122
-
- arm,arm710t
123
-
- arm,arm720t
124
-
- arm,arm740t
125
-
- arm,arm7ej-s
126
-
- arm,arm7tdmi
127
-
- arm,arm7tdmi-s
128
-
- arm,arm9es
129
-
- arm,arm9ej-s
130
-
- arm,arm920t
131
-
- arm,arm922t
132
-
- arm,arm925
133
-
- arm,arm926e-s
134
-
- arm,arm926ej-s
135
-
- arm,arm940t
136
-
- arm,arm946e-s
137
-
- arm,arm966e-s
138
-
- arm,arm968e-s
139
-
- arm,arm9tdmi
140
-
- arm,arm1020e
141
-
- arm,arm1020t
142
-
- arm,arm1022e
143
-
- arm,arm1026ej-s
144
-
- arm,arm1136j-s
145
-
- arm,arm1136jf-s
146
-
- arm,arm1156t2-s
147
-
- arm,arm1156t2f-s
148
-
- arm,arm1176jzf
149
-
- arm,arm1176jz-s
150
-
- arm,arm1176jzf-s
151
-
- arm,arm11mpcore
152
-
- arm,armv8 # Only for s/w models
153
-
- arm,cortex-a5
154
-
- arm,cortex-a7
155
-
- arm,cortex-a8
156
-
- arm,cortex-a9
157
-
- arm,cortex-a12
158
-
- arm,cortex-a15
159
-
- arm,cortex-a17
160
-
- arm,cortex-a53
161
-
- arm,cortex-a57
162
-
- arm,cortex-a72
163
-
- arm,cortex-a73
164
-
- arm,cortex-m0
165
-
- arm,cortex-m0+
166
-
- arm,cortex-m1
167
-
- arm,cortex-m3
168
-
- arm,cortex-m4
169
-
- arm,cortex-r4
170
-
- arm,cortex-r5
171
-
- arm,cortex-r7
166
+
- psci
167
+
- spin-table
168
+
# On ARM 32-bit systems this property is optional
169
+
- enum:
170
+
- actions,s500-smp
171
+
- allwinner,sun6i-a31
172
+
- allwinner,sun8i-a23
173
+
- allwinner,sun9i-a80-smp
174
+
- allwinner,sun8i-a83t-smp
175
+
- amlogic,meson8-smp
176
+
- amlogic,meson8b-smp
177
+
- arm,realview-smp
178
+
- brcm,bcm11351-cpu-method
179
+
- brcm,bcm23550
180
+
- brcm,bcm2836-smp
181
+
- brcm,bcm63138
182
+
- brcm,bcm-nsp-smp
172
183
- brcm,brahma-b15
173
-
- brcm,brahma-b53
174
-
- brcm,vulcan
175
-
- cavium,thunder
176
-
- cavium,thunder2
177
-
- faraday,fa526
178
-
- intel,sa110
179
-
- intel,sa1100
180
-
- marvell,feroceon
181
-
- marvell,mohawk
182
-
- marvell,pj4a
183
-
- marvell,pj4b
184
-
- marvell,sheeva-v5
185
-
- marvell,sheeva-v7
186
-
- nvidia,tegra132-denver
187
-
- nvidia,tegra186-denver
188
-
- nvidia,tegra194-carmel
189
-
- qcom,krait
190
-
- qcom,kryo
191
-
- qcom,kryo385
192
-
- qcom,scorpion
184
+
- marvell,armada-375-smp
185
+
- marvell,armada-380-smp
186
+
- marvell,armada-390-smp
187
+
- marvell,armada-xp-smp
188
+
- marvell,98dx3236-smp
189
+
- mediatek,mt6589-smp
190
+
- mediatek,mt81xx-tz-smp
191
+
- qcom,gcc-msm8660
192
+
- qcom,kpss-acc-v1
193
+
- qcom,kpss-acc-v2
194
+
- renesas,apmu
195
+
- renesas,r9a06g032-smp
196
+
- rockchip,rk3036-smp
197
+
- rockchip,rk3066-smp
198
+
- socionext,milbeaut-m10v-smp
199
+
- ste,dbx500-smp
193
200
194
-
enable-method:
195
-
allOf:
196
-
- $ref: '/schemas/types.yaml#/definitions/string'
197
-
- oneOf:
198
-
# On ARM v8 64-bit this property is required
199
-
- enum:
200
-
- psci
201
-
- spin-table
202
-
# On ARM 32-bit systems this property is optional
203
-
- enum:
204
-
- actions,s500-smp
205
-
- allwinner,sun6i-a31
206
-
- allwinner,sun8i-a23
207
-
- allwinner,sun9i-a80-smp
208
-
- allwinner,sun8i-a83t-smp
209
-
- amlogic,meson8-smp
210
-
- amlogic,meson8b-smp
211
-
- arm,realview-smp
212
-
- brcm,bcm11351-cpu-method
213
-
- brcm,bcm23550
214
-
- brcm,bcm2836-smp
215
-
- brcm,bcm63138
216
-
- brcm,bcm-nsp-smp
217
-
- brcm,brahma-b15
218
-
- marvell,armada-375-smp
219
-
- marvell,armada-380-smp
220
-
- marvell,armada-390-smp
221
-
- marvell,armada-xp-smp
222
-
- marvell,98dx3236-smp
223
-
- mediatek,mt6589-smp
224
-
- mediatek,mt81xx-tz-smp
225
-
- qcom,gcc-msm8660
226
-
- qcom,kpss-acc-v1
227
-
- qcom,kpss-acc-v2
228
-
- renesas,apmu
229
-
- renesas,r9a06g032-smp
230
-
- rockchip,rk3036-smp
231
-
- rockchip,rk3066-smp
232
-
- socionext,milbeaut-m10v-smp
233
-
- ste,dbx500-smp
201
+
cpu-release-addr:
202
+
$ref: '/schemas/types.yaml#/definitions/uint64'
234
203
235
-
cpu-release-addr:
236
-
$ref: '/schemas/types.yaml#/definitions/uint64'
204
+
description:
205
+
Required for systems that have an "enable-method"
206
+
property value of "spin-table".
207
+
On ARM v8 64-bit systems must be a two cell
208
+
property identifying a 64-bit zero-initialised
209
+
memory location.
237
210
238
-
description:
239
-
Required for systems that have an "enable-method"
240
-
property value of "spin-table".
241
-
On ARM v8 64-bit systems must be a two cell
242
-
property identifying a 64-bit zero-initialised
243
-
memory location.
211
+
cpu-idle-states:
212
+
$ref: '/schemas/types.yaml#/definitions/phandle-array'
213
+
description: |
214
+
List of phandles to idle state nodes supported
215
+
by this cpu (see ./idle-states.txt).
244
216
245
-
cpu-idle-states:
246
-
$ref: '/schemas/types.yaml#/definitions/phandle-array'
247
-
description: |
248
-
List of phandles to idle state nodes supported
249
-
by this cpu (see ./idle-states.txt).
217
+
capacity-dmips-mhz:
218
+
$ref: '/schemas/types.yaml#/definitions/uint32'
219
+
description:
220
+
u32 value representing CPU capacity (see ./cpu-capacity.txt) in
221
+
DMIPS/MHz, relative to highest capacity-dmips-mhz
222
+
in the system.
250
223
251
-
capacity-dmips-mhz:
252
-
$ref: '/schemas/types.yaml#/definitions/uint32'
253
-
description:
254
-
u32 value representing CPU capacity (see ./cpu-capacity.txt) in
255
-
DMIPS/MHz, relative to highest capacity-dmips-mhz
256
-
in the system.
224
+
dynamic-power-coefficient:
225
+
$ref: '/schemas/types.yaml#/definitions/uint32'
226
+
description:
227
+
A u32 value that represents the running time dynamic
228
+
power coefficient in units of uW/MHz/V^2. The
229
+
coefficient can either be calculated from power
230
+
measurements or derived by analysis.
257
231
258
-
dynamic-power-coefficient:
259
-
$ref: '/schemas/types.yaml#/definitions/uint32'
260
-
description:
261
-
A u32 value that represents the running time dynamic
262
-
power coefficient in units of uW/MHz/V^2. The
263
-
coefficient can either be calculated from power
264
-
measurements or derived by analysis.
232
+
The dynamic power consumption of the CPU is
233
+
proportional to the square of the Voltage (V) and
234
+
the clock frequency (f). The coefficient is used to
235
+
calculate the dynamic power as below -
265
236
266
-
The dynamic power consumption of the CPU is
267
-
proportional to the square of the Voltage (V) and
268
-
the clock frequency (f). The coefficient is used to
269
-
calculate the dynamic power as below -
237
+
Pdyn = dynamic-power-coefficient * V^2 * f
270
238
271
-
Pdyn = dynamic-power-coefficient * V^2 * f
239
+
where voltage is in V, frequency is in MHz.
272
240
273
-
where voltage is in V, frequency is in MHz.
241
+
qcom,saw:
242
+
$ref: '/schemas/types.yaml#/definitions/phandle'
243
+
description: |
244
+
Specifies the SAW* node associated with this CPU.
274
245
275
-
qcom,saw:
276
-
$ref: '/schemas/types.yaml#/definitions/phandle'
277
-
description: |
278
-
Specifies the SAW* node associated with this CPU.
246
+
Required for systems that have an "enable-method" property
247
+
value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
279
248
280
-
Required for systems that have an "enable-method" property
281
-
value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
249
+
* arm/msm/qcom,saw2.txt
282
250
283
-
* arm/msm/qcom,saw2.txt
251
+
qcom,acc:
252
+
$ref: '/schemas/types.yaml#/definitions/phandle'
253
+
description: |
254
+
Specifies the ACC* node associated with this CPU.
284
255
285
-
qcom,acc:
286
-
$ref: '/schemas/types.yaml#/definitions/phandle'
287
-
description: |
288
-
Specifies the ACC* node associated with this CPU.
256
+
Required for systems that have an "enable-method" property
257
+
value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
289
258
290
-
Required for systems that have an "enable-method" property
291
-
value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
259
+
* arm/msm/qcom,kpss-acc.txt
292
260
293
-
* arm/msm/qcom,kpss-acc.txt
261
+
rockchip,pmu:
262
+
$ref: '/schemas/types.yaml#/definitions/phandle'
263
+
description: |
264
+
Specifies the syscon node controlling the cpu core power domains.
294
265
295
-
rockchip,pmu:
296
-
$ref: '/schemas/types.yaml#/definitions/phandle'
297
-
description: |
298
-
Specifies the syscon node controlling the cpu core power domains.
299
-
300
-
Optional for systems that have an "enable-method"
301
-
property value of "rockchip,rk3066-smp"
302
-
While optional, it is the preferred way to get access to
303
-
the cpu-core power-domains.
304
-
305
-
required:
306
-
- device_type
307
-
- reg
308
-
- compatible
309
-
310
-
dependencies:
311
-
cpu-release-addr: [enable-method]
312
-
rockchip,pmu: [enable-method]
266
+
Optional for systems that have an "enable-method"
267
+
property value of "rockchip,rk3066-smp"
268
+
While optional, it is the preferred way to get access to
269
+
the cpu-core power-domains.
313
270
314
271
required:
315
-
- '#address-cells'
316
-
- '#size-cells'
272
+
- device_type
273
+
- reg
274
+
- compatible
275
+
276
+
dependencies:
277
+
rockchip,pmu: [enable-method]
317
278
318
279
examples:
319
280
- |
-6
Documentation/devicetree/bindings/arm/digicolor.txt
-6
Documentation/devicetree/bindings/arm/digicolor.txt
+16
Documentation/devicetree/bindings/arm/digicolor.yaml
+16
Documentation/devicetree/bindings/arm/digicolor.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/arm/digicolor.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Conexant Digicolor Platforms Device Tree Bindings
8
+
9
+
maintainers:
10
+
- Baruch Siach <baruch@tkos.co.il>
11
+
12
+
properties:
13
+
compatible:
14
+
const: cnxt,cx92755
15
+
16
+
...
+11
-4
Documentation/devicetree/bindings/arm/idle-states.txt
+11
-4
Documentation/devicetree/bindings/arm/idle-states.txt
···
241
241
- "psci"
242
242
# On ARM 32-bit systems this property is optional
243
243
244
-
The nodes describing the idle states (state) can only be defined within the
245
-
idle-states node, any other configuration is considered invalid and therefore
246
-
must be ignored.
244
+
This assumes that the "enable-method" property is set to "psci" in the cpu
245
+
node[6] that is responsible for setting up CPU idle management in the OS
246
+
implementation.
247
+
248
+
The nodes describing the idle states (state) can only be defined
249
+
within the idle-states node, any other configuration is considered invalid
250
+
and therefore must be ignored.
247
251
248
252
===========================================
249
253
4 - state node
···
691
687
Documentation/devicetree/bindings/arm/cpus.yaml
692
688
693
689
[2] ARM Linux Kernel documentation - PSCI bindings
694
-
Documentation/devicetree/bindings/arm/psci.txt
690
+
Documentation/devicetree/bindings/arm/psci.yaml
695
691
696
692
[3] ARM Server Base System Architecture (SBSA)
697
693
http://infocenter.arm.com/help/index.jsp
···
701
697
702
698
[5] Devicetree Specification
703
699
https://www.devicetree.org/specifications/
700
+
701
+
[6] ARM Linux Kernel documentation - Booting AArch64 Linux
702
+
Documentation/arm64/booting.txt
-12
Documentation/devicetree/bindings/arm/moxart.txt
-12
Documentation/devicetree/bindings/arm/moxart.txt
···
1
-
MOXA ART device tree bindings
2
-
3
-
Boards with the MOXA ART SoC shall have the following properties:
4
-
5
-
Required root node property:
6
-
7
-
compatible = "moxa,moxart";
8
-
9
-
Boards:
10
-
11
-
- UC-7112-LX: embedded computer
12
-
compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart"
+19
Documentation/devicetree/bindings/arm/moxart.yaml
+19
Documentation/devicetree/bindings/arm/moxart.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/arm/moxart.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: MOXA ART device tree bindings
8
+
9
+
maintainers:
10
+
- Jonas Jensen <jonas.jensen@gmail.com>
11
+
12
+
properties:
13
+
compatible:
14
+
description: UC-7112-LX embedded computer
15
+
items:
16
+
- const: moxa,moxart-uc-7112-lx
17
+
- const: moxa,moxart
18
+
19
+
...
-8
Documentation/devicetree/bindings/arm/nxp/lpc32xx.txt
-8
Documentation/devicetree/bindings/arm/nxp/lpc32xx.txt
···
1
-
NXP LPC32xx Platforms Device Tree Bindings
2
-
------------------------------------------
3
-
4
-
Boards with the NXP LPC32xx SoC shall have the following properties:
5
-
6
-
Required root node property:
7
-
8
-
compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250"
+25
Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml
+25
Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/arm/nxp/lpc32xx.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: NXP LPC32xx Platforms Device Tree Bindings
8
+
9
+
maintainers:
10
+
- Roland Stigge <stigge@antcom.de>
11
+
12
+
properties:
13
+
compatible:
14
+
oneOf:
15
+
- enum:
16
+
- nxp,lpc3220
17
+
- nxp,lpc3230
18
+
- nxp,lpc3240
19
+
- items:
20
+
- enum:
21
+
- ea,ea3250
22
+
- phytec,phy3250
23
+
- const: nxp,lpc3250
24
+
25
+
...
-111
Documentation/devicetree/bindings/arm/psci.txt
-111
Documentation/devicetree/bindings/arm/psci.txt
···
1
-
* Power State Coordination Interface (PSCI)
2
-
3
-
Firmware implementing the PSCI functions described in ARM document number
4
-
ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
5
-
processors") can be used by Linux to initiate various CPU-centric power
6
-
operations.
7
-
8
-
Issue A of the specification describes functions for CPU suspend, hotplug
9
-
and migration of secure software.
10
-
11
-
Functions are invoked by trapping to the privilege level of the PSCI
12
-
firmware (specified as part of the binding below) and passing arguments
13
-
in a manner similar to that specified by AAPCS:
14
-
15
-
r0 => 32-bit Function ID / return value
16
-
{r1 - r3} => Parameters
17
-
18
-
Note that the immediate field of the trapping instruction must be set
19
-
to #0.
20
-
21
-
22
-
Main node required properties:
23
-
24
-
- compatible : should contain at least one of:
25
-
26
-
* "arm,psci" : For implementations complying to PSCI versions prior
27
-
to 0.2.
28
-
For these cases function IDs must be provided.
29
-
30
-
* "arm,psci-0.2" : For implementations complying to PSCI 0.2.
31
-
Function IDs are not required and should be ignored by
32
-
an OS with PSCI 0.2 support, but are permitted to be
33
-
present for compatibility with existing software when
34
-
"arm,psci" is later in the compatible list.
35
-
36
-
* "arm,psci-1.0" : For implementations complying to PSCI 1.0.
37
-
PSCI 1.0 is backward compatible with PSCI 0.2 with
38
-
minor specification updates, as defined in the PSCI
39
-
specification[2].
40
-
41
-
- method : The method of calling the PSCI firmware. Permitted
42
-
values are:
43
-
44
-
"smc" : SMC #0, with the register assignments specified
45
-
in this binding.
46
-
47
-
"hvc" : HVC #0, with the register assignments specified
48
-
in this binding.
49
-
50
-
Main node optional properties:
51
-
52
-
- cpu_suspend : Function ID for CPU_SUSPEND operation
53
-
54
-
- cpu_off : Function ID for CPU_OFF operation
55
-
56
-
- cpu_on : Function ID for CPU_ON operation
57
-
58
-
- migrate : Function ID for MIGRATE operation
59
-
60
-
Device tree nodes that require usage of PSCI CPU_SUSPEND function (ie idle
61
-
state nodes, as per bindings in [1]) must specify the following properties:
62
-
63
-
- arm,psci-suspend-param
64
-
Usage: Required for state nodes[1] if the corresponding
65
-
idle-states node entry-method property is set
66
-
to "psci".
67
-
Value type: <u32>
68
-
Definition: power_state parameter to pass to the PSCI
69
-
suspend call.
70
-
71
-
Example:
72
-
73
-
Case 1: PSCI v0.1 only.
74
-
75
-
psci {
76
-
compatible = "arm,psci";
77
-
method = "smc";
78
-
cpu_suspend = <0x95c10000>;
79
-
cpu_off = <0x95c10001>;
80
-
cpu_on = <0x95c10002>;
81
-
migrate = <0x95c10003>;
82
-
};
83
-
84
-
Case 2: PSCI v0.2 only
85
-
86
-
psci {
87
-
compatible = "arm,psci-0.2";
88
-
method = "smc";
89
-
};
90
-
91
-
Case 3: PSCI v0.2 and PSCI v0.1.
92
-
93
-
A DTB may provide IDs for use by kernels without PSCI 0.2 support,
94
-
enabling firmware and hypervisors to support existing and new kernels.
95
-
These IDs will be ignored by kernels with PSCI 0.2 support, which will
96
-
use the standard PSCI 0.2 IDs exclusively.
97
-
98
-
psci {
99
-
compatible = "arm,psci-0.2", "arm,psci";
100
-
method = "hvc";
101
-
102
-
cpu_on = < arbitrary value >;
103
-
cpu_off = < arbitrary value >;
104
-
105
-
...
106
-
};
107
-
108
-
[1] Kernel documentation - ARM idle states bindings
109
-
Documentation/devicetree/bindings/arm/idle-states.txt
110
-
[2] Power State Coordination Interface (PSCI) specification
111
-
http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
+163
Documentation/devicetree/bindings/arm/psci.yaml
+163
Documentation/devicetree/bindings/arm/psci.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/arm/psci.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Power State Coordination Interface (PSCI)
8
+
9
+
maintainers:
10
+
- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11
+
12
+
description: |+
13
+
Firmware implementing the PSCI functions described in ARM document number
14
+
ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
15
+
processors") can be used by Linux to initiate various CPU-centric power
16
+
operations.
17
+
18
+
Issue A of the specification describes functions for CPU suspend, hotplug
19
+
and migration of secure software.
20
+
21
+
Functions are invoked by trapping to the privilege level of the PSCI
22
+
firmware (specified as part of the binding below) and passing arguments
23
+
in a manner similar to that specified by AAPCS:
24
+
25
+
r0 => 32-bit Function ID / return value
26
+
{r1 - r3} => Parameters
27
+
28
+
Note that the immediate field of the trapping instruction must be set
29
+
to #0.
30
+
31
+
[2] Power State Coordination Interface (PSCI) specification
32
+
http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
33
+
34
+
properties:
35
+
compatible:
36
+
oneOf:
37
+
- description:
38
+
For implementations complying to PSCI versions prior to 0.2.
39
+
const: arm,psci
40
+
41
+
- description:
42
+
For implementations complying to PSCI 0.2.
43
+
const: arm,psci-0.2
44
+
45
+
- description:
46
+
For implementations complying to PSCI 0.2.
47
+
Function IDs are not required and should be ignored by an OS with
48
+
PSCI 0.2 support, but are permitted to be present for compatibility
49
+
with existing software when "arm,psci" is later in the compatible
50
+
list.
51
+
items:
52
+
- const: arm,psci-0.2
53
+
- const: arm,psci
54
+
55
+
- description:
56
+
For implementations complying to PSCI 1.0.
57
+
const: arm,psci-1.0
58
+
59
+
- description:
60
+
For implementations complying to PSCI 1.0.
61
+
PSCI 1.0 is backward compatible with PSCI 0.2 with minor
62
+
specification updates, as defined in the PSCI specification[2].
63
+
items:
64
+
- const: arm,psci-1.0
65
+
- const: arm,psci-0.2
66
+
67
+
method:
68
+
description: The method of calling the PSCI firmware.
69
+
allOf:
70
+
- $ref: /schemas/types.yaml#/definitions/string-array
71
+
- enum:
72
+
# SMC #0, with the register assignments specified in this binding.
73
+
- smc
74
+
# HVC #0, with the register assignments specified in this binding.
75
+
- hvc
76
+
77
+
cpu_suspend:
78
+
$ref: /schemas/types.yaml#/definitions/uint32
79
+
description: Function ID for CPU_SUSPEND operation
80
+
81
+
cpu_off:
82
+
$ref: /schemas/types.yaml#/definitions/uint32
83
+
description: Function ID for CPU_OFF operation
84
+
85
+
cpu_on:
86
+
$ref: /schemas/types.yaml#/definitions/uint32
87
+
description: Function ID for CPU_ON operation
88
+
89
+
migrate:
90
+
$ref: /schemas/types.yaml#/definitions/uint32
91
+
description: Function ID for MIGRATE operation
92
+
93
+
arm,psci-suspend-param:
94
+
$ref: /schemas/types.yaml#/definitions/uint32
95
+
description: |
96
+
power_state parameter to pass to the PSCI suspend call.
97
+
98
+
Device tree nodes that require usage of PSCI CPU_SUSPEND function (ie
99
+
idle state nodes with entry-method property is set to "psci", as per
100
+
bindings in [1]) must specify this property.
101
+
102
+
[1] Kernel documentation - ARM idle states bindings
103
+
Documentation/devicetree/bindings/arm/idle-states.txt
104
+
105
+
106
+
required:
107
+
- compatible
108
+
- method
109
+
110
+
allOf:
111
+
- if:
112
+
properties:
113
+
compatible:
114
+
contains:
115
+
const: arm,psci
116
+
then:
117
+
required:
118
+
- cpu_off
119
+
- cpu_on
120
+
121
+
examples:
122
+
- |+
123
+
124
+
// Case 1: PSCI v0.1 only.
125
+
126
+
psci {
127
+
compatible = "arm,psci";
128
+
method = "smc";
129
+
cpu_suspend = <0x95c10000>;
130
+
cpu_off = <0x95c10001>;
131
+
cpu_on = <0x95c10002>;
132
+
migrate = <0x95c10003>;
133
+
};
134
+
135
+
- |+
136
+
137
+
// Case 2: PSCI v0.2 only
138
+
139
+
psci {
140
+
compatible = "arm,psci-0.2";
141
+
method = "smc";
142
+
};
143
+
144
+
145
+
- |+
146
+
147
+
// Case 3: PSCI v0.2 and PSCI v0.1.
148
+
149
+
/*
150
+
* A DTB may provide IDs for use by kernels without PSCI 0.2 support,
151
+
* enabling firmware and hypervisors to support existing and new kernels.
152
+
* These IDs will be ignored by kernels with PSCI 0.2 support, which will
153
+
* use the standard PSCI 0.2 IDs exclusively.
154
+
*/
155
+
156
+
psci {
157
+
compatible = "arm,psci-0.2", "arm,psci";
158
+
method = "hvc";
159
+
160
+
cpu_on = <0x95c10002>;
161
+
cpu_off = <0x95c10001>;
162
+
};
163
+
...
+14
Documentation/devicetree/bindings/arm/qcom.yaml
+14
Documentation/devicetree/bindings/arm/qcom.yaml
···
102
102
- const: qcom,msm8960
103
103
104
104
- items:
105
+
- enum:
106
+
- fairphone,fp2
107
+
- lge,hammerhead
108
+
- sony,xperia-amami
109
+
- sony,xperia-castor
110
+
- sony,xperia-honami
111
+
- const: qcom,msm8974
112
+
113
+
- items:
105
114
- const: qcom,msm8916-mtp/1
106
115
- const: qcom,msm8916-mtp
107
116
- const: qcom,msm8916
···
119
110
- const: qcom,msm8996-mtp
120
111
121
112
- items:
113
+
- enum:
114
+
- qcom,ipq4019-ap-dk04.1-c3
115
+
- qcom,ipq4019-ap-dk07.1-c1
116
+
- qcom,ipq4019-ap-dk07.1-c2
117
+
- qcom,ipq4019-dk04.1-c1
122
118
- const: qcom,ipq4019
123
119
124
120
- items:
-17
Documentation/devicetree/bindings/arm/rda.txt
-17
Documentation/devicetree/bindings/arm/rda.txt
···
1
-
RDA Micro platforms device tree bindings
2
-
----------------------------------------
3
-
4
-
RDA8810PL SoC
5
-
=============
6
-
7
-
Required root node properties:
8
-
9
-
- compatible : must contain "rda,8810pl"
10
-
11
-
12
-
Boards:
13
-
14
-
Root node property compatible must contain, depending on board:
15
-
16
-
- Orange Pi 2G-IoT: "xunlong,orangepi-2g-iot"
17
-
- Orange Pi i96: "xunlong,orangepi-i96"
+20
Documentation/devicetree/bindings/arm/rda.yaml
+20
Documentation/devicetree/bindings/arm/rda.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/arm/rda.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: RDA Micro platforms device tree bindings
8
+
9
+
maintainers:
10
+
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11
+
12
+
properties:
13
+
compatible:
14
+
items:
15
+
- enum:
16
+
- xunlong,orangepi-2g-iot # Orange Pi 2G-IoT
17
+
- xunlong,orangepi-i96 # Orange Pi i96
18
+
- const: rda,8810pl
19
+
20
+
...
+8
-9
Documentation/devicetree/bindings/common-properties.txt
+8
-9
Documentation/devicetree/bindings/common-properties.txt
···
5
5
----------
6
6
7
7
The Devicetree Specification does not define any properties related to hardware
8
-
byteswapping, but endianness issues show up frequently in porting Linux to
8
+
byte swapping, but endianness issues show up frequently in porting drivers to
9
9
different machine types. This document attempts to provide a consistent
10
-
way of handling byteswapping across drivers.
10
+
way of handling byte swapping across drivers.
11
11
12
12
Optional properties:
13
13
- big-endian: Boolean; force big endian register accesses
14
14
unconditionally (e.g. ioread32be/iowrite32be). Use this if you
15
-
know the peripheral always needs to be accessed in BE mode.
15
+
know the peripheral always needs to be accessed in big endian (BE) mode.
16
16
- little-endian: Boolean; force little endian register accesses
17
17
unconditionally (e.g. readl/writel). Use this if you know the
18
-
peripheral always needs to be accessed in LE mode.
18
+
peripheral always needs to be accessed in little endian (LE) mode.
19
19
- native-endian: Boolean; always use register accesses matched to the
20
20
endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21
-
BE vmlinux -> ioread32be/iowrite32be). In this case no byteswaps
21
+
BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22
22
will ever be performed. Use this if the hardware "self-adjusts"
23
23
register endianness based on the CPU's configured endianness.
24
24
25
25
If a binding supports these properties, then the binding should also
26
26
specify the default behavior if none of these properties are present.
27
27
In such cases, little-endian is the preferred default, but it is not
28
-
a requirement. The of_device_is_big_endian() and of_fdt_is_big_endian()
29
-
helper functions do assume that little-endian is the default, because
30
-
most existing (PCI-based) drivers implicitly default to LE by using
31
-
readl/writel for MMIO accesses.
28
+
a requirement. Some implementations assume that little-endian is
29
+
the default, because most existing (PCI-based) drivers implicitly
30
+
default to LE for their MMIO accesses.
32
31
33
32
Examples:
34
33
Scenario 1 : CPU in LE mode & device in LE mode.
+24
-1
Documentation/devicetree/bindings/display/simple-framebuffer.yaml
+24
-1
Documentation/devicetree/bindings/display/simple-framebuffer.yaml
···
126
126
# but usually they will be filled by the bootloader.
127
127
- compatible
128
128
129
+
allOf:
130
+
- if:
131
+
properties:
132
+
compatible:
133
+
contains:
134
+
const: allwinner,simple-framebuffer
135
+
136
+
then:
137
+
required:
138
+
- allwinner,pipeline
139
+
140
+
- if:
141
+
properties:
142
+
compatible:
143
+
contains:
144
+
const: amlogic,simple-framebuffer
145
+
146
+
then:
147
+
required:
148
+
- amlogic,pipeline
149
+
150
+
129
151
additionalProperties: false
130
152
131
153
examples:
···
161
139
#size-cells = <1>;
162
140
stdout-path = "display0";
163
141
framebuffer0: framebuffer@1d385000 {
164
-
compatible = "simple-framebuffer";
142
+
compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
143
+
allwinner,pipeline = "de_be0-lcd0";
165
144
reg = <0x1d385000 3840000>;
166
145
width = <1600>;
167
146
height = <1200>;
Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt
Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt
+14
-7
Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml
+14
-7
Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml
···
23
23
reg:
24
24
maxItems: 1
25
25
26
-
ti,linear-mapping-mode:
27
-
description: |
28
-
Enable linear mapping mode. If disabled, then it will use exponential
29
-
mapping mode in which the ramp up/down appears to have a more uniform
30
-
transition to the human eye.
31
-
type: boolean
26
+
'#address-cells':
27
+
const: 1
28
+
29
+
'#size-cells':
30
+
const: 0
32
31
33
32
required:
34
33
- compatible
35
34
- reg
35
+
- '#address-cells'
36
+
- '#size-cells'
36
37
37
38
patternProperties:
38
39
"^led@[01]$":
···
49
48
in this property. The two current sinks can be controlled
50
49
independently with both banks, or bank A can be configured to control
51
50
both sinks with the led-sources property.
52
-
maxItems: 1
53
51
minimum: 0
54
52
maximum: 1
55
53
···
72
72
description: Maximum brightness that is allowed during runtime.
73
73
minimum: 0
74
74
maximum: 255
75
+
76
+
ti,linear-mapping-mode:
77
+
description: |
78
+
Enable linear mapping mode. If disabled, then it will use exponential
79
+
mapping mode in which the ramp up/down appears to have a more uniform
80
+
transition to the human eye.
81
+
type: boolean
75
82
76
83
required:
77
84
- reg
-1
Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml
-1
Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml
+56
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
+56
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings
8
+
9
+
allOf:
10
+
- $ref: "ethernet-controller.yaml#"
11
+
12
+
maintainers:
13
+
- Chen-Yu Tsai <wens@csie.org>
14
+
- Maxime Ripard <maxime.ripard@bootlin.com>
15
+
16
+
properties:
17
+
compatible:
18
+
const: allwinner,sun4i-a10-emac
19
+
20
+
reg:
21
+
maxItems: 1
22
+
23
+
interrupts:
24
+
maxItems: 1
25
+
26
+
clocks:
27
+
maxItems: 1
28
+
29
+
allwinner,sram:
30
+
description: Phandle to the device SRAM
31
+
$ref: /schemas/types.yaml#/definitions/phandle-array
32
+
33
+
required:
34
+
- compatible
35
+
- reg
36
+
- interrupts
37
+
- clocks
38
+
- phy-handle
39
+
- allwinner,sram
40
+
41
+
examples:
42
+
- |
43
+
emac: ethernet@1c0b000 {
44
+
compatible = "allwinner,sun4i-a10-emac";
45
+
reg = <0x01c0b000 0x1000>;
46
+
interrupts = <55>;
47
+
clocks = <&ahb_gates 17>;
48
+
phy-handle = <&phy0>;
49
+
allwinner,sram = <&emac_sram 1>;
50
+
};
51
+
52
+
# FIXME: We should set it, but it would report all the generic
53
+
# properties as additional properties.
54
+
# additionalProperties: false
55
+
56
+
...
+70
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
+70
Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Allwinner A10 MDIO Controller Device Tree Bindings
8
+
9
+
maintainers:
10
+
- Chen-Yu Tsai <wens@csie.org>
11
+
- Maxime Ripard <maxime.ripard@bootlin.com>
12
+
13
+
allOf:
14
+
- $ref: "mdio.yaml#"
15
+
16
+
# Select every compatible, including the deprecated ones. This way, we
17
+
# will be able to report a warning when we have that compatible, since
18
+
# we will validate the node thanks to the select, but won't report it
19
+
# as a valid value in the compatible property description
20
+
select:
21
+
properties:
22
+
compatible:
23
+
enum:
24
+
- allwinner,sun4i-a10-mdio
25
+
26
+
# Deprecated
27
+
- allwinner,sun4i-mdio
28
+
29
+
required:
30
+
- compatible
31
+
32
+
properties:
33
+
"#address-cells":
34
+
const: 1
35
+
36
+
"#size-cells":
37
+
const: 0
38
+
39
+
compatible:
40
+
const: allwinner,sun4i-a10-mdio
41
+
42
+
reg:
43
+
maxItems: 1
44
+
45
+
phy-supply:
46
+
description: PHY regulator
47
+
48
+
required:
49
+
- compatible
50
+
- reg
51
+
52
+
examples:
53
+
- |
54
+
mdio@1c0b080 {
55
+
compatible = "allwinner,sun4i-a10-mdio";
56
+
reg = <0x01c0b080 0x14>;
57
+
#address-cells = <1>;
58
+
#size-cells = <0>;
59
+
phy-supply = <®_emac_3v3>;
60
+
61
+
phy0: ethernet-phy@0 {
62
+
reg = <0>;
63
+
};
64
+
};
65
+
66
+
# FIXME: We should set it, but it would report all the generic
67
+
# properties as additional properties.
68
+
# additionalProperties: false
69
+
70
+
...
-19
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
-19
Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
···
1
-
* Allwinner EMAC ethernet controller
2
-
3
-
Required properties:
4
-
- compatible: should be "allwinner,sun4i-a10-emac" (Deprecated:
5
-
"allwinner,sun4i-emac")
6
-
- reg: address and length of the register set for the device.
7
-
- interrupts: interrupt for the device
8
-
- phy: see ethernet.txt file in the same directory.
9
-
- clocks: A phandle to the reference clock for this device
10
-
11
-
Example:
12
-
13
-
emac: ethernet@1c0b000 {
14
-
compatible = "allwinner,sun4i-a10-emac";
15
-
reg = <0x01c0b000 0x1000>;
16
-
interrupts = <55>;
17
-
clocks = <&ahb_gates 17>;
18
-
phy = <&phy0>;
19
-
};
-27
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
-27
Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
···
1
-
* Allwinner A10 MDIO Ethernet Controller interface
2
-
3
-
Required properties:
4
-
- compatible: should be "allwinner,sun4i-a10-mdio"
5
-
(Deprecated: "allwinner,sun4i-mdio").
6
-
- reg: address and length of the register set for the device.
7
-
8
-
Optional properties:
9
-
- phy-supply: phandle to a regulator if the PHY needs one
10
-
11
-
Example at the SoC level:
12
-
mdio@1c0b080 {
13
-
compatible = "allwinner,sun4i-a10-mdio";
14
-
reg = <0x01c0b080 0x14>;
15
-
#address-cells = <1>;
16
-
#size-cells = <0>;
17
-
};
18
-
19
-
And at the board level:
20
-
21
-
mdio@1c0b080 {
22
-
phy-supply = <®_emac_3v3>;
23
-
24
-
phy0: ethernet-phy@0 {
25
-
reg = <0>;
26
-
};
27
-
};
-27
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
-27
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
···
1
-
* Allwinner GMAC ethernet controller
2
-
3
-
This device is a platform glue layer for stmmac.
4
-
Please see stmmac.txt for the other unchanged properties.
5
-
6
-
Required properties:
7
-
- compatible: Should be "allwinner,sun7i-a20-gmac"
8
-
- clocks: Should contain the GMAC main clock, and tx clock
9
-
The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
10
-
- clock-names: Should contain the clock names "stmmaceth",
11
-
and "allwinner_gmac_tx"
12
-
13
-
Optional properties:
14
-
- phy-supply: phandle to a regulator if the PHY needs one
15
-
16
-
Examples:
17
-
18
-
gmac: ethernet@1c50000 {
19
-
compatible = "allwinner,sun7i-a20-gmac";
20
-
reg = <0x01c50000 0x10000>,
21
-
<0x01c20164 0x4>;
22
-
interrupts = <0 85 1>;
23
-
interrupt-names = "macirq";
24
-
clocks = <&ahb_gates 49>, <&gmac_tx>;
25
-
clock-names = "stmmaceth", "allwinner_gmac_tx";
26
-
phy-mode = "mii";
27
-
};
+65
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
+65
Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Allwinner A20 GMAC Device Tree Bindings
8
+
9
+
allOf:
10
+
- $ref: "snps,dwmac.yaml#"
11
+
12
+
maintainers:
13
+
- Chen-Yu Tsai <wens@csie.org>
14
+
- Maxime Ripard <maxime.ripard@bootlin.com>
15
+
16
+
properties:
17
+
compatible:
18
+
const: allwinner,sun7i-a20-gmac
19
+
20
+
interrupts:
21
+
maxItems: 1
22
+
23
+
interrupt-names:
24
+
const: macirq
25
+
26
+
clocks:
27
+
items:
28
+
- description: GMAC main clock
29
+
- description: TX clock
30
+
31
+
clock-names:
32
+
items:
33
+
- const: stmmaceth
34
+
- const: allwinner_gmac_tx
35
+
36
+
phy-supply:
37
+
description:
38
+
PHY regulator
39
+
40
+
required:
41
+
- compatible
42
+
- reg
43
+
- interrupts
44
+
- interrupt-names
45
+
- clocks
46
+
- clock-names
47
+
- phy-mode
48
+
49
+
examples:
50
+
- |
51
+
gmac: ethernet@1c50000 {
52
+
compatible = "allwinner,sun7i-a20-gmac";
53
+
reg = <0x01c50000 0x10000>;
54
+
interrupts = <0 85 1>;
55
+
interrupt-names = "macirq";
56
+
clocks = <&ahb_gates 49>, <&gmac_tx>;
57
+
clock-names = "stmmaceth", "allwinner_gmac_tx";
58
+
phy-mode = "mii";
59
+
};
60
+
61
+
# FIXME: We should set it, but it would report all the generic
62
+
# properties as additional properties.
63
+
# additionalProperties: false
64
+
65
+
...
+321
Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
+321
Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-gmac.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Allwinner A83t EMAC Device Tree Bindings
8
+
9
+
maintainers:
10
+
- Chen-Yu Tsai <wens@csie.org>
11
+
- Maxime Ripard <maxime.ripard@bootlin.com>
12
+
13
+
properties:
14
+
compatible:
15
+
oneOf:
16
+
- const: allwinner,sun8i-a83t-emac
17
+
- const: allwinner,sun8i-h3-emac
18
+
- const: allwinner,sun8i-r40-emac
19
+
- const: allwinner,sun8i-v3s-emac
20
+
- const: allwinner,sun50i-a64-emac
21
+
- items:
22
+
- const: allwinner,sun50i-h6-emac
23
+
- const: allwinner,sun50i-a64-emac
24
+
25
+
reg:
26
+
maxItems: 1
27
+
28
+
interrupts:
29
+
maxItems: 1
30
+
31
+
interrupt-names:
32
+
const: macirq
33
+
34
+
clocks:
35
+
maxItems: 1
36
+
37
+
clock-names:
38
+
const: stmmaceth
39
+
40
+
syscon:
41
+
$ref: /schemas/types.yaml#definitions/phandle
42
+
description:
43
+
Phandle to the device containing the EMAC or GMAC clock
44
+
register
45
+
46
+
required:
47
+
- compatible
48
+
- reg
49
+
- interrupts
50
+
- interrupt-names
51
+
- clocks
52
+
- clock-names
53
+
- resets
54
+
- reset-names
55
+
- phy-handle
56
+
- phy-mode
57
+
- syscon
58
+
59
+
allOf:
60
+
- $ref: "snps,dwmac.yaml#"
61
+
- if:
62
+
properties:
63
+
compatible:
64
+
contains:
65
+
enum:
66
+
- allwinner,sun8i-a83t-emac
67
+
- allwinner,sun8i-h3-emac
68
+
- allwinner,sun8i-v3s-emac
69
+
- allwinner,sun50i-a64-emac
70
+
71
+
then:
72
+
properties:
73
+
allwinner,tx-delay-ps:
74
+
default: 0
75
+
minimum: 0
76
+
maximum: 700
77
+
multipleOf: 100
78
+
description:
79
+
External RGMII PHY TX clock delay chain value in ps.
80
+
81
+
allwinner,rx-delay-ps:
82
+
default: 0
83
+
minimum: 0
84
+
maximum: 3100
85
+
multipleOf: 100
86
+
description:
87
+
External RGMII PHY TX clock delay chain value in ps.
88
+
89
+
- if:
90
+
properties:
91
+
compatible:
92
+
contains:
93
+
enum:
94
+
- allwinner,sun8i-r40-emac
95
+
96
+
then:
97
+
properties:
98
+
allwinner,rx-delay-ps:
99
+
default: 0
100
+
minimum: 0
101
+
maximum: 700
102
+
multipleOf: 100
103
+
description:
104
+
External RGMII PHY TX clock delay chain value in ps.
105
+
106
+
- if:
107
+
properties:
108
+
compatible:
109
+
contains:
110
+
enum:
111
+
- allwinner,sun8i-h3-emac
112
+
- allwinner,sun8i-v3s-emac
113
+
114
+
then:
115
+
properties:
116
+
allwinner,leds-active-low:
117
+
$ref: /schemas/types.yaml#definitions/flag
118
+
description:
119
+
EPHY LEDs are active low.
120
+
121
+
mdio-mux:
122
+
type: object
123
+
124
+
properties:
125
+
compatible:
126
+
const: allwinner,sun8i-h3-mdio-mux
127
+
128
+
mdio-parent-bus:
129
+
$ref: /schemas/types.yaml#definitions/phandle
130
+
description:
131
+
Phandle to EMAC MDIO.
132
+
133
+
mdio@1:
134
+
type: object
135
+
description: Internal MDIO Bus
136
+
137
+
properties:
138
+
"#address-cells":
139
+
const: 1
140
+
141
+
"#size-cells":
142
+
const: 0
143
+
144
+
compatible:
145
+
const: allwinner,sun8i-h3-mdio-internal
146
+
147
+
reg:
148
+
const: 1
149
+
150
+
patternProperties:
151
+
"^ethernet-phy@[0-9a-f]$":
152
+
type: object
153
+
description:
154
+
Integrated PHY node
155
+
156
+
properties:
157
+
clocks:
158
+
maxItems: 1
159
+
160
+
resets:
161
+
maxItems: 1
162
+
163
+
required:
164
+
- clocks
165
+
- resets
166
+
167
+
168
+
mdio@2:
169
+
type: object
170
+
description: External MDIO Bus (H3 only)
171
+
172
+
properties:
173
+
"#address-cells":
174
+
const: 1
175
+
176
+
"#size-cells":
177
+
const: 0
178
+
179
+
reg:
180
+
const: 2
181
+
182
+
required:
183
+
- compatible
184
+
- mdio-parent-bus
185
+
- mdio@1
186
+
187
+
examples:
188
+
- |
189
+
ethernet@1c0b000 {
190
+
compatible = "allwinner,sun8i-h3-emac";
191
+
syscon = <&syscon>;
192
+
reg = <0x01c0b000 0x104>;
193
+
interrupts = <0 82 1>;
194
+
interrupt-names = "macirq";
195
+
resets = <&ccu 12>;
196
+
reset-names = "stmmaceth";
197
+
clocks = <&ccu 27>;
198
+
clock-names = "stmmaceth";
199
+
200
+
phy-handle = <&int_mii_phy>;
201
+
phy-mode = "mii";
202
+
allwinner,leds-active-low;
203
+
204
+
mdio1: mdio {
205
+
#address-cells = <1>;
206
+
#size-cells = <0>;
207
+
compatible = "snps,dwmac-mdio";
208
+
};
209
+
210
+
mdio-mux {
211
+
compatible = "allwinner,sun8i-h3-mdio-mux";
212
+
#address-cells = <1>;
213
+
#size-cells = <0>;
214
+
215
+
mdio-parent-bus = <&mdio1>;
216
+
217
+
int_mii_phy: mdio@1 {
218
+
compatible = "allwinner,sun8i-h3-mdio-internal";
219
+
reg = <1>;
220
+
#address-cells = <1>;
221
+
#size-cells = <0>;
222
+
223
+
ethernet-phy@1 {
224
+
reg = <1>;
225
+
clocks = <&ccu 67>;
226
+
resets = <&ccu 39>;
227
+
phy-is-integrated;
228
+
};
229
+
};
230
+
231
+
mdio@2 {
232
+
reg = <2>;
233
+
#address-cells = <1>;
234
+
#size-cells = <0>;
235
+
};
236
+
};
237
+
};
238
+
239
+
- |
240
+
ethernet@1c0b000 {
241
+
compatible = "allwinner,sun8i-h3-emac";
242
+
syscon = <&syscon>;
243
+
reg = <0x01c0b000 0x104>;
244
+
interrupts = <0 82 1>;
245
+
interrupt-names = "macirq";
246
+
resets = <&ccu 12>;
247
+
reset-names = "stmmaceth";
248
+
clocks = <&ccu 27>;
249
+
clock-names = "stmmaceth";
250
+
251
+
phy-handle = <&ext_rgmii_phy>;
252
+
phy-mode = "rgmii";
253
+
allwinner,leds-active-low;
254
+
255
+
mdio2: mdio {
256
+
#address-cells = <1>;
257
+
#size-cells = <0>;
258
+
compatible = "snps,dwmac-mdio";
259
+
};
260
+
261
+
mdio-mux {
262
+
compatible = "allwinner,sun8i-h3-mdio-mux";
263
+
#address-cells = <1>;
264
+
#size-cells = <0>;
265
+
mdio-parent-bus = <&mdio2>;
266
+
267
+
mdio@1 {
268
+
compatible = "allwinner,sun8i-h3-mdio-internal";
269
+
reg = <1>;
270
+
#address-cells = <1>;
271
+
#size-cells = <0>;
272
+
273
+
ethernet-phy@1 {
274
+
reg = <1>;
275
+
clocks = <&ccu 67>;
276
+
resets = <&ccu 39>;
277
+
};
278
+
};
279
+
280
+
mdio@2 {
281
+
reg = <2>;
282
+
#address-cells = <1>;
283
+
#size-cells = <0>;
284
+
285
+
ext_rgmii_phy: ethernet-phy@1 {
286
+
reg = <1>;
287
+
};
288
+
};
289
+
};
290
+
};
291
+
292
+
- |
293
+
ethernet@1c0b000 {
294
+
compatible = "allwinner,sun8i-a83t-emac";
295
+
syscon = <&syscon>;
296
+
reg = <0x01c0b000 0x104>;
297
+
interrupts = <0 82 1>;
298
+
interrupt-names = "macirq";
299
+
resets = <&ccu 13>;
300
+
reset-names = "stmmaceth";
301
+
clocks = <&ccu 27>;
302
+
clock-names = "stmmaceth";
303
+
phy-handle = <&ext_rgmii_phy1>;
304
+
phy-mode = "rgmii";
305
+
306
+
mdio {
307
+
compatible = "snps,dwmac-mdio";
308
+
#address-cells = <1>;
309
+
#size-cells = <0>;
310
+
311
+
ext_rgmii_phy1: ethernet-phy@1 {
312
+
reg = <1>;
313
+
};
314
+
};
315
+
};
316
+
317
+
# FIXME: We should set it, but it would report all the generic
318
+
# properties as additional properties.
319
+
# additionalProperties: false
320
+
321
+
...
-201
Documentation/devicetree/bindings/net/dwmac-sun8i.txt
-201
Documentation/devicetree/bindings/net/dwmac-sun8i.txt
···
1
-
* Allwinner sun8i GMAC ethernet controller
2
-
3
-
This device is a platform glue layer for stmmac.
4
-
Please see stmmac.txt for the other unchanged properties.
5
-
6
-
Required properties:
7
-
- compatible: must be one of the following string:
8
-
"allwinner,sun8i-a83t-emac"
9
-
"allwinner,sun8i-h3-emac"
10
-
"allwinner,sun8i-r40-gmac"
11
-
"allwinner,sun8i-v3s-emac"
12
-
"allwinner,sun50i-a64-emac"
13
-
"allwinner,sun50i-h6-emac", "allwinner-sun50i-a64-emac"
14
-
- reg: address and length of the register for the device.
15
-
- interrupts: interrupt for the device
16
-
- interrupt-names: must be "macirq"
17
-
- clocks: A phandle to the reference clock for this device
18
-
- clock-names: must be "stmmaceth"
19
-
- resets: A phandle to the reset control for this device
20
-
- reset-names: must be "stmmaceth"
21
-
- phy-mode: See ethernet.txt
22
-
- phy-handle: See ethernet.txt
23
-
- syscon: A phandle to the device containing the EMAC or GMAC clock register
24
-
25
-
Optional properties:
26
-
- allwinner,tx-delay-ps: TX clock delay chain value in ps.
27
-
Range is 0-700. Default is 0.
28
-
Unavailable for allwinner,sun8i-r40-gmac
29
-
- allwinner,rx-delay-ps: RX clock delay chain value in ps.
30
-
Range is 0-3100. Default is 0.
31
-
Range is 0-700 for allwinner,sun8i-r40-gmac
32
-
Both delay properties need to be a multiple of 100. They control the
33
-
clock delay for external RGMII PHY. They do not apply to the internal
34
-
PHY or external non-RGMII PHYs.
35
-
36
-
Optional properties for the following compatibles:
37
-
- "allwinner,sun8i-h3-emac",
38
-
- "allwinner,sun8i-v3s-emac":
39
-
- allwinner,leds-active-low: EPHY LEDs are active low
40
-
41
-
Required child node of emac:
42
-
- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio"
43
-
44
-
Required properties of the mdio node:
45
-
- #address-cells: shall be 1
46
-
- #size-cells: shall be 0
47
-
48
-
The device node referenced by "phy" or "phy-handle" must be a child node
49
-
of the mdio node. See phy.txt for the generic PHY bindings.
50
-
51
-
The following compatibles require that the emac node have a mdio-mux child
52
-
node called "mdio-mux":
53
-
- "allwinner,sun8i-h3-emac"
54
-
- "allwinner,sun8i-v3s-emac":
55
-
Required properties for the mdio-mux node:
56
-
- compatible = "allwinner,sun8i-h3-mdio-mux"
57
-
- mdio-parent-bus: a phandle to EMAC mdio
58
-
- one child mdio for the integrated mdio with the compatible
59
-
"allwinner,sun8i-h3-mdio-internal"
60
-
- one child mdio for the external mdio if present (V3s have none)
61
-
Required properties for the mdio-mux children node:
62
-
- reg: 1 for internal MDIO bus, 2 for external MDIO bus
63
-
64
-
The following compatibles require a PHY node representing the integrated
65
-
PHY, under the integrated MDIO bus node if an mdio-mux node is used:
66
-
- "allwinner,sun8i-h3-emac",
67
-
- "allwinner,sun8i-v3s-emac":
68
-
69
-
Additional information regarding generic multiplexer properties can be found
70
-
at Documentation/devicetree/bindings/net/mdio-mux.txt
71
-
72
-
Required properties of the integrated phy node:
73
-
- clocks: a phandle to the reference clock for the EPHY
74
-
- resets: a phandle to the reset control for the EPHY
75
-
- Must be a child of the integrated mdio
76
-
77
-
Example with integrated PHY:
78
-
emac: ethernet@1c0b000 {
79
-
compatible = "allwinner,sun8i-h3-emac";
80
-
syscon = <&syscon>;
81
-
reg = <0x01c0b000 0x104>;
82
-
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
83
-
interrupt-names = "macirq";
84
-
resets = <&ccu RST_BUS_EMAC>;
85
-
reset-names = "stmmaceth";
86
-
clocks = <&ccu CLK_BUS_EMAC>;
87
-
clock-names = "stmmaceth";
88
-
89
-
phy-handle = <&int_mii_phy>;
90
-
phy-mode = "mii";
91
-
allwinner,leds-active-low;
92
-
93
-
mdio: mdio {
94
-
#address-cells = <1>;
95
-
#size-cells = <0>;
96
-
compatible = "snps,dwmac-mdio";
97
-
};
98
-
99
-
mdio-mux {
100
-
compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
101
-
#address-cells = <1>;
102
-
#size-cells = <0>;
103
-
104
-
mdio-parent-bus = <&mdio>;
105
-
106
-
int_mdio: mdio@1 {
107
-
compatible = "allwinner,sun8i-h3-mdio-internal";
108
-
reg = <1>;
109
-
#address-cells = <1>;
110
-
#size-cells = <0>;
111
-
int_mii_phy: ethernet-phy@1 {
112
-
reg = <1>;
113
-
clocks = <&ccu CLK_BUS_EPHY>;
114
-
resets = <&ccu RST_BUS_EPHY>;
115
-
phy-is-integrated;
116
-
};
117
-
};
118
-
ext_mdio: mdio@2 {
119
-
reg = <2>;
120
-
#address-cells = <1>;
121
-
#size-cells = <0>;
122
-
};
123
-
};
124
-
};
125
-
126
-
Example with external PHY:
127
-
emac: ethernet@1c0b000 {
128
-
compatible = "allwinner,sun8i-h3-emac";
129
-
syscon = <&syscon>;
130
-
reg = <0x01c0b000 0x104>;
131
-
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
132
-
interrupt-names = "macirq";
133
-
resets = <&ccu RST_BUS_EMAC>;
134
-
reset-names = "stmmaceth";
135
-
clocks = <&ccu CLK_BUS_EMAC>;
136
-
clock-names = "stmmaceth";
137
-
138
-
phy-handle = <&ext_rgmii_phy>;
139
-
phy-mode = "rgmii";
140
-
allwinner,leds-active-low;
141
-
142
-
mdio: mdio {
143
-
#address-cells = <1>;
144
-
#size-cells = <0>;
145
-
compatible = "snps,dwmac-mdio";
146
-
};
147
-
148
-
mdio-mux {
149
-
compatible = "allwinner,sun8i-h3-mdio-mux";
150
-
#address-cells = <1>;
151
-
#size-cells = <0>;
152
-
153
-
mdio-parent-bus = <&mdio>;
154
-
155
-
int_mdio: mdio@1 {
156
-
compatible = "allwinner,sun8i-h3-mdio-internal";
157
-
reg = <1>;
158
-
#address-cells = <1>;
159
-
#size-cells = <0>;
160
-
int_mii_phy: ethernet-phy@1 {
161
-
reg = <1>;
162
-
clocks = <&ccu CLK_BUS_EPHY>;
163
-
resets = <&ccu RST_BUS_EPHY>;
164
-
};
165
-
};
166
-
ext_mdio: mdio@2 {
167
-
reg = <2>;
168
-
#address-cells = <1>;
169
-
#size-cells = <0>;
170
-
ext_rgmii_phy: ethernet-phy@1 {
171
-
reg = <1>;
172
-
};
173
-
}:
174
-
};
175
-
};
176
-
177
-
Example with SoC without integrated PHY
178
-
179
-
emac: ethernet@1c0b000 {
180
-
compatible = "allwinner,sun8i-a83t-emac";
181
-
syscon = <&syscon>;
182
-
reg = <0x01c0b000 0x104>;
183
-
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
184
-
interrupt-names = "macirq";
185
-
resets = <&ccu RST_BUS_EMAC>;
186
-
reset-names = "stmmaceth";
187
-
clocks = <&ccu CLK_BUS_EMAC>;
188
-
clock-names = "stmmaceth";
189
-
190
-
phy-handle = <&ext_rgmii_phy>;
191
-
phy-mode = "rgmii";
192
-
193
-
mdio: mdio {
194
-
compatible = "snps,dwmac-mdio";
195
-
#address-cells = <1>;
196
-
#size-cells = <0>;
197
-
ext_rgmii_phy: ethernet-phy@1 {
198
-
reg = <1>;
199
-
};
200
-
};
201
-
};
+206
Documentation/devicetree/bindings/net/ethernet-controller.yaml
+206
Documentation/devicetree/bindings/net/ethernet-controller.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Ethernet Controller Generic Binding
8
+
9
+
maintainers:
10
+
- David S. Miller <davem@davemloft.net>
11
+
12
+
properties:
13
+
$nodename:
14
+
pattern: "^ethernet(@.*)?$"
15
+
16
+
local-mac-address:
17
+
allOf:
18
+
- $ref: /schemas/types.yaml#definitions/uint8-array
19
+
- items:
20
+
- minItems: 6
21
+
maxItems: 6
22
+
description:
23
+
Specifies the MAC address that was assigned to the network device.
24
+
25
+
mac-address:
26
+
allOf:
27
+
- $ref: /schemas/types.yaml#definitions/uint8-array
28
+
- items:
29
+
- minItems: 6
30
+
maxItems: 6
31
+
description:
32
+
Specifies the MAC address that was last used by the boot
33
+
program; should be used in cases where the MAC address assigned
34
+
to the device by the boot program is different from the
35
+
local-mac-address property.
36
+
37
+
max-frame-size:
38
+
$ref: /schemas/types.yaml#definitions/uint32
39
+
description:
40
+
Maximum transfer unit (IEEE defined MTU), rather than the
41
+
maximum frame size (there\'s contradiction in the Devicetree
42
+
Specification).
43
+
44
+
max-speed:
45
+
$ref: /schemas/types.yaml#definitions/uint32
46
+
description:
47
+
Specifies maximum speed in Mbit/s supported by the device.
48
+
49
+
nvmem-cells:
50
+
maxItems: 1
51
+
description:
52
+
Reference to an nvmem node for the MAC address
53
+
54
+
nvmem-cells-names:
55
+
const: mac-address
56
+
57
+
phy-connection-type:
58
+
description:
59
+
Operation mode of the PHY interface
60
+
enum:
61
+
# There is not a standard bus between the MAC and the PHY,
62
+
# something proprietary is being used to embed the PHY in the
63
+
# MAC.
64
+
- internal
65
+
- mii
66
+
- gmii
67
+
- sgmii
68
+
- qsgmii
69
+
- tbi
70
+
- rev-mii
71
+
- rmii
72
+
73
+
# RX and TX delays are added by the MAC when required
74
+
- rgmii
75
+
76
+
# RGMII with internal RX and TX delays provided by the PHY,
77
+
# the MAC should not add the RX or TX delays in this case
78
+
- rgmii-id
79
+
80
+
# RGMII with internal RX delay provided by the PHY, the MAC
81
+
# should not add an RX delay in this case
82
+
- rgmii-rxid
83
+
84
+
# RGMII with internal TX delay provided by the PHY, the MAC
85
+
# should not add an TX delay in this case
86
+
- rgmii-txid
87
+
- rtbi
88
+
- smii
89
+
- xgmii
90
+
- trgmii
91
+
- 1000base-x
92
+
- 2500base-x
93
+
- rxaui
94
+
- xaui
95
+
96
+
# 10GBASE-KR, XFI, SFI
97
+
- 10gbase-kr
98
+
- usxgmii
99
+
100
+
phy-mode:
101
+
$ref: "#/properties/phy-connection-type"
102
+
103
+
phy-handle:
104
+
$ref: /schemas/types.yaml#definitions/phandle
105
+
description:
106
+
Specifies a reference to a node representing a PHY device.
107
+
108
+
phy:
109
+
$ref: "#/properties/phy-handle"
110
+
deprecated: true
111
+
112
+
phy-device:
113
+
$ref: "#/properties/phy-handle"
114
+
deprecated: true
115
+
116
+
rx-fifo-depth:
117
+
$ref: /schemas/types.yaml#definitions/uint32
118
+
description:
119
+
The size of the controller\'s receive fifo in bytes. This is used
120
+
for components that can have configurable receive fifo sizes,
121
+
and is useful for determining certain configuration settings
122
+
such as flow control thresholds.
123
+
124
+
tx-fifo-depth:
125
+
$ref: /schemas/types.yaml#definitions/uint32
126
+
description:
127
+
The size of the controller\'s transmit fifo in bytes. This
128
+
is used for components that can have configurable fifo sizes.
129
+
130
+
managed:
131
+
allOf:
132
+
- $ref: /schemas/types.yaml#definitions/string
133
+
- default: auto
134
+
enum:
135
+
- auto
136
+
- in-band-status
137
+
description:
138
+
Specifies the PHY management type. If auto is set and fixed-link
139
+
is not specified, it uses MDIO for management.
140
+
141
+
fixed-link:
142
+
allOf:
143
+
- if:
144
+
type: array
145
+
then:
146
+
deprecated: true
147
+
minItems: 1
148
+
maxItems: 1
149
+
items:
150
+
items:
151
+
- minimum: 0
152
+
maximum: 31
153
+
description:
154
+
Emulated PHY ID, choose any but unique to the all
155
+
specified fixed-links
156
+
157
+
- enum: [0, 1]
158
+
description:
159
+
Duplex configuration. 0 for half duplex or 1 for
160
+
full duplex
161
+
162
+
- enum: [10, 100, 1000]
163
+
description:
164
+
Link speed in Mbits/sec.
165
+
166
+
- enum: [0, 1]
167
+
description:
168
+
Pause configuration. 0 for no pause, 1 for pause
169
+
170
+
- enum: [0, 1]
171
+
description:
172
+
Asymmetric pause configuration. 0 for no asymmetric
173
+
pause, 1 for asymmetric pause
174
+
175
+
176
+
- if:
177
+
type: object
178
+
then:
179
+
properties:
180
+
speed:
181
+
allOf:
182
+
- $ref: /schemas/types.yaml#definitions/uint32
183
+
- enum: [10, 100, 1000]
184
+
description:
185
+
Link speed.
186
+
187
+
full-duplex:
188
+
$ref: /schemas/types.yaml#definitions/flag
189
+
description:
190
+
Indicates that full-duplex is used. When absent, half
191
+
duplex is assumed.
192
+
193
+
asym-pause:
194
+
$ref: /schemas/types.yaml#definitions/flag
195
+
description:
196
+
Indicates that asym_pause should be enabled.
197
+
198
+
link-gpios:
199
+
maxItems: 1
200
+
description:
201
+
GPIO to determine if the link is up
202
+
203
+
required:
204
+
- speed
205
+
206
+
...
+177
Documentation/devicetree/bindings/net/ethernet-phy.yaml
+177
Documentation/devicetree/bindings/net/ethernet-phy.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Ethernet PHY Generic Binding
8
+
9
+
maintainers:
10
+
- Andrew Lunn <andrew@lunn.ch>
11
+
- Florian Fainelli <f.fainelli@gmail.com>
12
+
- Heiner Kallweit <hkallweit1@gmail.com>
13
+
14
+
# The dt-schema tools will generate a select statement first by using
15
+
# the compatible, and second by using the node name if any. In our
16
+
# case, the node name is the one we want to match on, while the
17
+
# compatible is optional.
18
+
select:
19
+
properties:
20
+
$nodename:
21
+
pattern: "^ethernet-phy(@[a-f0-9]+)?$"
22
+
23
+
required:
24
+
- $nodename
25
+
26
+
properties:
27
+
$nodename:
28
+
pattern: "^ethernet-phy(@[a-f0-9]+)?$"
29
+
30
+
compatible:
31
+
oneOf:
32
+
- const: ethernet-phy-ieee802.3-c22
33
+
description: PHYs that implement IEEE802.3 clause 22
34
+
- const: ethernet-phy-ieee802.3-c45
35
+
description: PHYs that implement IEEE802.3 clause 45
36
+
- pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
37
+
description:
38
+
If the PHY reports an incorrect ID (or none at all) then the
39
+
compatible list may contain an entry with the correct PHY ID
40
+
in the above form.
41
+
The first group of digits is the 16 bit Phy Identifier 1
42
+
register, this is the chip vendor OUI bits 3:18. The
43
+
second group of digits is the Phy Identifier 2 register,
44
+
this is the chip vendor OUI bits 19:24, followed by 10
45
+
bits of a vendor specific ID.
46
+
- items:
47
+
- pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
48
+
- const: ethernet-phy-ieee802.3-c45
49
+
50
+
reg:
51
+
minimum: 0
52
+
maximum: 31
53
+
description:
54
+
The ID number for the PHY.
55
+
56
+
interrupts:
57
+
maxItems: 1
58
+
59
+
max-speed:
60
+
enum:
61
+
- 10
62
+
- 100
63
+
- 1000
64
+
- 2500
65
+
- 5000
66
+
- 10000
67
+
- 20000
68
+
- 25000
69
+
- 40000
70
+
- 50000
71
+
- 56000
72
+
- 100000
73
+
- 200000
74
+
description:
75
+
Maximum PHY supported speed in Mbits / seconds.
76
+
77
+
broken-turn-around:
78
+
$ref: /schemas/types.yaml#definitions/flag
79
+
description:
80
+
If set, indicates the PHY device does not correctly release
81
+
the turn around line low at the end of a MDIO transaction.
82
+
83
+
enet-phy-lane-swap:
84
+
$ref: /schemas/types.yaml#definitions/flag
85
+
description:
86
+
If set, indicates the PHY will swap the TX/RX lanes to
87
+
compensate for the board being designed with the lanes
88
+
swapped.
89
+
90
+
eee-broken-100tx:
91
+
$ref: /schemas/types.yaml#definitions/flag
92
+
description:
93
+
Mark the corresponding energy efficient ethernet mode as
94
+
broken and request the ethernet to stop advertising it.
95
+
96
+
eee-broken-1000t:
97
+
$ref: /schemas/types.yaml#definitions/flag
98
+
description:
99
+
Mark the corresponding energy efficient ethernet mode as
100
+
broken and request the ethernet to stop advertising it.
101
+
102
+
eee-broken-10gt:
103
+
$ref: /schemas/types.yaml#definitions/flag
104
+
description:
105
+
Mark the corresponding energy efficient ethernet mode as
106
+
broken and request the ethernet to stop advertising it.
107
+
108
+
eee-broken-1000kx:
109
+
$ref: /schemas/types.yaml#definitions/flag
110
+
description:
111
+
Mark the corresponding energy efficient ethernet mode as
112
+
broken and request the ethernet to stop advertising it.
113
+
114
+
eee-broken-10gkx4:
115
+
$ref: /schemas/types.yaml#definitions/flag
116
+
description:
117
+
Mark the corresponding energy efficient ethernet mode as
118
+
broken and request the ethernet to stop advertising it.
119
+
120
+
eee-broken-10gkr:
121
+
$ref: /schemas/types.yaml#definitions/flag
122
+
description:
123
+
Mark the corresponding energy efficient ethernet mode as
124
+
broken and request the ethernet to stop advertising it.
125
+
126
+
phy-is-integrated:
127
+
$ref: /schemas/types.yaml#definitions/flag
128
+
description:
129
+
If set, indicates that the PHY is integrated into the same
130
+
physical package as the Ethernet MAC. If needed, muxers
131
+
should be configured to ensure the integrated PHY is
132
+
used. The absence of this property indicates the muxers
133
+
should be configured so that the external PHY is used.
134
+
135
+
resets:
136
+
maxItems: 1
137
+
138
+
reset-names:
139
+
const: phy
140
+
141
+
reset-gpios:
142
+
maxItems: 1
143
+
description:
144
+
The GPIO phandle and specifier for the PHY reset signal.
145
+
146
+
reset-assert-us:
147
+
description:
148
+
Delay after the reset was asserted in microseconds. If this
149
+
property is missing the delay will be skipped.
150
+
151
+
reset-deassert-us:
152
+
description:
153
+
Delay after the reset was deasserted in microseconds. If
154
+
this property is missing the delay will be skipped.
155
+
156
+
required:
157
+
- reg
158
+
159
+
examples:
160
+
- |
161
+
ethernet {
162
+
#address-cells = <1>;
163
+
#size-cells = <0>;
164
+
165
+
ethernet-phy@0 {
166
+
compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45";
167
+
interrupt-parent = <&PIC>;
168
+
interrupts = <35 1>;
169
+
reg = <0>;
170
+
171
+
resets = <&rst 8>;
172
+
reset-names = "phy";
173
+
reset-gpios = <&gpio1 4 1>;
174
+
reset-assert-us = <1000>;
175
+
reset-deassert-us = <2000>;
176
+
};
177
+
};
+1
-68
Documentation/devicetree/bindings/net/ethernet.txt
+1
-68
Documentation/devicetree/bindings/net/ethernet.txt
···
1
-
The following properties are common to the Ethernet controllers:
2
-
3
-
NOTE: All 'phy*' properties documented below are Ethernet specific. For the
4
-
generic PHY 'phys' property, see
5
-
Documentation/devicetree/bindings/phy/phy-bindings.txt.
6
-
7
-
- mac-address: array of 6 bytes, specifies the MAC address that was last used by
8
-
the boot program; should be used in cases where the MAC address assigned to
9
-
the device by the boot program is different from the "local-mac-address"
10
-
property;
11
-
- local-mac-address: array of 6 bytes, specifies the MAC address that was
12
-
assigned to the network device;
13
-
- nvmem-cells: phandle, reference to an nvmem node for the MAC address
14
-
- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used
15
-
- max-speed: number, specifies maximum speed in Mbit/s supported by the device;
16
-
- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
17
-
the maximum frame size (there's contradiction in the Devicetree
18
-
Specification).
19
-
- phy-mode: string, operation mode of the PHY interface. This is now a de-facto
20
-
standard property; supported values are:
21
-
* "internal" (Internal means there is not a standard bus between the MAC and
22
-
the PHY, something proprietary is being used to embed the PHY in the MAC.)
23
-
* "mii"
24
-
* "gmii"
25
-
* "sgmii"
26
-
* "qsgmii"
27
-
* "tbi"
28
-
* "rev-mii"
29
-
* "rmii"
30
-
* "rgmii" (RX and TX delays are added by the MAC when required)
31
-
* "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
32
-
MAC should not add the RX or TX delays in this case)
33
-
* "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
34
-
should not add an RX delay in this case)
35
-
* "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
36
-
should not add an TX delay in this case)
37
-
* "rtbi"
38
-
* "smii"
39
-
* "xgmii"
40
-
* "trgmii"
41
-
* "1000base-x",
42
-
* "2500base-x",
43
-
* "rxaui"
44
-
* "xaui"
45
-
* "10gbase-kr" (10GBASE-KR, XFI, SFI)
46
-
* "usxgmii"
47
-
- phy-connection-type: the same as "phy-mode" property but described in the
48
-
Devicetree Specification;
49
-
- phy-handle: phandle, specifies a reference to a node representing a PHY
50
-
device; this property is described in the Devicetree Specification and so
51
-
preferred;
52
-
- phy: the same as "phy-handle" property, not recommended for new bindings.
53
-
- phy-device: the same as "phy-handle" property, not recommended for new
54
-
bindings.
55
-
- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
56
-
is used for components that can have configurable receive fifo sizes,
57
-
and is useful for determining certain configuration settings such as
58
-
flow control thresholds.
59
-
- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This
60
-
is used for components that can have configurable fifo sizes.
61
-
- managed: string, specifies the PHY management type. Supported values are:
62
-
"auto", "in-band-status". "auto" is the default, it usess MDIO for
63
-
management if fixed-link is not specified.
64
-
65
-
Child nodes of the Ethernet controller are typically the individual PHY devices
66
-
connected via the MDIO bus (sometimes the MDIO bus controller is separate).
67
-
They are described in the phy.txt file in this same directory.
68
-
For non-MDIO PHY management see fixed-link.txt.
1
+
This file has moved to ethernet-controller.yaml.
+1
-54
Documentation/devicetree/bindings/net/fixed-link.txt
+1
-54
Documentation/devicetree/bindings/net/fixed-link.txt
···
1
-
Fixed link Device Tree binding
2
-
------------------------------
3
-
4
-
Some Ethernet MACs have a "fixed link", and are not connected to a
5
-
normal MDIO-managed PHY device. For those situations, a Device Tree
6
-
binding allows to describe a "fixed link".
7
-
8
-
Such a fixed link situation is described by creating a 'fixed-link'
9
-
sub-node of the Ethernet MAC device node, with the following
10
-
properties:
11
-
12
-
* 'speed' (integer, mandatory), to indicate the link speed. Accepted
13
-
values are 10, 100 and 1000
14
-
* 'full-duplex' (boolean, optional), to indicate that full duplex is
15
-
used. When absent, half duplex is assumed.
16
-
* 'pause' (boolean, optional), to indicate that pause should be
17
-
enabled.
18
-
* 'asym-pause' (boolean, optional), to indicate that asym_pause should
19
-
be enabled.
20
-
* 'link-gpios' ('gpio-list', optional), to indicate if a gpio can be read
21
-
to determine if the link is up.
22
-
23
-
Old, deprecated 'fixed-link' binding:
24
-
25
-
* A 'fixed-link' property in the Ethernet MAC node, with 5 cells, of the
26
-
form <a b c d e> with the following accepted values:
27
-
- a: emulated PHY ID, choose any but but unique to the all specified
28
-
fixed-links, from 0 to 31
29
-
- b: duplex configuration: 0 for half duplex, 1 for full duplex
30
-
- c: link speed in Mbits/sec, accepted values are: 10, 100 and 1000
31
-
- d: pause configuration: 0 for no pause, 1 for pause
32
-
- e: asymmetric pause configuration: 0 for no asymmetric pause, 1 for
33
-
asymmetric pause
34
-
35
-
Examples:
36
-
37
-
ethernet@0 {
38
-
...
39
-
fixed-link {
40
-
speed = <1000>;
41
-
full-duplex;
42
-
};
43
-
...
44
-
};
45
-
46
-
ethernet@1 {
47
-
...
48
-
fixed-link {
49
-
speed = <1000>;
50
-
pause;
51
-
link-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
52
-
};
53
-
...
54
-
};
1
+
This file has moved to ethernet-controller.yaml.
+1
-37
Documentation/devicetree/bindings/net/mdio.txt
+1
-37
Documentation/devicetree/bindings/net/mdio.txt
···
1
-
Common MDIO bus properties.
2
-
3
-
These are generic properties that can apply to any MDIO bus.
4
-
5
-
Optional properties:
6
-
- reset-gpios: One GPIO that control the RESET lines of all PHYs on that MDIO
7
-
bus.
8
-
- reset-delay-us: RESET pulse width in microseconds.
9
-
10
-
A list of child nodes, one per device on the bus is expected. These
11
-
should follow the generic phy.txt, or a device specific binding document.
12
-
13
-
The 'reset-delay-us' indicates the RESET signal pulse width in microseconds and
14
-
applies to all PHY devices. It must therefore be appropriately determined based
15
-
on all PHY requirements (maximum value of all per-PHY RESET pulse widths).
16
-
17
-
Example :
18
-
This example shows these optional properties, plus other properties
19
-
required for the TI Davinci MDIO driver.
20
-
21
-
davinci_mdio: ethernet@5c030000 {
22
-
compatible = "ti,davinci_mdio";
23
-
reg = <0x5c030000 0x1000>;
24
-
#address-cells = <1>;
25
-
#size-cells = <0>;
26
-
27
-
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
28
-
reset-delay-us = <2>;
29
-
30
-
ethphy0: ethernet-phy@1 {
31
-
reg = <1>;
32
-
};
33
-
34
-
ethphy1: ethernet-phy@3 {
35
-
reg = <3>;
36
-
};
37
-
};
1
+
This file has moved to mdio.yaml.
+74
Documentation/devicetree/bindings/net/mdio.yaml
+74
Documentation/devicetree/bindings/net/mdio.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/net/mdio.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: MDIO Bus Generic Binding
8
+
9
+
maintainers:
10
+
- Andrew Lunn <andrew@lunn.ch>
11
+
- Florian Fainelli <f.fainelli@gmail.com>
12
+
- Heiner Kallweit <hkallweit1@gmail.com>
13
+
14
+
description:
15
+
These are generic properties that can apply to any MDIO bus. Any
16
+
MDIO bus must have a list of child nodes, one per device on the
17
+
bus. These should follow the generic ethernet-phy.yaml document, or
18
+
a device specific binding document.
19
+
20
+
properties:
21
+
$nodename:
22
+
pattern: "^mdio(@.*)?"
23
+
24
+
"#address-cells":
25
+
const: 1
26
+
27
+
"#size-cells":
28
+
const: 0
29
+
30
+
reset-gpios:
31
+
maxItems: 1
32
+
description:
33
+
The phandle and specifier for the GPIO that controls the RESET
34
+
lines of all PHYs on that MDIO bus.
35
+
36
+
reset-delay-us:
37
+
description:
38
+
RESET pulse width in microseconds. It applies to all PHY devices
39
+
and must therefore be appropriately determined based on all PHY
40
+
requirements (maximum value of all per-PHY RESET pulse widths).
41
+
42
+
patternProperties:
43
+
"^ethernet-phy@[0-9a-f]+$":
44
+
type: object
45
+
46
+
properties:
47
+
reg:
48
+
minimum: 0
49
+
maximum: 31
50
+
description:
51
+
The ID number for the PHY.
52
+
53
+
required:
54
+
- reg
55
+
56
+
examples:
57
+
- |
58
+
davinci_mdio: mdio@5c030000 {
59
+
compatible = "ti,davinci_mdio";
60
+
reg = <0x5c030000 0x1000>;
61
+
#address-cells = <1>;
62
+
#size-cells = <0>;
63
+
64
+
reset-gpios = <&gpio2 5 1>;
65
+
reset-delay-us = <2>;
66
+
67
+
ethphy0: ethernet-phy@1 {
68
+
reg = <1>;
69
+
};
70
+
71
+
ethphy1: ethernet-phy@3 {
72
+
reg = <3>;
73
+
};
74
+
};
+1
-79
Documentation/devicetree/bindings/net/phy.txt
+1
-79
Documentation/devicetree/bindings/net/phy.txt
···
1
-
PHY nodes
2
-
3
-
Required properties:
4
-
5
-
- interrupts : interrupt specifier for the sole interrupt.
6
-
- reg : The ID number for the phy, usually a small integer
7
-
8
-
Optional Properties:
9
-
10
-
- compatible: Compatible list, may contain
11
-
"ethernet-phy-ieee802.3-c22" or "ethernet-phy-ieee802.3-c45" for
12
-
PHYs that implement IEEE802.3 clause 22 or IEEE802.3 clause 45
13
-
specifications. If neither of these are specified, the default is to
14
-
assume clause 22.
15
-
16
-
If the PHY reports an incorrect ID (or none at all) then the
17
-
"compatible" list may contain an entry with the correct PHY ID in the
18
-
form: "ethernet-phy-idAAAA.BBBB" where
19
-
AAAA - The value of the 16 bit Phy Identifier 1 register as
20
-
4 hex digits. This is the chip vendor OUI bits 3:18
21
-
BBBB - The value of the 16 bit Phy Identifier 2 register as
22
-
4 hex digits. This is the chip vendor OUI bits 19:24,
23
-
followed by 10 bits of a vendor specific ID.
24
-
25
-
The compatible list should not contain other values than those
26
-
listed here.
27
-
28
-
- max-speed: Maximum PHY supported speed (10, 100, 1000...)
29
-
30
-
- broken-turn-around: If set, indicates the PHY device does not correctly
31
-
release the turn around line low at the end of a MDIO transaction.
32
-
33
-
- enet-phy-lane-swap: If set, indicates the PHY will swap the TX/RX lanes to
34
-
compensate for the board being designed with the lanes swapped.
35
-
36
-
- enet-phy-lane-no-swap: If set, indicates that PHY will disable swap of the
37
-
TX/RX lanes. This property allows the PHY to work correcly after e.g. wrong
38
-
bootstrap configuration caused by issues in PCB layout design.
39
-
40
-
- eee-broken-100tx:
41
-
- eee-broken-1000t:
42
-
- eee-broken-10gt:
43
-
- eee-broken-1000kx:
44
-
- eee-broken-10gkx4:
45
-
- eee-broken-10gkr:
46
-
Mark the corresponding energy efficient ethernet mode as broken and
47
-
request the ethernet to stop advertising it.
48
-
49
-
- phy-is-integrated: If set, indicates that the PHY is integrated into the same
50
-
physical package as the Ethernet MAC. If needed, muxers should be configured
51
-
to ensure the integrated PHY is used. The absence of this property indicates
52
-
the muxers should be configured so that the external PHY is used.
53
-
54
-
- resets: The reset-controller phandle and specifier for the PHY reset signal.
55
-
56
-
- reset-names: Must be "phy" for the PHY reset signal.
57
-
58
-
- reset-gpios: The GPIO phandle and specifier for the PHY reset signal.
59
-
60
-
- reset-assert-us: Delay after the reset was asserted in microseconds.
61
-
If this property is missing the delay will be skipped.
62
-
63
-
- reset-deassert-us: Delay after the reset was deasserted in microseconds.
64
-
If this property is missing the delay will be skipped.
65
-
66
-
Example:
67
-
68
-
ethernet-phy@0 {
69
-
compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c22";
70
-
interrupt-parent = <&PIC>;
71
-
interrupts = <35 IRQ_TYPE_EDGE_RISING>;
72
-
reg = <0>;
73
-
74
-
resets = <&rst 8>;
75
-
reset-names = "phy";
76
-
reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
77
-
reset-assert-us = <1000>;
78
-
reset-deassert-us = <2000>;
79
-
};
1
+
This file has moved to ethernet-phy.yaml.
+411
Documentation/devicetree/bindings/net/snps,dwmac.yaml
+411
Documentation/devicetree/bindings/net/snps,dwmac.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Synopsys DesignWare MAC Device Tree Bindings
8
+
9
+
maintainers:
10
+
- Alexandre Torgue <alexandre.torgue@st.com>
11
+
- Giuseppe Cavallaro <peppe.cavallaro@st.com>
12
+
- Jose Abreu <joabreu@synopsys.com>
13
+
14
+
# Select every compatible, including the deprecated ones. This way, we
15
+
# will be able to report a warning when we have that compatible, since
16
+
# we will validate the node thanks to the select, but won't report it
17
+
# as a valid value in the compatible property description
18
+
select:
19
+
properties:
20
+
compatible:
21
+
contains:
22
+
enum:
23
+
- snps,dwmac
24
+
- snps,dwmac-3.50a
25
+
- snps,dwmac-3.610
26
+
- snps,dwmac-3.70a
27
+
- snps,dwmac-3.710
28
+
- snps,dwmac-4.00
29
+
- snps,dwmac-4.10a
30
+
- snps,dwxgmac
31
+
- snps,dwxgmac-2.10
32
+
33
+
# Deprecated
34
+
- st,spear600-gmac
35
+
36
+
required:
37
+
- compatible
38
+
39
+
properties:
40
+
41
+
# We need to include all the compatibles from schemas that will
42
+
# include that schemas, otherwise compatible won't validate for
43
+
# those.
44
+
compatible:
45
+
contains:
46
+
enum:
47
+
- allwinner,sun7i-a20-gmac
48
+
- allwinner,sun8i-a83t-emac
49
+
- allwinner,sun8i-h3-emac
50
+
- allwinner,sun8i-r40-emac
51
+
- allwinner,sun8i-v3s-emac
52
+
- allwinner,sun50i-a64-emac
53
+
- snps,dwmac
54
+
- snps,dwmac-3.50a
55
+
- snps,dwmac-3.610
56
+
- snps,dwmac-3.70a
57
+
- snps,dwmac-3.710
58
+
- snps,dwmac-4.00
59
+
- snps,dwmac-4.10a
60
+
- snps,dwxgmac
61
+
- snps,dwxgmac-2.10
62
+
63
+
reg:
64
+
maxItems: 1
65
+
66
+
interrupts:
67
+
minItems: 1
68
+
maxItems: 3
69
+
items:
70
+
- description: Combined signal for various interrupt events
71
+
- description: The interrupt to manage the remote wake-up packet detection
72
+
- description: The interrupt that occurs when Rx exits the LPI state
73
+
74
+
interrupt-names:
75
+
minItems: 1
76
+
maxItems: 3
77
+
items:
78
+
- const: macirq
79
+
- const: eth_wake_irq
80
+
- const: eth_lpi
81
+
82
+
clocks:
83
+
minItems: 1
84
+
maxItems: 3
85
+
items:
86
+
- description: GMAC main clock
87
+
- description: Peripheral registers interface clock
88
+
- description:
89
+
PTP reference clock. This clock is used for programming the
90
+
Timestamp Addend Register. If not passed then the system
91
+
clock will be used and this is fine on some platforms.
92
+
93
+
clock-names:
94
+
additionalItems: true
95
+
contains:
96
+
enum:
97
+
- stmmaceth
98
+
- pclk
99
+
- ptp_ref
100
+
101
+
resets:
102
+
maxItems: 1
103
+
description:
104
+
MAC Reset signal.
105
+
106
+
reset-names:
107
+
const: stmmaceth
108
+
109
+
snps,axi-config:
110
+
$ref: /schemas/types.yaml#definitions/phandle
111
+
description:
112
+
AXI BUS Mode parameters. Phandle to a node that can contain the
113
+
following properties
114
+
* snps,lpi_en, enable Low Power Interface
115
+
* snps,xit_frm, unlock on WoL
116
+
* snps,wr_osr_lmt, max write outstanding req. limit
117
+
* snps,rd_osr_lmt, max read outstanding req. limit
118
+
* snps,kbbe, do not cross 1KiB boundary.
119
+
* snps,blen, this is a vector of supported burst length.
120
+
* snps,fb, fixed-burst
121
+
* snps,mb, mixed-burst
122
+
* snps,rb, rebuild INCRx Burst
123
+
124
+
snps,mtl-rx-config:
125
+
$ref: /schemas/types.yaml#definitions/phandle
126
+
description:
127
+
Multiple RX Queues parameters. Phandle to a node that can
128
+
contain the following properties
129
+
* snps,rx-queues-to-use, number of RX queues to be used in the
130
+
driver
131
+
* Choose one of these RX scheduling algorithms
132
+
* snps,rx-sched-sp, Strict priority
133
+
* snps,rx-sched-wsp, Weighted Strict priority
134
+
* For each RX queue
135
+
* Choose one of these modes
136
+
* snps,dcb-algorithm, Queue to be enabled as DCB
137
+
* snps,avb-algorithm, Queue to be enabled as AVB
138
+
* snps,map-to-dma-channel, Channel to map
139
+
* Specifiy specific packet routing
140
+
* snps,route-avcp, AV Untagged Control packets
141
+
* snps,route-ptp, PTP Packets
142
+
* snps,route-dcbcp, DCB Control Packets
143
+
* snps,route-up, Untagged Packets
144
+
* snps,route-multi-broad, Multicast & Broadcast Packets
145
+
* snps,priority, RX queue priority (Range 0x0 to 0xF)
146
+
147
+
snps,mtl-tx-config:
148
+
$ref: /schemas/types.yaml#definitions/phandle
149
+
description:
150
+
Multiple TX Queues parameters. Phandle to a node that can
151
+
contain the following properties
152
+
* snps,tx-queues-to-use, number of TX queues to be used in the
153
+
driver
154
+
* Choose one of these TX scheduling algorithms
155
+
* snps,tx-sched-wrr, Weighted Round Robin
156
+
* snps,tx-sched-wfq, Weighted Fair Queuing
157
+
* snps,tx-sched-dwrr, Deficit Weighted Round Robin
158
+
* snps,tx-sched-sp, Strict priority
159
+
* For each TX queue
160
+
* snps,weight, TX queue weight (if using a DCB weight
161
+
algorithm)
162
+
* Choose one of these modes
163
+
* snps,dcb-algorithm, TX queue will be working in DCB
164
+
* snps,avb-algorithm, TX queue will be working in AVB
165
+
[Attention] Queue 0 is reserved for legacy traffic
166
+
and so no AVB is available in this queue.
167
+
* Configure Credit Base Shaper (if AVB Mode selected)
168
+
* snps,send_slope, enable Low Power Interface
169
+
* snps,idle_slope, unlock on WoL
170
+
* snps,high_credit, max write outstanding req. limit
171
+
* snps,low_credit, max read outstanding req. limit
172
+
* snps,priority, TX queue priority (Range 0x0 to 0xF)
173
+
174
+
snps,reset-gpio:
175
+
deprecated: true
176
+
maxItems: 1
177
+
description:
178
+
PHY Reset GPIO
179
+
180
+
snps,reset-active-low:
181
+
deprecated: true
182
+
$ref: /schemas/types.yaml#definitions/flag
183
+
description:
184
+
Indicates that the PHY Reset is active low
185
+
186
+
snps,reset-delays-us:
187
+
deprecated: true
188
+
allOf:
189
+
- $ref: /schemas/types.yaml#definitions/uint32-array
190
+
- minItems: 3
191
+
maxItems: 3
192
+
description:
193
+
Triplet of delays. The 1st cell is reset pre-delay in micro
194
+
seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
195
+
cell is reset post-delay in micro seconds.
196
+
197
+
snps,aal:
198
+
$ref: /schemas/types.yaml#definitions/flag
199
+
description:
200
+
Use Address-Aligned Beats
201
+
202
+
snps,fixed-burst:
203
+
$ref: /schemas/types.yaml#definitions/flag
204
+
description:
205
+
Program the DMA to use the fixed burst mode
206
+
207
+
snps,mixed-burst:
208
+
$ref: /schemas/types.yaml#definitions/flag
209
+
description:
210
+
Program the DMA to use the mixed burst mode
211
+
212
+
snps,force_thresh_dma_mode:
213
+
$ref: /schemas/types.yaml#definitions/flag
214
+
description:
215
+
Force DMA to use the threshold mode for both tx and rx
216
+
217
+
snps,force_sf_dma_mode:
218
+
$ref: /schemas/types.yaml#definitions/flag
219
+
description:
220
+
Force DMA to use the Store and Forward mode for both tx and
221
+
rx. This flag is ignored if force_thresh_dma_mode is set.
222
+
223
+
snps,en-tx-lpi-clockgating:
224
+
$ref: /schemas/types.yaml#definitions/flag
225
+
description:
226
+
Enable gating of the MAC TX clock during TX low-power mode
227
+
228
+
snps,multicast-filter-bins:
229
+
$ref: /schemas/types.yaml#definitions/uint32
230
+
description:
231
+
Number of multicast filter hash bins supported by this device
232
+
instance
233
+
234
+
snps,perfect-filter-entries:
235
+
$ref: /schemas/types.yaml#definitions/uint32
236
+
description:
237
+
Number of perfect filter entries supported by this device
238
+
instance
239
+
240
+
snps,ps-speed:
241
+
$ref: /schemas/types.yaml#definitions/uint32
242
+
description:
243
+
Port selection speed that can be passed to the core when PCS
244
+
is supported. For example, this is used in case of SGMII and
245
+
MAC2MAC connection.
246
+
247
+
mdio:
248
+
type: object
249
+
description:
250
+
Creates and registers an MDIO bus.
251
+
252
+
properties:
253
+
compatible:
254
+
const: snps,dwmac-mdio
255
+
256
+
required:
257
+
- compatible
258
+
259
+
required:
260
+
- compatible
261
+
- reg
262
+
- interrupts
263
+
- interrupt-names
264
+
- phy-mode
265
+
266
+
dependencies:
267
+
snps,reset-active-low: ["snps,reset-gpio"]
268
+
snps,reset-delay-us: ["snps,reset-gpio"]
269
+
270
+
allOf:
271
+
- $ref: "ethernet-controller.yaml#"
272
+
- if:
273
+
properties:
274
+
compatible:
275
+
contains:
276
+
enum:
277
+
- allwinner,sun7i-a20-gmac
278
+
- allwinner,sun8i-a83t-emac
279
+
- allwinner,sun8i-h3-emac
280
+
- allwinner,sun8i-r40-emac
281
+
- allwinner,sun8i-v3s-emac
282
+
- allwinner,sun50i-a64-emac
283
+
- snps,dwxgmac
284
+
- snps,dwxgmac-2.10
285
+
- st,spear600-gmac
286
+
287
+
then:
288
+
properties:
289
+
snps,pbl:
290
+
allOf:
291
+
- $ref: /schemas/types.yaml#definitions/uint32
292
+
- enum: [2, 4, 8]
293
+
description:
294
+
Programmable Burst Length (tx and rx)
295
+
296
+
snps,txpbl:
297
+
allOf:
298
+
- $ref: /schemas/types.yaml#definitions/uint32
299
+
- enum: [2, 4, 8]
300
+
description:
301
+
Tx Programmable Burst Length. If set, DMA tx will use this
302
+
value rather than snps,pbl.
303
+
304
+
snps,rxpbl:
305
+
allOf:
306
+
- $ref: /schemas/types.yaml#definitions/uint32
307
+
- enum: [2, 4, 8]
308
+
description:
309
+
Rx Programmable Burst Length. If set, DMA rx will use this
310
+
value rather than snps,pbl.
311
+
312
+
snps,no-pbl-x8:
313
+
$ref: /schemas/types.yaml#definitions/flag
314
+
description:
315
+
Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
316
+
rev < 3.50, don\'t multiply the values by 4.
317
+
318
+
- if:
319
+
properties:
320
+
compatible:
321
+
contains:
322
+
enum:
323
+
- allwinner,sun7i-a20-gmac
324
+
- allwinner,sun8i-a83t-emac
325
+
- allwinner,sun8i-h3-emac
326
+
- allwinner,sun8i-r40-emac
327
+
- allwinner,sun8i-v3s-emac
328
+
- allwinner,sun50i-a64-emac
329
+
- snps,dwmac-4.00
330
+
- snps,dwmac-4.10a
331
+
- snps,dwxgmac
332
+
- snps,dwxgmac-2.10
333
+
- st,spear600-gmac
334
+
335
+
then:
336
+
snps,tso:
337
+
$ref: /schemas/types.yaml#definitions/flag
338
+
description:
339
+
Enables the TSO feature otherwise it will be managed by
340
+
MAC HW capability register.
341
+
342
+
examples:
343
+
- |
344
+
stmmac_axi_setup: stmmac-axi-config {
345
+
snps,wr_osr_lmt = <0xf>;
346
+
snps,rd_osr_lmt = <0xf>;
347
+
snps,blen = <256 128 64 32 0 0 0>;
348
+
};
349
+
350
+
mtl_rx_setup: rx-queues-config {
351
+
snps,rx-queues-to-use = <1>;
352
+
snps,rx-sched-sp;
353
+
queue0 {
354
+
snps,dcb-algorithm;
355
+
snps,map-to-dma-channel = <0x0>;
356
+
snps,priority = <0x0>;
357
+
};
358
+
};
359
+
360
+
mtl_tx_setup: tx-queues-config {
361
+
snps,tx-queues-to-use = <2>;
362
+
snps,tx-sched-wrr;
363
+
queue0 {
364
+
snps,weight = <0x10>;
365
+
snps,dcb-algorithm;
366
+
snps,priority = <0x0>;
367
+
};
368
+
369
+
queue1 {
370
+
snps,avb-algorithm;
371
+
snps,send_slope = <0x1000>;
372
+
snps,idle_slope = <0x1000>;
373
+
snps,high_credit = <0x3E800>;
374
+
snps,low_credit = <0xFFC18000>;
375
+
snps,priority = <0x1>;
376
+
};
377
+
};
378
+
379
+
gmac0: ethernet@e0800000 {
380
+
compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
381
+
reg = <0xe0800000 0x8000>;
382
+
interrupt-parent = <&vic1>;
383
+
interrupts = <24 23 22>;
384
+
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
385
+
mac-address = [000000000000]; /* Filled in by U-Boot */
386
+
max-frame-size = <3800>;
387
+
phy-mode = "gmii";
388
+
snps,multicast-filter-bins = <256>;
389
+
snps,perfect-filter-entries = <128>;
390
+
rx-fifo-depth = <16384>;
391
+
tx-fifo-depth = <16384>;
392
+
clocks = <&clock>;
393
+
clock-names = "stmmaceth";
394
+
snps,axi-config = <&stmmac_axi_setup>;
395
+
snps,mtl-rx-config = <&mtl_rx_setup>;
396
+
snps,mtl-tx-config = <&mtl_tx_setup>;
397
+
mdio0 {
398
+
#address-cells = <1>;
399
+
#size-cells = <0>;
400
+
compatible = "snps,dwmac-mdio";
401
+
phy1: ethernet-phy@0 {
402
+
reg = <0>;
403
+
};
404
+
};
405
+
};
406
+
407
+
# FIXME: We should set it, but it would report all the generic
408
+
# properties as additional properties.
409
+
# additionalProperties: false
410
+
411
+
...
+1
-178
Documentation/devicetree/bindings/net/stmmac.txt
+1
-178
Documentation/devicetree/bindings/net/stmmac.txt
···
1
-
* STMicroelectronics 10/100/1000/2500/10000 Ethernet (GMAC/XGMAC)
2
-
3
-
Required properties:
4
-
- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac" or
5
-
"snps,dwxgmac-<ip_version>", "snps,dwxgmac".
6
-
For backwards compatibility: "st,spear600-gmac" is also supported.
7
-
- reg: Address and length of the register set for the device
8
-
- interrupts: Should contain the STMMAC interrupts
9
-
- interrupt-names: Should contain a list of interrupt names corresponding to
10
-
the interrupts in the interrupts property, if available.
11
-
Valid interrupt names are:
12
-
- "macirq" (combined signal for various interrupt events)
13
-
- "eth_wake_irq" (the interrupt to manage the remote wake-up packet detection)
14
-
- "eth_lpi" (the interrupt that occurs when Rx exits the LPI state)
15
-
- phy-mode: See ethernet.txt file in the same directory.
16
-
- snps,reset-gpio gpio number for phy reset.
17
-
- snps,reset-active-low boolean flag to indicate if phy reset is active low.
18
-
- snps,reset-delays-us is triplet of delays
19
-
The 1st cell is reset pre-delay in micro seconds.
20
-
The 2nd cell is reset pulse in micro seconds.
21
-
The 3rd cell is reset post-delay in micro seconds.
22
-
23
-
Optional properties:
24
-
- resets: Should contain a phandle to the STMMAC reset signal, if any
25
-
- reset-names: Should contain the reset signal name "stmmaceth", if a
26
-
reset phandle is given
27
-
- max-frame-size: See ethernet.txt file in the same directory
28
-
- clocks: If present, the first clock should be the GMAC main clock and
29
-
the second clock should be peripheral's register interface clock. Further
30
-
clocks may be specified in derived bindings.
31
-
- clock-names: One name for each entry in the clocks property, the
32
-
first one should be "stmmaceth" and the second one should be "pclk".
33
-
- ptp_ref: this is the PTP reference clock; in case of the PTP is available
34
-
this clock is used for programming the Timestamp Addend Register. If not
35
-
passed then the system clock will be used and this is fine on some
36
-
platforms.
37
-
- tx-fifo-depth: See ethernet.txt file in the same directory
38
-
- rx-fifo-depth: See ethernet.txt file in the same directory
39
-
- snps,pbl Programmable Burst Length (tx and rx)
40
-
- snps,txpbl Tx Programmable Burst Length. Only for GMAC and newer.
41
-
If set, DMA tx will use this value rather than snps,pbl.
42
-
- snps,rxpbl Rx Programmable Burst Length. Only for GMAC and newer.
43
-
If set, DMA rx will use this value rather than snps,pbl.
44
-
- snps,no-pbl-x8 Don't multiply the pbl/txpbl/rxpbl values by 8.
45
-
For core rev < 3.50, don't multiply the values by 4.
46
-
- snps,aal Address-Aligned Beats
47
-
- snps,fixed-burst Program the DMA to use the fixed burst mode
48
-
- snps,mixed-burst Program the DMA to use the mixed burst mode
49
-
- snps,force_thresh_dma_mode Force DMA to use the threshold mode for
50
-
both tx and rx
51
-
- snps,force_sf_dma_mode Force DMA to use the Store and Forward
52
-
mode for both tx and rx. This flag is
53
-
ignored if force_thresh_dma_mode is set.
54
-
- snps,en-tx-lpi-clockgating Enable gating of the MAC TX clock during
55
-
TX low-power mode
56
-
- snps,multicast-filter-bins: Number of multicast filter hash bins
57
-
supported by this device instance
58
-
- snps,perfect-filter-entries: Number of perfect filter entries supported
59
-
by this device instance
60
-
- snps,ps-speed: port selection speed that can be passed to the core when
61
-
PCS is supported. For example, this is used in case of SGMII
62
-
and MAC2MAC connection.
63
-
- snps,tso: this enables the TSO feature otherwise it will be managed by
64
-
MAC HW capability register. Only for GMAC4 and newer.
65
-
- AXI BUS Mode parameters: below the list of all the parameters to program the
66
-
AXI register inside the DMA module:
67
-
- snps,lpi_en: enable Low Power Interface
68
-
- snps,xit_frm: unlock on WoL
69
-
- snps,wr_osr_lmt: max write outstanding req. limit
70
-
- snps,rd_osr_lmt: max read outstanding req. limit
71
-
- snps,kbbe: do not cross 1KiB boundary.
72
-
- snps,blen: this is a vector of supported burst length.
73
-
- snps,fb: fixed-burst
74
-
- snps,mb: mixed-burst
75
-
- snps,rb: rebuild INCRx Burst
76
-
- mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
77
-
- Multiple RX Queues parameters: below the list of all the parameters to
78
-
configure the multiple RX queues:
79
-
- snps,rx-queues-to-use: number of RX queues to be used in the driver
80
-
- Choose one of these RX scheduling algorithms:
81
-
- snps,rx-sched-sp: Strict priority
82
-
- snps,rx-sched-wsp: Weighted Strict priority
83
-
- For each RX queue
84
-
- Choose one of these modes:
85
-
- snps,dcb-algorithm: Queue to be enabled as DCB
86
-
- snps,avb-algorithm: Queue to be enabled as AVB
87
-
- snps,map-to-dma-channel: Channel to map
88
-
- Specifiy specific packet routing:
89
-
- snps,route-avcp: AV Untagged Control packets
90
-
- snps,route-ptp: PTP Packets
91
-
- snps,route-dcbcp: DCB Control Packets
92
-
- snps,route-up: Untagged Packets
93
-
- snps,route-multi-broad: Multicast & Broadcast Packets
94
-
- snps,priority: RX queue priority (Range: 0x0 to 0xF)
95
-
- Multiple TX Queues parameters: below the list of all the parameters to
96
-
configure the multiple TX queues:
97
-
- snps,tx-queues-to-use: number of TX queues to be used in the driver
98
-
- Choose one of these TX scheduling algorithms:
99
-
- snps,tx-sched-wrr: Weighted Round Robin
100
-
- snps,tx-sched-wfq: Weighted Fair Queuing
101
-
- snps,tx-sched-dwrr: Deficit Weighted Round Robin
102
-
- snps,tx-sched-sp: Strict priority
103
-
- For each TX queue
104
-
- snps,weight: TX queue weight (if using a DCB weight algorithm)
105
-
- Choose one of these modes:
106
-
- snps,dcb-algorithm: TX queue will be working in DCB
107
-
- snps,avb-algorithm: TX queue will be working in AVB
108
-
[Attention] Queue 0 is reserved for legacy traffic
109
-
and so no AVB is available in this queue.
110
-
- Configure Credit Base Shaper (if AVB Mode selected):
111
-
- snps,send_slope: enable Low Power Interface
112
-
- snps,idle_slope: unlock on WoL
113
-
- snps,high_credit: max write outstanding req. limit
114
-
- snps,low_credit: max read outstanding req. limit
115
-
- snps,priority: TX queue priority (Range: 0x0 to 0xF)
116
-
Examples:
117
-
118
-
stmmac_axi_setup: stmmac-axi-config {
119
-
snps,wr_osr_lmt = <0xf>;
120
-
snps,rd_osr_lmt = <0xf>;
121
-
snps,blen = <256 128 64 32 0 0 0>;
122
-
};
123
-
124
-
mtl_rx_setup: rx-queues-config {
125
-
snps,rx-queues-to-use = <1>;
126
-
snps,rx-sched-sp;
127
-
queue0 {
128
-
snps,dcb-algorithm;
129
-
snps,map-to-dma-channel = <0x0>;
130
-
snps,priority = <0x0>;
131
-
};
132
-
};
133
-
134
-
mtl_tx_setup: tx-queues-config {
135
-
snps,tx-queues-to-use = <2>;
136
-
snps,tx-sched-wrr;
137
-
queue0 {
138
-
snps,weight = <0x10>;
139
-
snps,dcb-algorithm;
140
-
snps,priority = <0x0>;
141
-
};
142
-
143
-
queue1 {
144
-
snps,avb-algorithm;
145
-
snps,send_slope = <0x1000>;
146
-
snps,idle_slope = <0x1000>;
147
-
snps,high_credit = <0x3E800>;
148
-
snps,low_credit = <0xFFC18000>;
149
-
snps,priority = <0x1>;
150
-
};
151
-
};
152
-
153
-
gmac0: ethernet@e0800000 {
154
-
compatible = "st,spear600-gmac";
155
-
reg = <0xe0800000 0x8000>;
156
-
interrupt-parent = <&vic1>;
157
-
interrupts = <24 23 22>;
158
-
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
159
-
mac-address = [000000000000]; /* Filled in by U-Boot */
160
-
max-frame-size = <3800>;
161
-
phy-mode = "gmii";
162
-
snps,multicast-filter-bins = <256>;
163
-
snps,perfect-filter-entries = <128>;
164
-
rx-fifo-depth = <16384>;
165
-
tx-fifo-depth = <16384>;
166
-
clocks = <&clock>;
167
-
clock-names = "stmmaceth";
168
-
snps,axi-config = <&stmmac_axi_setup>;
169
-
mdio0 {
170
-
#address-cells = <1>;
171
-
#size-cells = <0>;
172
-
compatible = "snps,dwmac-mdio";
173
-
phy1: ethernet-phy@0 {
174
-
};
175
-
};
176
-
snps,mtl-rx-config = <&mtl_rx_setup>;
177
-
snps,mtl-tx-config = <&mtl_tx_setup>;
178
-
};
1
+
This file has moved to snps,dwmac.yaml.
-1
Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
-1
Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt
Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt
+17
-17
Documentation/devicetree/bindings/property-units.txt
+17
-17
Documentation/devicetree/bindings/property-units.txt
···
12
12
Time/Frequency
13
13
----------------------------------------
14
14
-mhz : megahertz
15
-
-hz : Hertz (preferred)
16
-
-sec : seconds
17
-
-ms : milliseconds
18
-
-us : microseconds
19
-
-ns : nanoseconds
15
+
-hz : hertz (preferred)
16
+
-sec : second
17
+
-ms : millisecond
18
+
-us : microsecond
19
+
-ns : nanosecond
20
20
21
21
Distance
22
22
----------------------------------------
23
-
-mm : millimeters
23
+
-mm : millimeter
24
24
25
25
Electricity
26
26
----------------------------------------
27
-
-microamp : micro amps
28
-
-microamp-hours : micro amp-hours
29
-
-ohms : Ohms
30
-
-micro-ohms : micro Ohms
31
-
-microwatt-hours: micro Watt-hours
32
-
-microvolt : micro volts
33
-
-picofarads : picofarads
34
-
-femtofarads : femtofarads
27
+
-microamp : microampere
28
+
-microamp-hours : microampere hour
29
+
-ohms : ohm
30
+
-micro-ohms : microohm
31
+
-microwatt-hours: microwatt hour
32
+
-microvolt : microvolt
33
+
-picofarads : picofarad
34
+
-femtofarads : femtofarad
35
35
36
36
Temperature
37
37
----------------------------------------
38
-
-celsius : Degrees Celsius
39
-
-millicelsius : Degreee milli-Celsius
38
+
-celsius : degree Celsius
39
+
-millicelsius : millidegree Celsius
40
40
41
41
Pressure
42
42
----------------------------------------
43
-
-kpascal : kiloPascal
43
+
-kpascal : kilopascal
Documentation/devicetree/bindings/regulator/pv88060.txt
Documentation/devicetree/bindings/regulator/pv88060.txt
+11
-2
Documentation/devicetree/bindings/serial/mtk-uart.txt
+11
-2
Documentation/devicetree/bindings/serial/mtk-uart.txt
···
23
23
24
24
- reg: The base address of the UART register bank.
25
25
26
-
- interrupts: A single interrupt specifier.
26
+
- interrupts:
27
+
index 0: an interrupt specifier for the UART controller itself
28
+
index 1: optional, an interrupt specifier with edge sensitivity on Rx pin to
29
+
support Rx in-band wake up. If one would like to use this feature,
30
+
one must create an addtional pinctrl to reconfigure Rx pin to normal
31
+
GPIO before suspend.
27
32
28
33
- clocks : Must contain an entry for each entry in clock-names.
29
34
See ../clocks/clock-bindings.txt for details.
···
44
39
uart0: serial@11006000 {
45
40
compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
46
41
reg = <0x11006000 0x400>;
47
-
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
42
+
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
43
+
<GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
48
44
clocks = <&uart_clk>, <&bus_clk>;
49
45
clock-names = "baud", "bus";
46
+
pinctrl-names = "default", "sleep";
47
+
pinctrl-0 = <&uart_pin>;
48
+
pinctrl-1 = <&uart_pin_sleep>;
50
49
};
+1
Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+1
Documentation/devicetree/bindings/serial/st,stm32-usart.txt
···
13
13
- clocks: The input clock of the USART instance
14
14
15
15
Optional properties:
16
+
- resets: Must contain the phandle to the reset controller.
16
17
- pinctrl: The reference on the pins configuration
17
18
- st,hw-flow-ctrl: bool flag to enable hardware flow control.
18
19
- rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low,
Documentation/devicetree/bindings/sound/cs42l73.txt
Documentation/devicetree/bindings/sound/cs42l73.txt
+1
-2
Documentation/devicetree/bindings/usb/generic-ehci.yaml
+1
-2
Documentation/devicetree/bindings/usb/generic-ehci.yaml
···
74
74
75
75
examples:
76
76
- |
77
-
ehci@e0000300 {
77
+
usb@e0000300 {
78
78
compatible = "ibm,usb-ehci-440epx", "generic-ehci";
79
79
interrupt-parent = <&UIC0>;
80
80
interrupts = <0x1a 4>;
···
89
89
interrupts = <39>;
90
90
clocks = <&ahb_gates 1>;
91
91
phys = <&usbphy 1>;
92
-
phy-names = "usb";
93
92
};
94
93
95
94
...
+72
-4
Documentation/devicetree/bindings/vendor-prefixes.yaml
+72
-4
Documentation/devicetree/bindings/vendor-prefixes.yaml
···
149
149
description: Broadcom Corporation
150
150
"^buffalo,.*":
151
151
description: Buffalo, Inc.
152
+
"^bur,.*":
153
+
description: B&R Industrial Automation GmbH
152
154
"^bticino,.*":
153
155
description: Bticino International
154
156
"^calxeda,.*":
···
179
177
description: Common Hardware Reference Platform
180
178
"^chunghwa,.*":
181
179
description: Chunghwa Picture Tubes Ltd.
180
+
"^chuwi,.*":
181
+
description: Chuwi Innovation Ltd.
182
182
"^ciaa,.*":
183
183
description: Computadora Industrial Abierta Argentina
184
184
"^cirrus,.*":
···
191
187
description: Chips&Media, Inc.
192
188
"^cnxt,.*":
193
189
description: Conexant Systems, Inc.
190
+
"^colorfly,.*":
191
+
description: Colorful GRP, Shenzhen Xueyushi Technology Ltd.
194
192
"^compulab,.*":
195
193
description: CompuLab Ltd.
194
+
"^corpro,.*":
195
+
description: Chengdu Corpro Technology Co., Ltd.
196
196
"^cortina,.*":
197
197
description: Cortina Systems, Inc.
198
198
"^cosmic,.*":
···
209
201
description: Crystalfontz America, Inc.
210
202
"^csky,.*":
211
203
description: Hangzhou C-SKY Microsystems Co., Ltd
204
+
"^csq,.*":
205
+
description: Shenzen Chuangsiqi Technology Co.,Ltd.
212
206
"^cubietech,.*":
213
207
description: Cubietech, Ltd.
214
208
"^cypress,.*":
···
231
221
description: Devantech, Ltd.
232
222
"^dh,.*":
233
223
description: DH electronics GmbH
224
+
"^difrnce,.*":
225
+
description: Shenzhen Yagu Electronic Technology Co., Ltd.
234
226
"^digi,.*":
235
227
description: Digi International Inc.
236
228
"^digilent,.*":
···
255
243
description: DPTechnics
256
244
"^dragino,.*":
257
245
description: Dragino Technology Co., Limited
246
+
"^dserve,.*":
247
+
description: dServe Technology B.V.
258
248
"^ea,.*":
259
249
description: Embedded Artists AB
260
250
"^ebs-systart,.*":
···
279
265
description: Emlid, Ltd.
280
266
"^emmicro,.*":
281
267
description: EM Microelectronic
268
+
"^empire-electronix,.*":
269
+
description: Empire Electronix
282
270
"^emtrion,.*":
283
271
description: emtrion GmbH
284
272
"^endless,.*":
···
295
279
description: Ecole Polytechnique Fédérale de Lausanne
296
280
"^epson,.*":
297
281
description: Seiko Epson Corp.
282
+
"^esp,.*":
283
+
description: Espressif Systems Co. Ltd.
298
284
"^est,.*":
299
285
description: ESTeem Wireless Modems
300
286
"^ettus,.*":
···
347
329
description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.
348
330
"^GEFanuc,.*":
349
331
description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.
332
+
"^gemei,.*":
333
+
description: Gemei Digital Technology Co., Ltd.
350
334
"^geniatech,.*":
351
335
description: Geniatech, Inc.
352
336
"^giantec,.*":
···
395
375
description: Honeywell
396
376
"^hp,.*":
397
377
description: Hewlett Packard
378
+
"^hsg,.*":
379
+
description: HannStar Display Co.
398
380
"^holtek,.*":
399
381
description: Holtek Semiconductor, Inc.
400
382
"^hwacom,.*":
401
383
description: HwaCom Systems Inc.
384
+
"^hyundai,.*":
385
+
description: Hyundai Technology
402
386
"^i2se,.*":
403
387
description: I2SE GmbH
404
388
"^ibm,.*":
···
417
393
description: ILI Technology Corporation (ILITEK)
418
394
"^img,.*":
419
395
description: Imagination Technologies Ltd.
396
+
"^incircuit,.*":
397
+
description: In-Circuit GmbH
398
+
"^inet-tek,.*":
399
+
description: Shenzhen iNet Mobile Internet Technology Co., Ltd
420
400
"^infineon,.*":
421
401
description: Infineon Technologies
422
402
"^inforce,.*":
···
455
427
description: Japan Display Inc.
456
428
"^jedec,.*":
457
429
description: JEDEC Solid State Technology Association
430
+
"^jesurun,.*":
431
+
description: Shenzhen Jesurun Electronics Business Dept.
458
432
"^jianda,.*":
459
433
description: Jiandangjing Technology Co., Ltd.
460
434
"^karo,.*":
···
481
451
description: Rakuten Kobo Inc.
482
452
"^koe,.*":
483
453
description: Kaohsiung Opto-Electronics Inc.
454
+
"^kontron,.*":
455
+
description: Kontron S&T AG
484
456
"^kosagi,.*":
485
457
description: Sutajio Ko-Usagi PTE Ltd.
486
458
"^kyo,.*":
···
491
459
description: LaCie
492
460
"^laird,.*":
493
461
description: Laird PLC
462
+
"^lamobo,.*":
463
+
description: Ketai Huajie Technology Co., Ltd.
494
464
"^lantiq,.*":
495
465
description: Lantiq Semiconductor
496
466
"^lattice,.*":
···
511
477
description: Lichee Pi
512
478
"^linaro,.*":
513
479
description: Linaro Limited
480
+
"^linksprite,.*":
481
+
description: LinkSprite Technologies, Inc.
514
482
"^linksys,.*":
515
483
description: Belkin International, Inc. (Linksys)
516
484
"^linux,.*":
···
529
493
description: Liebherr-Werk Nenzing GmbH
530
494
"^macnica,.*":
531
495
description: Macnica Americas
496
+
"^mapleboard,.*":
497
+
description: Mapleboard.org
532
498
"^marvell,.*":
533
499
description: Marvell Technology Group Ltd.
534
500
"^maxbotix,.*":
···
571
533
description: Micron Technology Inc.
572
534
"^mikroe,.*":
573
535
description: MikroElektronika d.o.o.
536
+
"^miniand,.*":
537
+
description: Miniand Tech
574
538
"^minix,.*":
575
539
description: MINIX Technology Ltd.
576
540
"^miramems,.*":
···
703
663
description: Picochip Ltd
704
664
"^pine64,.*":
705
665
description: Pine64
666
+
"^pineriver,.*":
667
+
description: Shenzhen PineRiver Designs Co., Ltd.
706
668
"^pixcir,.*":
707
669
description: PIXCIR MICROELECTRONICS Co., Ltd
708
670
"^plantower,.*":
709
671
description: Plantower Co., Ltd
710
672
"^plathome,.*":
711
-
description: Plat'Home Co., Ltd.
673
+
description: Plat\'Home Co., Ltd.
712
674
"^plda,.*":
713
675
description: PLDA
714
676
"^plx,.*":
715
677
description: Broadcom Corporation (formerly PLX Technology)
716
678
"^pni,.*":
717
679
description: PNI Sensor Corporation
680
+
"^polaroid,.*":
681
+
description: Polaroid Corporation
718
682
"^portwell,.*":
719
683
description: Portwell Inc.
720
684
"^poslab,.*":
721
685
description: Poslab Technology Co., Ltd.
686
+
"^pov,.*":
687
+
description: Point of View International B.V.
722
688
"^powervr,.*":
723
689
description: PowerVR (deprecated, use img)
690
+
"^primux,.*":
691
+
description: Primux Trading, S.L.
724
692
"^probox2,.*":
725
693
description: PROBOX2 (by W2COMP Co., Ltd.)
726
694
"^pulsedlight,.*":
···
741
693
description: QEMU, a generic and open source machine emulator and virtualizer
742
694
"^qi,.*":
743
695
description: Qi Hardware
696
+
"^qihua,.*":
697
+
description: Chengdu Kaixuan Information Technology Co., Ltd.
744
698
"^qiaodian,.*":
745
699
description: QiaoDian XianShi Corporation
746
700
"^qnap,.*":
···
765
715
description: Realtek Semiconductor Corp.
766
716
"^renesas,.*":
767
717
description: Renesas Electronics Corporation
718
+
"^rervision,.*":
719
+
description: Shenzhen Rervision Technology Co., Ltd.
768
720
"^richtek,.*":
769
721
description: Richtek Technology Corporation
770
722
"^ricoh,.*":
···
835
783
description: Silergy Corp.
836
784
"^siliconmitus,.*":
837
785
description: Silicon Mitus, Inc.
838
-
"^simte,.*":
839
-
description: k
786
+
"^simtek,.*":
787
+
description: Cypress Semiconductor Corporation (Simtek Corporation)
788
+
"^sinlinx,.*":
789
+
description: Sinlinx Electronics Technology Co., LTD
790
+
"^sinovoip,.*":
791
+
description: SinoVoip Co., Ltd
792
+
"^sipeed,.*":
793
+
description: Shenzhen Sipeed Technology Co., Ltd.
840
794
"^sirf,.*":
841
795
description: SiRF Technology, Inc.
842
796
"^sis,.*":
···
855
797
description: Standard Microsystems Corporation
856
798
"^snps,.*":
857
799
description: Synopsys, Inc.
800
+
"^sochip,.*":
801
+
description: Shenzhen SoChip Technology Co., Ltd.
858
802
"^socionext,.*":
859
803
description: Socionext Inc.
860
804
"^solidrun,.*":
···
963
903
description: United Radiant Technology Corporation
964
904
"^usi,.*":
965
905
description: Universal Scientific Industrial Co., Ltd.
906
+
"^utoo,.*":
907
+
description: Aigo Digital Technology Co., Ltd.
966
908
"^v3,.*":
967
909
description: V3 Semiconductor
968
910
"^vamrs,.*":
···
1001
939
description: Winbond Electronics corp.
1002
940
"^winstar,.*":
1003
941
description: Winstar Display Corp.
942
+
"^wits,.*":
943
+
description: Shenzhen Merrii Technology Co., Ltd. (WITS)
1004
944
"^wlf,.*":
1005
945
description: Wolfson Microelectronics
1006
946
"^wm,.*":
1007
947
description: Wondermedia Technologies, Inc.
948
+
"^wobo,.*":
949
+
description: Wobo
1008
950
"^x-powers,.*":
1009
951
description: X-Powers
1010
952
"^xes,.*":
···
1019
953
description: Xilinx
1020
954
"^xunlong,.*":
1021
955
description: Shenzhen Xunlong Software CO.,Limited
956
+
"^yones-toptech,.*":
957
+
description: Yones Toptech Co., Ltd.
1022
958
"^ysoft,.*":
1023
959
description: Y Soft Corporation a.s.
1024
960
"^zarlink,.*":
···
1038
970
1039
971
# Normal property name match without a comma
1040
972
# These should catch all node/property names without a prefix
1041
-
"^[a-zA-Z0-9#][a-zA-Z0-9+\\-._@]{0,63}$": true
973
+
"^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$": true
1042
974
"^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$": true
1043
975
"^#.*": true
1044
976
+1
-1
Documentation/translations/zh_CN/arm64/booting.txt
+1
-1
Documentation/translations/zh_CN/arm64/booting.txt
+2
-1
MAINTAINERS
+2
-1
MAINTAINERS
···
2140
2140
F: drivers/clocksource/timer-rda.c
2141
2141
F: drivers/irqchip/irq-rda-intc.c
2142
2142
F: drivers/tty/serial/rda-uart.c
2143
-
F: Documentation/devicetree/bindings/arm/rda.txt
2143
+
F: Documentation/devicetree/bindings/arm/rda.yaml
2144
2144
F: Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt
2145
2145
F: Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt
2146
2146
F: Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt
···
6025
6025
L: netdev@vger.kernel.org
6026
6026
S: Maintained
6027
6027
F: Documentation/ABI/testing/sysfs-bus-mdio
6028
+
F: Documentation/devicetree/bindings/net/ethernet-phy.yaml
6028
6029
F: Documentation/devicetree/bindings/net/mdio*
6029
6030
F: Documentation/networking/phy.rst
6030
6031
F: drivers/net/phy/
+53
-88
drivers/of/fdt.c
+53
-88
drivers/of/fdt.c
···
38
38
* memory entries in the /memory node. This function may be called
39
39
* any time after initial_boot_param is set.
40
40
*/
41
-
void of_fdt_limit_memory(int limit)
41
+
void __init of_fdt_limit_memory(int limit)
42
42
{
43
43
int memory;
44
44
int len;
···
78
78
}
79
79
}
80
80
81
-
/**
82
-
* of_fdt_is_compatible - Return true if given node from the given blob has
83
-
* compat in its compatible list
84
-
* @blob: A device tree blob
85
-
* @node: node to test
86
-
* @compat: compatible string to compare with compatible list.
87
-
*
88
-
* On match, returns a non-zero value with smaller values returned for more
89
-
* specific compatible values.
90
-
*/
91
-
static int of_fdt_is_compatible(const void *blob,
92
-
unsigned long node, const char *compat)
93
-
{
94
-
const char *cp;
95
-
int cplen;
96
-
unsigned long l, score = 0;
97
-
98
-
cp = fdt_getprop(blob, node, "compatible", &cplen);
99
-
if (cp == NULL)
100
-
return 0;
101
-
while (cplen > 0) {
102
-
score++;
103
-
if (of_compat_cmp(cp, compat, strlen(compat)) == 0)
104
-
return score;
105
-
l = strlen(cp) + 1;
106
-
cp += l;
107
-
cplen -= l;
108
-
}
109
-
110
-
return 0;
111
-
}
112
-
113
-
/**
114
-
* of_fdt_is_big_endian - Return true if given node needs BE MMIO accesses
115
-
* @blob: A device tree blob
116
-
* @node: node to test
117
-
*
118
-
* Returns true if the node has a "big-endian" property, or if the kernel
119
-
* was compiled for BE *and* the node has a "native-endian" property.
120
-
* Returns false otherwise.
121
-
*/
122
-
bool of_fdt_is_big_endian(const void *blob, unsigned long node)
123
-
{
124
-
if (fdt_getprop(blob, node, "big-endian", NULL))
125
-
return true;
126
-
if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) &&
127
-
fdt_getprop(blob, node, "native-endian", NULL))
128
-
return true;
129
-
return false;
130
-
}
131
-
132
81
static bool of_fdt_device_is_available(const void *blob, unsigned long node)
133
82
{
134
83
const char *status = fdt_getprop(blob, node, "status", NULL);
···
89
140
return true;
90
141
91
142
return false;
92
-
}
93
-
94
-
/**
95
-
* of_fdt_match - Return true if node matches a list of compatible values
96
-
*/
97
-
int of_fdt_match(const void *blob, unsigned long node,
98
-
const char *const *compat)
99
-
{
100
-
unsigned int tmp, score = 0;
101
-
102
-
if (!compat)
103
-
return 0;
104
-
105
-
while (*compat) {
106
-
tmp = of_fdt_is_compatible(blob, node, *compat);
107
-
if (tmp && (score == 0 || (tmp < score)))
108
-
score = tmp;
109
-
compat++;
110
-
}
111
-
112
-
return score;
113
143
}
114
144
115
145
static void *unflatten_dt_alloc(void **mem, unsigned long size,
···
463
535
int __initdata dt_root_addr_cells;
464
536
int __initdata dt_root_size_cells;
465
537
466
-
void *initial_boot_params;
538
+
void *initial_boot_params __ro_after_init;
467
539
468
540
#ifdef CONFIG_OF_EARLY_FLATTREE
469
541
···
479
551
phys_addr_t base, size;
480
552
int len;
481
553
const __be32 *prop;
482
-
int nomap, first = 1;
554
+
int first = 1;
555
+
bool nomap;
483
556
484
557
prop = of_get_flat_dt_prop(node, "reg", &len);
485
558
if (!prop)
···
595
666
fdt_get_mem_rsv(initial_boot_params, n, &base, &size);
596
667
if (!size)
597
668
break;
598
-
early_init_dt_reserve_memory_arch(base, size, 0);
669
+
early_init_dt_reserve_memory_arch(base, size, false);
599
670
}
600
671
601
672
of_scan_flat_dt(__fdt_scan_reserved_mem, NULL);
···
613
684
/* Reserve the dtb region */
614
685
early_init_dt_reserve_memory_arch(__pa(initial_boot_params),
615
686
fdt_totalsize(initial_boot_params),
616
-
0);
687
+
false);
617
688
}
618
689
619
690
/**
···
687
758
* @return offset of the subnode, or -FDT_ERR_NOTFOUND if there is none
688
759
*/
689
760
690
-
int of_get_flat_dt_subnode_by_name(unsigned long node, const char *uname)
761
+
int __init of_get_flat_dt_subnode_by_name(unsigned long node, const char *uname)
691
762
{
692
763
return fdt_subnode_offset(initial_boot_params, node, uname);
693
764
}
···
698
769
unsigned long __init of_get_flat_dt_root(void)
699
770
{
700
771
return 0;
701
-
}
702
-
703
-
/**
704
-
* of_get_flat_dt_size - Return the total size of the FDT
705
-
*/
706
-
int __init of_get_flat_dt_size(void)
707
-
{
708
-
return fdt_totalsize(initial_boot_params);
709
772
}
710
773
711
774
/**
···
713
792
}
714
793
715
794
/**
795
+
* of_fdt_is_compatible - Return true if given node from the given blob has
796
+
* compat in its compatible list
797
+
* @blob: A device tree blob
798
+
* @node: node to test
799
+
* @compat: compatible string to compare with compatible list.
800
+
*
801
+
* On match, returns a non-zero value with smaller values returned for more
802
+
* specific compatible values.
803
+
*/
804
+
static int of_fdt_is_compatible(const void *blob,
805
+
unsigned long node, const char *compat)
806
+
{
807
+
const char *cp;
808
+
int cplen;
809
+
unsigned long l, score = 0;
810
+
811
+
cp = fdt_getprop(blob, node, "compatible", &cplen);
812
+
if (cp == NULL)
813
+
return 0;
814
+
while (cplen > 0) {
815
+
score++;
816
+
if (of_compat_cmp(cp, compat, strlen(compat)) == 0)
817
+
return score;
818
+
l = strlen(cp) + 1;
819
+
cp += l;
820
+
cplen -= l;
821
+
}
822
+
823
+
return 0;
824
+
}
825
+
826
+
/**
716
827
* of_flat_dt_is_compatible - Return true if given node has compat in compatible list
717
828
* @node: node to test
718
829
* @compat: compatible string to compare with compatible list.
···
757
804
/**
758
805
* of_flat_dt_match - Return true if node matches a list of compatible values
759
806
*/
760
-
int __init of_flat_dt_match(unsigned long node, const char *const *compat)
807
+
static int __init of_flat_dt_match(unsigned long node, const char *const *compat)
761
808
{
762
-
return of_fdt_match(initial_boot_params, node, compat);
809
+
unsigned int tmp, score = 0;
810
+
811
+
if (!compat)
812
+
return 0;
813
+
814
+
while (*compat) {
815
+
tmp = of_fdt_is_compatible(initial_boot_params, node, *compat);
816
+
if (tmp && (score == 0 || (tmp < score)))
817
+
score = tmp;
818
+
compat++;
819
+
}
820
+
821
+
return score;
763
822
}
764
823
765
824
/**
+3
drivers/of/of_reserved_mem.c
+3
drivers/of/of_reserved_mem.c
+1
-2
drivers/of/platform.c
+1
-2
drivers/of/platform.c
···
92
92
reg = of_get_property(node, "reg", NULL);
93
93
if (reg && (addr = of_translate_address(node, reg)) != OF_BAD_ADDR) {
94
94
dev_set_name(dev, dev_name(dev) ? "%llx.%pOFn:%s" : "%llx.%pOFn",
95
-
(unsigned long long)addr, node,
96
-
dev_name(dev));
95
+
addr, node, dev_name(dev));
97
96
return;
98
97
}
99
98
+1
-1
drivers/of/unittest.c
+1
-1
drivers/of/unittest.c
···
1946
1946
{
1947
1947
int i, nchans;
1948
1948
struct device *dev = &client->dev;
1949
-
struct i2c_adapter *adap = to_i2c_adapter(dev->parent);
1949
+
struct i2c_adapter *adap = client->adapter;
1950
1950
struct device_node *np = client->dev.of_node, *child;
1951
1951
struct i2c_mux_core *muxc;
1952
1952
u32 reg, max_reg;
-11
include/linux/of_fdt.h
-11
include/linux/of_fdt.h
···
23
23
struct device_node;
24
24
25
25
/* For scanning an arbitrary device-tree at any time */
26
-
extern char *of_fdt_get_string(const void *blob, u32 offset);
27
-
extern void *of_fdt_get_property(const void *blob,
28
-
unsigned long node,
29
-
const char *name,
30
-
int *size);
31
-
extern bool of_fdt_is_big_endian(const void *blob,
32
-
unsigned long node);
33
-
extern int of_fdt_match(const void *blob, unsigned long node,
34
-
const char *const *compat);
35
26
extern void *of_fdt_unflatten_tree(const unsigned long *blob,
36
27
struct device_node *dad,
37
28
struct device_node **mynodes);
···
55
64
extern const void *of_get_flat_dt_prop(unsigned long node, const char *name,
56
65
int *size);
57
66
extern int of_flat_dt_is_compatible(unsigned long node, const char *name);
58
-
extern int of_flat_dt_match(unsigned long node, const char *const *matches);
59
67
extern unsigned long of_get_flat_dt_root(void);
60
-
extern int of_get_flat_dt_size(void);
61
68
extern uint32_t of_get_flat_dt_phandle(unsigned long node);
62
69
63
70
extern int early_init_dt_scan_chosen(unsigned long node, const char *uname,
+1
-1
scripts/dtc/Makefile.dtc
+1
-1
scripts/dtc/Makefile.dtc
+49
-6
scripts/dtc/checks.c
+49
-6
scripts/dtc/checks.c
···
645
645
static void fixup_omit_unused_nodes(struct check *c, struct dt_info *dti,
646
646
struct node *node)
647
647
{
648
+
if (generate_symbols && node->labels)
649
+
return;
648
650
if (node->omit_if_unused && !node->is_referenced)
649
651
delete_node(node);
650
652
}
···
1199
1197
}
1200
1198
WARNING(avoid_unnecessary_addr_size, check_avoid_unnecessary_addr_size, NULL, &avoid_default_addr_size);
1201
1199
1202
-
static void check_unique_unit_address(struct check *c, struct dt_info *dti,
1203
-
struct node *node)
1200
+
static bool node_is_disabled(struct node *node)
1201
+
{
1202
+
struct property *prop;
1203
+
1204
+
prop = get_property(node, "status");
1205
+
if (prop) {
1206
+
char *str = prop->val.val;
1207
+
if (streq("disabled", str))
1208
+
return true;
1209
+
}
1210
+
1211
+
return false;
1212
+
}
1213
+
1214
+
static void check_unique_unit_address_common(struct check *c,
1215
+
struct dt_info *dti,
1216
+
struct node *node,
1217
+
bool disable_check)
1204
1218
{
1205
1219
struct node *childa;
1206
1220
···
1233
1215
if (!strlen(addr_a))
1234
1216
continue;
1235
1217
1218
+
if (disable_check && node_is_disabled(childa))
1219
+
continue;
1220
+
1236
1221
for_each_child(node, childb) {
1237
1222
const char *addr_b = get_unitname(childb);
1238
1223
if (childa == childb)
1239
1224
break;
1225
+
1226
+
if (disable_check && node_is_disabled(childb))
1227
+
continue;
1240
1228
1241
1229
if (streq(addr_a, addr_b))
1242
1230
FAIL(c, dti, childb, "duplicate unit-address (also used in node %s)", childa->fullpath);
1243
1231
}
1244
1232
}
1245
1233
}
1234
+
1235
+
static void check_unique_unit_address(struct check *c, struct dt_info *dti,
1236
+
struct node *node)
1237
+
{
1238
+
check_unique_unit_address_common(c, dti, node, false);
1239
+
}
1246
1240
WARNING(unique_unit_address, check_unique_unit_address, NULL, &avoid_default_addr_size);
1241
+
1242
+
static void check_unique_unit_address_if_enabled(struct check *c, struct dt_info *dti,
1243
+
struct node *node)
1244
+
{
1245
+
check_unique_unit_address_common(c, dti, node, true);
1246
+
}
1247
+
CHECK_ENTRY(unique_unit_address_if_enabled, check_unique_unit_address_if_enabled,
1248
+
NULL, false, false, &avoid_default_addr_size);
1247
1249
1248
1250
static void check_obsolete_chosen_interrupt_controller(struct check *c,
1249
1251
struct dt_info *dti,
···
1565
1527
prop = get_property(parent, "interrupt-parent");
1566
1528
if (prop) {
1567
1529
phandle = propval_cell(prop);
1568
-
/* Give up if this is an overlay with external references */
1569
-
if ((phandle == 0 || phandle == -1) &&
1570
-
(dti->dtsflags & DTSF_PLUGIN))
1530
+
if ((phandle == 0) || (phandle == -1)) {
1531
+
/* Give up if this is an overlay with
1532
+
* external references */
1533
+
if (dti->dtsflags & DTSF_PLUGIN)
1571
1534
return;
1535
+
FAIL_PROP(c, dti, parent, prop, "Invalid phandle");
1536
+
continue;
1537
+
}
1572
1538
1573
1539
irq_node = get_node_by_phandle(root, phandle);
1574
1540
if (!irq_node) {
···
1741
1699
return;
1742
1700
1743
1701
if (!strprefixeq(node->name, node->basenamelen, "endpoint"))
1744
-
FAIL(c, dti, node, "graph endpont node name should be 'endpoint'");
1702
+
FAIL(c, dti, node, "graph endpoint node name should be 'endpoint'");
1745
1703
1746
1704
check_graph_reg(c, dti, node);
1747
1705
···
1796
1754
&avoid_default_addr_size,
1797
1755
&avoid_unnecessary_addr_size,
1798
1756
&unique_unit_address,
1757
+
&unique_unit_address_if_enabled,
1799
1758
&obsolete_chosen_interrupt_controller,
1800
1759
&chosen_node_is_root, &chosen_node_bootargs, &chosen_node_stdout_path,
1801
1760
+1
-16
scripts/dtc/dtc-lexer.l
+1
-16
scripts/dtc/dtc-lexer.l
···
1
+
/* SPDX-License-Identifier: GPL-2.0-or-later */
1
2
/*
2
3
* (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3
-
*
4
-
*
5
-
* This program is free software; you can redistribute it and/or
6
-
* modify it under the terms of the GNU General Public License as
7
-
* published by the Free Software Foundation; either version 2 of the
8
-
* License, or (at your option) any later version.
9
-
*
10
-
* This program is distributed in the hope that it will be useful,
11
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13
-
* General Public License for more details.
14
-
*
15
-
* You should have received a copy of the GNU General Public License
16
-
* along with this program; if not, write to the Free Software
17
-
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18
-
* USA
19
4
*/
20
5
21
6
%option noyywrap nounput noinput never-interactive
+1
-16
scripts/dtc/dtc-parser.y
+1
-16
scripts/dtc/dtc-parser.y
···
1
+
// SPDX-License-Identifier: GPL-2.0-or-later
1
2
/*
2
3
* (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3
-
*
4
-
*
5
-
* This program is free software; you can redistribute it and/or
6
-
* modify it under the terms of the GNU General Public License as
7
-
* published by the Free Software Foundation; either version 2 of the
8
-
* License, or (at your option) any later version.
9
-
*
10
-
* This program is distributed in the hope that it will be useful,
11
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13
-
* General Public License for more details.
14
-
*
15
-
* You should have received a copy of the GNU General Public License
16
-
* along with this program; if not, write to the Free Software
17
-
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18
-
* USA
19
4
*/
20
5
%{
21
6
#include <stdio.h>
+2
-1
scripts/dtc/dtc.h
+2
-1
scripts/dtc/dtc.h
···
216
216
void delete_node_by_name(struct node *parent, char *name);
217
217
void delete_node(struct node *node);
218
218
void append_to_property(struct node *node,
219
-
char *name, const void *data, int len);
219
+
char *name, const void *data, int len,
220
+
enum markertype type);
220
221
221
222
const char *get_unitname(struct node *node);
222
223
struct property *get_property(struct node *node, const char *propname);
+1
-1
scripts/dtc/flattree.c
+1
-1
scripts/dtc/flattree.c
···
510
510
fprintf(f, "/* Memory reserve map from source file */\n");
511
511
512
512
/*
513
-
* Use .long on high and low halfs of u64s to avoid .quad
513
+
* Use .long on high and low halves of u64s to avoid .quad
514
514
* as it appears .quad isn't available in some assemblers.
515
515
*/
516
516
for (re = dti->reservelist; re; re = re->next) {
+3
-1
scripts/dtc/libfdt/Makefile.libfdt
+3
-1
scripts/dtc/libfdt/Makefile.libfdt
···
1
-
# SPDX-License-Identifier: GPL-2.0-only
1
+
# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
2
2
# Makefile.libfdt
3
3
#
4
4
# This is not a complete Makefile of itself. Instead, it is designed to
···
10
10
LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \
11
11
fdt_addresses.c fdt_overlay.c
12
12
LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
13
+
LIBFDT_LIB = libfdt-$(DTC_VERSION).$(SHAREDLIB_EXT)
13
14
14
15
libfdt_clean:
15
16
@$(VECHO) CLEAN "(libfdt)"
16
17
rm -f $(STD_CLEANFILES:%=$(LIBFDT_dir)/%)
18
+
rm -f $(LIBFDT_dir)/$(LIBFDT_soname)
+1
-46
scripts/dtc/libfdt/fdt.c
+1
-46
scripts/dtc/libfdt/fdt.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2006 David Gibson, IBM Corporation.
4
-
*
5
-
* libfdt is dual licensed: you can use it either under the terms of
6
-
* the GPL, or the BSD license, at your option.
7
-
*
8
-
* a) This library is free software; you can redistribute it and/or
9
-
* modify it under the terms of the GNU General Public License as
10
-
* published by the Free Software Foundation; either version 2 of the
11
-
* License, or (at your option) any later version.
12
-
*
13
-
* This library is distributed in the hope that it will be useful,
14
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
-
* GNU General Public License for more details.
17
-
*
18
-
* You should have received a copy of the GNU General Public
19
-
* License along with this library; if not, write to the Free
20
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21
-
* MA 02110-1301 USA
22
-
*
23
-
* Alternatively,
24
-
*
25
-
* b) Redistribution and use in source and binary forms, with or
26
-
* without modification, are permitted provided that the following
27
-
* conditions are met:
28
-
*
29
-
* 1. Redistributions of source code must retain the above
30
-
* copyright notice, this list of conditions and the following
31
-
* disclaimer.
32
-
* 2. Redistributions in binary form must reproduce the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer in the documentation and/or other materials
35
-
* provided with the distribution.
36
-
*
37
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50
5
*/
51
6
#include "libfdt_env.h"
52
7
+1
-46
scripts/dtc/libfdt/fdt.h
+1
-46
scripts/dtc/libfdt/fdt.h
···
1
+
/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
1
2
#ifndef FDT_H
2
3
#define FDT_H
3
4
/*
4
5
* libfdt - Flat Device Tree manipulation
5
6
* Copyright (C) 2006 David Gibson, IBM Corporation.
6
7
* Copyright 2012 Kim Phillips, Freescale Semiconductor.
7
-
*
8
-
* libfdt is dual licensed: you can use it either under the terms of
9
-
* the GPL, or the BSD license, at your option.
10
-
*
11
-
* a) This library is free software; you can redistribute it and/or
12
-
* modify it under the terms of the GNU General Public License as
13
-
* published by the Free Software Foundation; either version 2 of the
14
-
* License, or (at your option) any later version.
15
-
*
16
-
* This library is distributed in the hope that it will be useful,
17
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
18
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19
-
* GNU General Public License for more details.
20
-
*
21
-
* You should have received a copy of the GNU General Public
22
-
* License along with this library; if not, write to the Free
23
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24
-
* MA 02110-1301 USA
25
-
*
26
-
* Alternatively,
27
-
*
28
-
* b) Redistribution and use in source and binary forms, with or
29
-
* without modification, are permitted provided that the following
30
-
* conditions are met:
31
-
*
32
-
* 1. Redistributions of source code must retain the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer.
35
-
* 2. Redistributions in binary form must reproduce the above
36
-
* copyright notice, this list of conditions and the following
37
-
* disclaimer in the documentation and/or other materials
38
-
* provided with the distribution.
39
-
*
40
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
41
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
42
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
43
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
44
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
45
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
46
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
47
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
48
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
49
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
50
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
51
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
52
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53
8
*/
54
9
55
10
#ifndef __ASSEMBLY__
+48
-46
scripts/dtc/libfdt/fdt_addresses.c
+48
-46
scripts/dtc/libfdt/fdt_addresses.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2014 David Gibson <david@gibson.dropbear.id.au>
4
5
* Copyright (C) 2018 embedded brains GmbH
5
-
*
6
-
* libfdt is dual licensed: you can use it either under the terms of
7
-
* the GPL, or the BSD license, at your option.
8
-
*
9
-
* a) This library is free software; you can redistribute it and/or
10
-
* modify it under the terms of the GNU General Public License as
11
-
* published by the Free Software Foundation; either version 2 of the
12
-
* License, or (at your option) any later version.
13
-
*
14
-
* This library is distributed in the hope that it will be useful,
15
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
16
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
-
* GNU General Public License for more details.
18
-
*
19
-
* You should have received a copy of the GNU General Public
20
-
* License along with this library; if not, write to the Free
21
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22
-
* MA 02110-1301 USA
23
-
*
24
-
* Alternatively,
25
-
*
26
-
* b) Redistribution and use in source and binary forms, with or
27
-
* without modification, are permitted provided that the following
28
-
* conditions are met:
29
-
*
30
-
* 1. Redistributions of source code must retain the above
31
-
* copyright notice, this list of conditions and the following
32
-
* disclaimer.
33
-
* 2. Redistributions in binary form must reproduce the above
34
-
* copyright notice, this list of conditions and the following
35
-
* disclaimer in the documentation and/or other materials
36
-
* provided with the distribution.
37
-
*
38
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
39
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
40
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
41
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
42
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
43
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
44
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
45
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
46
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
48
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
49
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
50
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51
6
*/
52
7
#include "libfdt_env.h"
53
8
···
49
94
if (val == -FDT_ERR_NOTFOUND)
50
95
return 1;
51
96
return val;
97
+
}
98
+
99
+
/* This function assumes that [address|size]_cells is 1 or 2 */
100
+
int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset,
101
+
const char *name, uint64_t addr, uint64_t size)
102
+
{
103
+
int addr_cells, size_cells, ret;
104
+
uint8_t data[sizeof(fdt64_t) * 2], *prop;
105
+
106
+
ret = fdt_address_cells(fdt, parent);
107
+
if (ret < 0)
108
+
return ret;
109
+
addr_cells = ret;
110
+
111
+
ret = fdt_size_cells(fdt, parent);
112
+
if (ret < 0)
113
+
return ret;
114
+
size_cells = ret;
115
+
116
+
/* check validity of address */
117
+
prop = data;
118
+
if (addr_cells == 1) {
119
+
if ((addr > UINT32_MAX) || ((UINT32_MAX + 1 - addr) < size))
120
+
return -FDT_ERR_BADVALUE;
121
+
122
+
fdt32_st(prop, (uint32_t)addr);
123
+
} else if (addr_cells == 2) {
124
+
fdt64_st(prop, addr);
125
+
} else {
126
+
return -FDT_ERR_BADNCELLS;
127
+
}
128
+
129
+
/* check validity of size */
130
+
prop += addr_cells * sizeof(fdt32_t);
131
+
if (size_cells == 1) {
132
+
if (size > UINT32_MAX)
133
+
return -FDT_ERR_BADVALUE;
134
+
135
+
fdt32_st(prop, (uint32_t)size);
136
+
} else if (size_cells == 2) {
137
+
fdt64_st(prop, size);
138
+
} else {
139
+
return -FDT_ERR_BADNCELLS;
140
+
}
141
+
142
+
return fdt_appendprop(fdt, nodeoffset, name, data,
143
+
(addr_cells + size_cells) * sizeof(fdt32_t));
52
144
}
+1
-46
scripts/dtc/libfdt/fdt_empty_tree.c
+1
-46
scripts/dtc/libfdt/fdt_empty_tree.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2012 David Gibson, IBM Corporation.
4
-
*
5
-
* libfdt is dual licensed: you can use it either under the terms of
6
-
* the GPL, or the BSD license, at your option.
7
-
*
8
-
* a) This library is free software; you can redistribute it and/or
9
-
* modify it under the terms of the GNU General Public License as
10
-
* published by the Free Software Foundation; either version 2 of the
11
-
* License, or (at your option) any later version.
12
-
*
13
-
* This library is distributed in the hope that it will be useful,
14
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
-
* GNU General Public License for more details.
17
-
*
18
-
* You should have received a copy of the GNU General Public
19
-
* License along with this library; if not, write to the Free
20
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21
-
* MA 02110-1301 USA
22
-
*
23
-
* Alternatively,
24
-
*
25
-
* b) Redistribution and use in source and binary forms, with or
26
-
* without modification, are permitted provided that the following
27
-
* conditions are met:
28
-
*
29
-
* 1. Redistributions of source code must retain the above
30
-
* copyright notice, this list of conditions and the following
31
-
* disclaimer.
32
-
* 2. Redistributions in binary form must reproduce the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer in the documentation and/or other materials
35
-
* provided with the distribution.
36
-
*
37
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50
5
*/
51
6
#include "libfdt_env.h"
52
7
+8
-49
scripts/dtc/libfdt/fdt_overlay.c
+8
-49
scripts/dtc/libfdt/fdt_overlay.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2016 Free Electrons
4
5
* Copyright (C) 2016 NextThing Co.
5
-
*
6
-
* libfdt is dual licensed: you can use it either under the terms of
7
-
* the GPL, or the BSD license, at your option.
8
-
*
9
-
* a) This library is free software; you can redistribute it and/or
10
-
* modify it under the terms of the GNU General Public License as
11
-
* published by the Free Software Foundation; either version 2 of the
12
-
* License, or (at your option) any later version.
13
-
*
14
-
* This library is distributed in the hope that it will be useful,
15
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
16
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
-
* GNU General Public License for more details.
18
-
*
19
-
* You should have received a copy of the GNU General Public
20
-
* License along with this library; if not, write to the Free
21
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22
-
* MA 02110-1301 USA
23
-
*
24
-
* Alternatively,
25
-
*
26
-
* b) Redistribution and use in source and binary forms, with or
27
-
* without modification, are permitted provided that the following
28
-
* conditions are met:
29
-
*
30
-
* 1. Redistributions of source code must retain the above
31
-
* copyright notice, this list of conditions and the following
32
-
* disclaimer.
33
-
* 2. Redistributions in binary form must reproduce the above
34
-
* copyright notice, this list of conditions and the following
35
-
* disclaimer in the documentation and/or other materials
36
-
* provided with the distribution.
37
-
*
38
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
39
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
40
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
41
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
42
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
43
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
44
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
45
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
46
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
48
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
49
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
50
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51
6
*/
52
7
#include "libfdt_env.h"
53
8
···
48
93
* @pathp: pointer which receives the path of the target (or NULL)
49
94
*
50
95
* overlay_get_target() retrieves the target offset in the base
51
-
* device tree of a fragment, no matter how the actual targetting is
96
+
* device tree of a fragment, no matter how the actual targeting is
52
97
* done (through a phandle or a path)
53
98
*
54
99
* returns:
55
-
* the targetted node offset in the base device tree
100
+
* the targeted node offset in the base device tree
56
101
* Negative error code on error
57
102
*/
58
103
static int overlay_get_target(const void *fdt, const void *fdto,
···
818
863
819
864
int fdt_overlay_apply(void *fdt, void *fdto)
820
865
{
821
-
uint32_t delta = fdt_get_max_phandle(fdt);
866
+
uint32_t delta;
822
867
int ret;
823
868
824
869
FDT_RO_PROBE(fdt);
825
870
FDT_RO_PROBE(fdto);
871
+
872
+
ret = fdt_find_max_phandle(fdt, &delta);
873
+
if (ret)
874
+
goto err;
826
875
827
876
ret = overlay_adjust_local_phandles(fdto, delta);
828
877
if (ret)
+36
-61
scripts/dtc/libfdt/fdt_ro.c
+36
-61
scripts/dtc/libfdt/fdt_ro.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2006 David Gibson, IBM Corporation.
4
-
*
5
-
* libfdt is dual licensed: you can use it either under the terms of
6
-
* the GPL, or the BSD license, at your option.
7
-
*
8
-
* a) This library is free software; you can redistribute it and/or
9
-
* modify it under the terms of the GNU General Public License as
10
-
* published by the Free Software Foundation; either version 2 of the
11
-
* License, or (at your option) any later version.
12
-
*
13
-
* This library is distributed in the hope that it will be useful,
14
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
-
* GNU General Public License for more details.
17
-
*
18
-
* You should have received a copy of the GNU General Public
19
-
* License along with this library; if not, write to the Free
20
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21
-
* MA 02110-1301 USA
22
-
*
23
-
* Alternatively,
24
-
*
25
-
* b) Redistribution and use in source and binary forms, with or
26
-
* without modification, are permitted provided that the following
27
-
* conditions are met:
28
-
*
29
-
* 1. Redistributions of source code must retain the above
30
-
* copyright notice, this list of conditions and the following
31
-
* disclaimer.
32
-
* 2. Redistributions in binary form must reproduce the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer in the documentation and/or other materials
35
-
* provided with the distribution.
36
-
*
37
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50
5
*/
51
6
#include "libfdt_env.h"
52
7
···
99
144
return p && (slen == len) && (memcmp(p, s, len) == 0);
100
145
}
101
146
102
-
uint32_t fdt_get_max_phandle(const void *fdt)
147
+
int fdt_find_max_phandle(const void *fdt, uint32_t *phandle)
103
148
{
104
-
uint32_t max_phandle = 0;
105
-
int offset;
149
+
uint32_t max = 0;
150
+
int offset = -1;
106
151
107
-
for (offset = fdt_next_node(fdt, -1, NULL);;
108
-
offset = fdt_next_node(fdt, offset, NULL)) {
109
-
uint32_t phandle;
152
+
while (true) {
153
+
uint32_t value;
110
154
111
-
if (offset == -FDT_ERR_NOTFOUND)
112
-
return max_phandle;
155
+
offset = fdt_next_node(fdt, offset, NULL);
156
+
if (offset < 0) {
157
+
if (offset == -FDT_ERR_NOTFOUND)
158
+
break;
113
159
114
-
if (offset < 0)
115
-
return (uint32_t)-1;
160
+
return offset;
161
+
}
116
162
117
-
phandle = fdt_get_phandle(fdt, offset);
118
-
if (phandle == (uint32_t)-1)
119
-
continue;
163
+
value = fdt_get_phandle(fdt, offset);
120
164
121
-
if (phandle > max_phandle)
122
-
max_phandle = phandle;
165
+
if (value > max)
166
+
max = value;
123
167
}
168
+
169
+
if (phandle)
170
+
*phandle = max;
171
+
172
+
return 0;
173
+
}
174
+
175
+
int fdt_generate_phandle(const void *fdt, uint32_t *phandle)
176
+
{
177
+
uint32_t max;
178
+
int err;
179
+
180
+
err = fdt_find_max_phandle(fdt, &max);
181
+
if (err < 0)
182
+
return err;
183
+
184
+
if (max == FDT_MAX_PHANDLE)
185
+
return -FDT_ERR_NOPHANDLES;
186
+
187
+
if (phandle)
188
+
*phandle = max + 1;
124
189
125
190
return 0;
126
191
}
+20
-49
scripts/dtc/libfdt/fdt_rw.c
+20
-49
scripts/dtc/libfdt/fdt_rw.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2006 David Gibson, IBM Corporation.
4
-
*
5
-
* libfdt is dual licensed: you can use it either under the terms of
6
-
* the GPL, or the BSD license, at your option.
7
-
*
8
-
* a) This library is free software; you can redistribute it and/or
9
-
* modify it under the terms of the GNU General Public License as
10
-
* published by the Free Software Foundation; either version 2 of the
11
-
* License, or (at your option) any later version.
12
-
*
13
-
* This library is distributed in the hope that it will be useful,
14
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
-
* GNU General Public License for more details.
17
-
*
18
-
* You should have received a copy of the GNU General Public
19
-
* License along with this library; if not, write to the Free
20
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21
-
* MA 02110-1301 USA
22
-
*
23
-
* Alternatively,
24
-
*
25
-
* b) Redistribution and use in source and binary forms, with or
26
-
* without modification, are permitted provided that the following
27
-
* conditions are met:
28
-
*
29
-
* 1. Redistributions of source code must retain the above
30
-
* copyright notice, this list of conditions and the following
31
-
* disclaimer.
32
-
* 2. Redistributions in binary form must reproduce the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer in the documentation and/or other materials
35
-
* provided with the distribution.
36
-
*
37
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50
5
*/
51
6
#include "libfdt_env.h"
52
7
···
91
136
return 0;
92
137
}
93
138
139
+
/* Must only be used to roll back in case of error */
140
+
static void fdt_del_last_string_(void *fdt, const char *s)
141
+
{
142
+
int newlen = strlen(s) + 1;
143
+
144
+
fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) - newlen);
145
+
}
146
+
94
147
static int fdt_splice_string_(void *fdt, int newlen)
95
148
{
96
149
void *p = (char *)fdt
···
112
149
return 0;
113
150
}
114
151
115
-
static int fdt_find_add_string_(void *fdt, const char *s)
152
+
static int fdt_find_add_string_(void *fdt, const char *s, int *allocated)
116
153
{
117
154
char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
118
155
const char *p;
119
156
char *new;
120
157
int len = strlen(s) + 1;
121
158
int err;
159
+
160
+
*allocated = 0;
122
161
123
162
p = fdt_find_string_(strtab, fdt_size_dt_strings(fdt), s);
124
163
if (p)
···
131
166
err = fdt_splice_string_(fdt, len);
132
167
if (err)
133
168
return err;
169
+
170
+
*allocated = 1;
134
171
135
172
memcpy(new, s, len);
136
173
return (new - strtab);
···
192
225
int nextoffset;
193
226
int namestroff;
194
227
int err;
228
+
int allocated;
195
229
196
230
if ((nextoffset = fdt_check_node_offset_(fdt, nodeoffset)) < 0)
197
231
return nextoffset;
198
232
199
-
namestroff = fdt_find_add_string_(fdt, name);
233
+
namestroff = fdt_find_add_string_(fdt, name, &allocated);
200
234
if (namestroff < 0)
201
235
return namestroff;
202
236
···
205
237
proplen = sizeof(**prop) + FDT_TAGALIGN(len);
206
238
207
239
err = fdt_splice_struct_(fdt, *prop, 0, proplen);
208
-
if (err)
240
+
if (err) {
241
+
if (allocated)
242
+
fdt_del_last_string_(fdt, name);
209
243
return err;
244
+
}
210
245
211
246
(*prop)->tag = cpu_to_fdt32(FDT_PROP);
212
247
(*prop)->nameoff = cpu_to_fdt32(namestroff);
+2
-45
scripts/dtc/libfdt/fdt_strerror.c
+2
-45
scripts/dtc/libfdt/fdt_strerror.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2006 David Gibson, IBM Corporation.
4
-
*
5
-
* libfdt is dual licensed: you can use it either under the terms of
6
-
* the GPL, or the BSD license, at your option.
7
-
*
8
-
* a) This library is free software; you can redistribute it and/or
9
-
* modify it under the terms of the GNU General Public License as
10
-
* published by the Free Software Foundation; either version 2 of the
11
-
* License, or (at your option) any later version.
12
-
*
13
-
* This library is distributed in the hope that it will be useful,
14
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
-
* GNU General Public License for more details.
17
-
*
18
-
* You should have received a copy of the GNU General Public
19
-
* License along with this library; if not, write to the Free
20
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21
-
* MA 02110-1301 USA
22
-
*
23
-
* Alternatively,
24
-
*
25
-
* b) Redistribution and use in source and binary forms, with or
26
-
* without modification, are permitted provided that the following
27
-
* conditions are met:
28
-
*
29
-
* 1. Redistributions of source code must retain the above
30
-
* copyright notice, this list of conditions and the following
31
-
* disclaimer.
32
-
* 2. Redistributions in binary form must reproduce the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer in the documentation and/or other materials
35
-
* provided with the distribution.
36
-
*
37
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49
5
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50
6
*/
51
7
#include "libfdt_env.h"
···
38
82
FDT_ERRTABENT(FDT_ERR_BADVALUE),
39
83
FDT_ERRTABENT(FDT_ERR_BADOVERLAY),
40
84
FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
85
+
FDT_ERRTABENT(FDT_ERR_BADFLAGS),
41
86
};
42
87
#define FDT_ERRTABSIZE (sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
43
88
+68
-57
scripts/dtc/libfdt/fdt_sw.c
+68
-57
scripts/dtc/libfdt/fdt_sw.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2006 David Gibson, IBM Corporation.
4
-
*
5
-
* libfdt is dual licensed: you can use it either under the terms of
6
-
* the GPL, or the BSD license, at your option.
7
-
*
8
-
* a) This library is free software; you can redistribute it and/or
9
-
* modify it under the terms of the GNU General Public License as
10
-
* published by the Free Software Foundation; either version 2 of the
11
-
* License, or (at your option) any later version.
12
-
*
13
-
* This library is distributed in the hope that it will be useful,
14
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
-
* GNU General Public License for more details.
17
-
*
18
-
* You should have received a copy of the GNU General Public
19
-
* License along with this library; if not, write to the Free
20
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21
-
* MA 02110-1301 USA
22
-
*
23
-
* Alternatively,
24
-
*
25
-
* b) Redistribution and use in source and binary forms, with or
26
-
* without modification, are permitted provided that the following
27
-
* conditions are met:
28
-
*
29
-
* 1. Redistributions of source code must retain the above
30
-
* copyright notice, this list of conditions and the following
31
-
* disclaimer.
32
-
* 2. Redistributions in binary form must reproduce the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer in the documentation and/or other materials
35
-
* provided with the distribution.
36
-
*
37
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50
5
*/
51
6
#include "libfdt_env.h"
52
7
···
76
121
return err; \
77
122
}
78
123
124
+
static inline uint32_t sw_flags(void *fdt)
125
+
{
126
+
/* assert: (fdt_magic(fdt) == FDT_SW_MAGIC) */
127
+
return fdt_last_comp_version(fdt);
128
+
}
129
+
79
130
/* 'complete' state: Enter this state after fdt_finish()
80
131
*
81
132
* Allowed functions: none
···
102
141
return fdt_offset_ptr_w_(fdt, offset);
103
142
}
104
143
105
-
int fdt_create(void *buf, int bufsize)
144
+
int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags)
106
145
{
107
146
const size_t hdrsize = FDT_ALIGN(sizeof(struct fdt_header),
108
147
sizeof(struct fdt_reserve_entry));
···
111
150
if (bufsize < hdrsize)
112
151
return -FDT_ERR_NOSPACE;
113
152
153
+
if (flags & ~FDT_CREATE_FLAGS_ALL)
154
+
return -FDT_ERR_BADFLAGS;
155
+
114
156
memset(buf, 0, bufsize);
115
157
158
+
/*
159
+
* magic and last_comp_version keep intermediate state during the fdt
160
+
* creation process, which is replaced with the proper FDT format by
161
+
* fdt_finish().
162
+
*
163
+
* flags should be accessed with sw_flags().
164
+
*/
116
165
fdt_set_magic(fdt, FDT_SW_MAGIC);
117
166
fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
118
-
fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
167
+
fdt_set_last_comp_version(fdt, flags);
168
+
119
169
fdt_set_totalsize(fdt, bufsize);
120
170
121
171
fdt_set_off_mem_rsvmap(fdt, hdrsize);
···
134
162
fdt_set_off_dt_strings(fdt, 0);
135
163
136
164
return 0;
165
+
}
166
+
167
+
int fdt_create(void *buf, int bufsize)
168
+
{
169
+
return fdt_create_with_flags(buf, bufsize, 0);
137
170
}
138
171
139
172
int fdt_resize(void *fdt, void *buf, int bufsize)
···
239
262
return 0;
240
263
}
241
264
242
-
static int fdt_find_add_string_(void *fdt, const char *s)
265
+
static int fdt_add_string_(void *fdt, const char *s)
243
266
{
244
267
char *strtab = (char *)fdt + fdt_totalsize(fdt);
245
-
const char *p;
246
268
int strtabsize = fdt_size_dt_strings(fdt);
247
269
int len = strlen(s) + 1;
248
270
int struct_top, offset;
249
271
250
-
p = fdt_find_string_(strtab - strtabsize, strtabsize, s);
251
-
if (p)
252
-
return p - strtab;
253
-
254
-
/* Add it */
255
272
offset = -strtabsize - len;
256
273
struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
257
274
if (fdt_totalsize(fdt) + offset < struct_top)
···
256
285
return offset;
257
286
}
258
287
288
+
/* Must only be used to roll back in case of error */
289
+
static void fdt_del_last_string_(void *fdt, const char *s)
290
+
{
291
+
int strtabsize = fdt_size_dt_strings(fdt);
292
+
int len = strlen(s) + 1;
293
+
294
+
fdt_set_size_dt_strings(fdt, strtabsize - len);
295
+
}
296
+
297
+
static int fdt_find_add_string_(void *fdt, const char *s, int *allocated)
298
+
{
299
+
char *strtab = (char *)fdt + fdt_totalsize(fdt);
300
+
int strtabsize = fdt_size_dt_strings(fdt);
301
+
const char *p;
302
+
303
+
*allocated = 0;
304
+
305
+
p = fdt_find_string_(strtab - strtabsize, strtabsize, s);
306
+
if (p)
307
+
return p - strtab;
308
+
309
+
*allocated = 1;
310
+
311
+
return fdt_add_string_(fdt, s);
312
+
}
313
+
259
314
int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)
260
315
{
261
316
struct fdt_property *prop;
262
317
int nameoff;
318
+
int allocated;
263
319
264
320
FDT_SW_PROBE_STRUCT(fdt);
265
321
266
-
nameoff = fdt_find_add_string_(fdt, name);
322
+
/* String de-duplication can be slow, _NO_NAME_DEDUP skips it */
323
+
if (sw_flags(fdt) & FDT_CREATE_FLAG_NO_NAME_DEDUP) {
324
+
allocated = 1;
325
+
nameoff = fdt_add_string_(fdt, name);
326
+
} else {
327
+
nameoff = fdt_find_add_string_(fdt, name, &allocated);
328
+
}
267
329
if (nameoff == 0)
268
330
return -FDT_ERR_NOSPACE;
269
331
270
332
prop = fdt_grab_space_(fdt, sizeof(*prop) + FDT_TAGALIGN(len));
271
-
if (! prop)
333
+
if (! prop) {
334
+
if (allocated)
335
+
fdt_del_last_string_(fdt, name);
272
336
return -FDT_ERR_NOSPACE;
337
+
}
273
338
274
339
prop->tag = cpu_to_fdt32(FDT_PROP);
275
340
prop->nameoff = cpu_to_fdt32(nameoff);
···
367
360
368
361
/* Finally, adjust the header */
369
362
fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
363
+
364
+
/* And fix up fields that were keeping intermediate state. */
365
+
fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
370
366
fdt_set_magic(fdt, FDT_MAGIC);
367
+
371
368
return 0;
372
369
}
+1
-46
scripts/dtc/libfdt/fdt_wip.c
+1
-46
scripts/dtc/libfdt/fdt_wip.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
1
2
/*
2
3
* libfdt - Flat Device Tree manipulation
3
4
* Copyright (C) 2006 David Gibson, IBM Corporation.
4
-
*
5
-
* libfdt is dual licensed: you can use it either under the terms of
6
-
* the GPL, or the BSD license, at your option.
7
-
*
8
-
* a) This library is free software; you can redistribute it and/or
9
-
* modify it under the terms of the GNU General Public License as
10
-
* published by the Free Software Foundation; either version 2 of the
11
-
* License, or (at your option) any later version.
12
-
*
13
-
* This library is distributed in the hope that it will be useful,
14
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
-
* GNU General Public License for more details.
17
-
*
18
-
* You should have received a copy of the GNU General Public
19
-
* License along with this library; if not, write to the Free
20
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21
-
* MA 02110-1301 USA
22
-
*
23
-
* Alternatively,
24
-
*
25
-
* b) Redistribution and use in source and binary forms, with or
26
-
* without modification, are permitted provided that the following
27
-
* conditions are met:
28
-
*
29
-
* 1. Redistributions of source code must retain the above
30
-
* copyright notice, this list of conditions and the following
31
-
* disclaimer.
32
-
* 2. Redistributions in binary form must reproduce the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer in the documentation and/or other materials
35
-
* provided with the distribution.
36
-
*
37
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50
5
*/
51
6
#include "libfdt_env.h"
52
7
+154
-51
scripts/dtc/libfdt/libfdt.h
+154
-51
scripts/dtc/libfdt/libfdt.h
···
1
+
/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
1
2
#ifndef LIBFDT_H
2
3
#define LIBFDT_H
3
4
/*
4
5
* libfdt - Flat Device Tree manipulation
5
6
* Copyright (C) 2006 David Gibson, IBM Corporation.
6
-
*
7
-
* libfdt is dual licensed: you can use it either under the terms of
8
-
* the GPL, or the BSD license, at your option.
9
-
*
10
-
* a) This library is free software; you can redistribute it and/or
11
-
* modify it under the terms of the GNU General Public License as
12
-
* published by the Free Software Foundation; either version 2 of the
13
-
* License, or (at your option) any later version.
14
-
*
15
-
* This library is distributed in the hope that it will be useful,
16
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
17
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18
-
* GNU General Public License for more details.
19
-
*
20
-
* You should have received a copy of the GNU General Public
21
-
* License along with this library; if not, write to the Free
22
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23
-
* MA 02110-1301 USA
24
-
*
25
-
* Alternatively,
26
-
*
27
-
* b) Redistribution and use in source and binary forms, with or
28
-
* without modification, are permitted provided that the following
29
-
* conditions are met:
30
-
*
31
-
* 1. Redistributions of source code must retain the above
32
-
* copyright notice, this list of conditions and the following
33
-
* disclaimer.
34
-
* 2. Redistributions in binary form must reproduce the above
35
-
* copyright notice, this list of conditions and the following
36
-
* disclaimer in the documentation and/or other materials
37
-
* provided with the distribution.
38
-
*
39
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
40
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
41
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
42
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
43
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
44
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
45
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
46
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
47
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
49
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
50
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
51
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52
7
*/
53
8
54
9
#include "libfdt_env.h"
···
93
138
/* FDT_ERR_NOPHANDLES: The device tree doesn't have any
94
139
* phandle available anymore without causing an overflow */
95
140
96
-
#define FDT_ERR_MAX 17
141
+
#define FDT_ERR_BADFLAGS 18
142
+
/* FDT_ERR_BADFLAGS: The function was passed a flags field that
143
+
* contains invalid flags or an invalid combination of flags. */
144
+
145
+
#define FDT_ERR_MAX 18
146
+
147
+
/* constants */
148
+
#define FDT_MAX_PHANDLE 0xfffffffe
149
+
/* Valid values for phandles range from 1 to 2^32-2. */
97
150
98
151
/**********************************************************************/
99
152
/* Low-level functions (you probably don't need these) */
···
134
171
| bp[3];
135
172
}
136
173
174
+
static inline void fdt32_st(void *property, uint32_t value)
175
+
{
176
+
uint8_t *bp = property;
177
+
178
+
bp[0] = value >> 24;
179
+
bp[1] = (value >> 16) & 0xff;
180
+
bp[2] = (value >> 8) & 0xff;
181
+
bp[3] = value & 0xff;
182
+
}
183
+
137
184
static inline uint64_t fdt64_ld(const fdt64_t *p)
138
185
{
139
186
const uint8_t *bp = (const uint8_t *)p;
···
156
183
| ((uint64_t)bp[5] << 16)
157
184
| ((uint64_t)bp[6] << 8)
158
185
| bp[7];
186
+
}
187
+
188
+
static inline void fdt64_st(void *property, uint64_t value)
189
+
{
190
+
uint8_t *bp = property;
191
+
192
+
bp[0] = value >> 56;
193
+
bp[1] = (value >> 48) & 0xff;
194
+
bp[2] = (value >> 40) & 0xff;
195
+
bp[3] = (value >> 32) & 0xff;
196
+
bp[4] = (value >> 24) & 0xff;
197
+
bp[5] = (value >> 16) & 0xff;
198
+
bp[6] = (value >> 8) & 0xff;
199
+
bp[7] = value & 0xff;
159
200
}
160
201
161
202
/**********************************************************************/
···
214
227
* ...
215
228
* }
216
229
*
217
-
* if ((node < 0) && (node != -FDT_ERR_NOT_FOUND)) {
230
+
* if ((node < 0) && (node != -FDT_ERR_NOTFOUND)) {
218
231
* Error handling
219
232
* }
220
233
*
···
349
362
const char *fdt_string(const void *fdt, int stroffset);
350
363
351
364
/**
365
+
* fdt_find_max_phandle - find and return the highest phandle in a tree
366
+
* @fdt: pointer to the device tree blob
367
+
* @phandle: return location for the highest phandle value found in the tree
368
+
*
369
+
* fdt_find_max_phandle() finds the highest phandle value in the given device
370
+
* tree. The value returned in @phandle is only valid if the function returns
371
+
* success.
372
+
*
373
+
* returns:
374
+
* 0 on success or a negative error code on failure
375
+
*/
376
+
int fdt_find_max_phandle(const void *fdt, uint32_t *phandle);
377
+
378
+
/**
352
379
* fdt_get_max_phandle - retrieves the highest phandle in a tree
353
380
* @fdt: pointer to the device tree blob
354
381
*
···
370
369
* device tree. This will ignore badly formatted phandles, or phandles
371
370
* with a value of 0 or -1.
372
371
*
372
+
* This function is deprecated in favour of fdt_find_max_phandle().
373
+
*
373
374
* returns:
374
375
* the highest phandle on success
375
376
* 0, if no phandle was found in the device tree
376
377
* -1, if an error occurred
377
378
*/
378
-
uint32_t fdt_get_max_phandle(const void *fdt);
379
+
static inline uint32_t fdt_get_max_phandle(const void *fdt)
380
+
{
381
+
uint32_t phandle;
382
+
int err;
383
+
384
+
err = fdt_find_max_phandle(fdt, &phandle);
385
+
if (err < 0)
386
+
return (uint32_t)-1;
387
+
388
+
return phandle;
389
+
}
390
+
391
+
/**
392
+
* fdt_generate_phandle - return a new, unused phandle for a device tree blob
393
+
* @fdt: pointer to the device tree blob
394
+
* @phandle: return location for the new phandle
395
+
*
396
+
* Walks the device tree blob and looks for the highest phandle value. On
397
+
* success, the new, unused phandle value (one higher than the previously
398
+
* highest phandle value in the device tree blob) will be returned in the
399
+
* @phandle parameter.
400
+
*
401
+
* Returns:
402
+
* 0 on success or a negative error-code on failure
403
+
*/
404
+
int fdt_generate_phandle(const void *fdt, uint32_t *phandle);
379
405
380
406
/**
381
407
* fdt_num_mem_rsv - retrieve the number of memory reserve map entries
···
594
566
* ...
595
567
* }
596
568
*
597
-
* if ((property < 0) && (property != -FDT_ERR_NOT_FOUND)) {
569
+
* if ((property < 0) && (property != -FDT_ERR_NOTFOUND)) {
598
570
* Error handling
599
571
* }
600
572
*
···
697
669
/**
698
670
* fdt_getprop_by_offset - retrieve the value of a property at a given offset
699
671
* @fdt: pointer to the device tree blob
700
-
* @ffset: offset of the property to read
672
+
* @offset: offset of the property to read
701
673
* @namep: pointer to a string variable (will be overwritten) or NULL
702
674
* @lenp: pointer to an integer variable (will be overwritten) or NULL
703
675
*
···
1388
1360
/* Sequential write functions */
1389
1361
/**********************************************************************/
1390
1362
1363
+
/* fdt_create_with_flags flags */
1364
+
#define FDT_CREATE_FLAG_NO_NAME_DEDUP 0x1
1365
+
/* FDT_CREATE_FLAG_NO_NAME_DEDUP: Do not try to de-duplicate property
1366
+
* names in the fdt. This can result in faster creation times, but
1367
+
* a larger fdt. */
1368
+
1369
+
#define FDT_CREATE_FLAGS_ALL (FDT_CREATE_FLAG_NO_NAME_DEDUP)
1370
+
1371
+
/**
1372
+
* fdt_create_with_flags - begin creation of a new fdt
1373
+
* @fdt: pointer to memory allocated where fdt will be created
1374
+
* @bufsize: size of the memory space at fdt
1375
+
* @flags: a valid combination of FDT_CREATE_FLAG_ flags, or 0.
1376
+
*
1377
+
* fdt_create_with_flags() begins the process of creating a new fdt with
1378
+
* the sequential write interface.
1379
+
*
1380
+
* fdt creation process must end with fdt_finished() to produce a valid fdt.
1381
+
*
1382
+
* returns:
1383
+
* 0, on success
1384
+
* -FDT_ERR_NOSPACE, bufsize is insufficient for a minimal fdt
1385
+
* -FDT_ERR_BADFLAGS, flags is not valid
1386
+
*/
1387
+
int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags);
1388
+
1389
+
/**
1390
+
* fdt_create - begin creation of a new fdt
1391
+
* @fdt: pointer to memory allocated where fdt will be created
1392
+
* @bufsize: size of the memory space at fdt
1393
+
*
1394
+
* fdt_create() is equivalent to fdt_create_with_flags() with flags=0.
1395
+
*
1396
+
* returns:
1397
+
* 0, on success
1398
+
* -FDT_ERR_NOSPACE, bufsize is insufficient for a minimal fdt
1399
+
*/
1391
1400
int fdt_create(void *buf, int bufsize);
1401
+
1392
1402
int fdt_resize(void *fdt, void *buf, int bufsize);
1393
1403
int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size);
1394
1404
int fdt_finish_reservemap(void *fdt);
···
1896
1830
*/
1897
1831
#define fdt_appendprop_string(fdt, nodeoffset, name, str) \
1898
1832
fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
1833
+
1834
+
/**
1835
+
* fdt_appendprop_addrrange - append a address range property
1836
+
* @fdt: pointer to the device tree blob
1837
+
* @parent: offset of the parent node
1838
+
* @nodeoffset: offset of the node to add a property at
1839
+
* @name: name of property
1840
+
* @addr: start address of a given range
1841
+
* @size: size of a given range
1842
+
*
1843
+
* fdt_appendprop_addrrange() appends an address range value (start
1844
+
* address and size) to the value of the named property in the given
1845
+
* node, or creates a new property with that value if it does not
1846
+
* already exist.
1847
+
* If "name" is not specified, a default "reg" is used.
1848
+
* Cell sizes are determined by parent's #address-cells and #size-cells.
1849
+
*
1850
+
* This function may insert data into the blob, and will therefore
1851
+
* change the offsets of some existing nodes.
1852
+
*
1853
+
* returns:
1854
+
* 0, on success
1855
+
* -FDT_ERR_BADLAYOUT,
1856
+
* -FDT_ERR_BADMAGIC,
1857
+
* -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
1858
+
* #address-cells property
1859
+
* -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
1860
+
* -FDT_ERR_BADSTATE,
1861
+
* -FDT_ERR_BADSTRUCTURE,
1862
+
* -FDT_ERR_BADVERSION,
1863
+
* -FDT_ERR_BADVALUE, addr or size doesn't fit to respective cells size
1864
+
* -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
1865
+
* contain a new property
1866
+
* -FDT_ERR_TRUNCATED, standard meanings
1867
+
*/
1868
+
int fdt_appendprop_addrrange(void *fdt, int parent, int nodeoffset,
1869
+
const char *name, uint64_t addr, uint64_t size);
1899
1870
1900
1871
/**
1901
1872
* fdt_delprop - delete a property
+2
-46
scripts/dtc/libfdt/libfdt_env.h
+2
-46
scripts/dtc/libfdt/libfdt_env.h
···
1
+
/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
1
2
#ifndef LIBFDT_ENV_H
2
3
#define LIBFDT_ENV_H
3
4
/*
4
5
* libfdt - Flat Device Tree manipulation
5
6
* Copyright (C) 2006 David Gibson, IBM Corporation.
6
7
* Copyright 2012 Kim Phillips, Freescale Semiconductor.
7
-
*
8
-
* libfdt is dual licensed: you can use it either under the terms of
9
-
* the GPL, or the BSD license, at your option.
10
-
*
11
-
* a) This library is free software; you can redistribute it and/or
12
-
* modify it under the terms of the GNU General Public License as
13
-
* published by the Free Software Foundation; either version 2 of the
14
-
* License, or (at your option) any later version.
15
-
*
16
-
* This library is distributed in the hope that it will be useful,
17
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
18
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19
-
* GNU General Public License for more details.
20
-
*
21
-
* You should have received a copy of the GNU General Public
22
-
* License along with this library; if not, write to the Free
23
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24
-
* MA 02110-1301 USA
25
-
*
26
-
* Alternatively,
27
-
*
28
-
* b) Redistribution and use in source and binary forms, with or
29
-
* without modification, are permitted provided that the following
30
-
* conditions are met:
31
-
*
32
-
* 1. Redistributions of source code must retain the above
33
-
* copyright notice, this list of conditions and the following
34
-
* disclaimer.
35
-
* 2. Redistributions in binary form must reproduce the above
36
-
* copyright notice, this list of conditions and the following
37
-
* disclaimer in the documentation and/or other materials
38
-
* provided with the distribution.
39
-
*
40
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
41
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
42
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
43
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
44
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
45
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
46
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
47
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
48
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
49
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
50
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
51
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
52
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53
8
*/
54
9
10
+
#include <stdbool.h>
55
11
#include <stddef.h>
56
12
#include <stdint.h>
57
13
#include <stdlib.h>
+1
-46
scripts/dtc/libfdt/libfdt_internal.h
+1
-46
scripts/dtc/libfdt/libfdt_internal.h
···
1
+
/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
1
2
#ifndef LIBFDT_INTERNAL_H
2
3
#define LIBFDT_INTERNAL_H
3
4
/*
4
5
* libfdt - Flat Device Tree manipulation
5
6
* Copyright (C) 2006 David Gibson, IBM Corporation.
6
-
*
7
-
* libfdt is dual licensed: you can use it either under the terms of
8
-
* the GPL, or the BSD license, at your option.
9
-
*
10
-
* a) This library is free software; you can redistribute it and/or
11
-
* modify it under the terms of the GNU General Public License as
12
-
* published by the Free Software Foundation; either version 2 of the
13
-
* License, or (at your option) any later version.
14
-
*
15
-
* This library is distributed in the hope that it will be useful,
16
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
17
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18
-
* GNU General Public License for more details.
19
-
*
20
-
* You should have received a copy of the GNU General Public
21
-
* License along with this library; if not, write to the Free
22
-
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23
-
* MA 02110-1301 USA
24
-
*
25
-
* Alternatively,
26
-
*
27
-
* b) Redistribution and use in source and binary forms, with or
28
-
* without modification, are permitted provided that the following
29
-
* conditions are met:
30
-
*
31
-
* 1. Redistributions of source code must retain the above
32
-
* copyright notice, this list of conditions and the following
33
-
* disclaimer.
34
-
* 2. Redistributions in binary form must reproduce the above
35
-
* copyright notice, this list of conditions and the following
36
-
* disclaimer in the documentation and/or other materials
37
-
* provided with the distribution.
38
-
*
39
-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
40
-
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
41
-
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
42
-
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
43
-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
44
-
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
45
-
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
46
-
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
47
-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48
-
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
49
-
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
50
-
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
51
-
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52
7
*/
53
8
#include <fdt.h>
54
9
+12
-8
scripts/dtc/livetree.c
+12
-8
scripts/dtc/livetree.c
···
234
234
char *name;
235
235
236
236
if (ref[0] == '/') {
237
+
d = data_add_marker(d, TYPE_STRING, ref);
237
238
d = data_append_data(d, ref, strlen(ref) + 1);
238
239
239
240
p = build_property("target-path", d, NULL);
···
336
335
}
337
336
338
337
void append_to_property(struct node *node,
339
-
char *name, const void *data, int len)
338
+
char *name, const void *data, int len,
339
+
enum markertype type)
340
340
{
341
341
struct data d;
342
342
struct property *p;
343
343
344
344
p = get_property(node, name);
345
345
if (p) {
346
-
d = data_append_data(p->val, data, len);
346
+
d = data_add_marker(p->val, type, name);
347
+
d = data_append_data(d, data, len);
347
348
p->val = d;
348
349
} else {
349
-
d = data_append_data(empty_data, data, len);
350
+
d = data_add_marker(empty_data, type, name);
351
+
d = data_append_data(d, data, len);
350
352
p = build_property(name, d, NULL);
351
353
add_property(node, p);
352
354
}
···
847
843
848
844
/* insert it */
849
845
p = build_property(l->label,
850
-
data_copy_mem(node->fullpath,
851
-
strlen(node->fullpath) + 1),
846
+
data_copy_escape_string(node->fullpath,
847
+
strlen(node->fullpath)),
852
848
NULL);
853
849
add_property(an, p);
854
850
}
···
899
895
900
896
xasprintf(&entry, "%s:%s:%u",
901
897
node->fullpath, prop->name, m->offset);
902
-
append_to_property(fn, m->ref, entry, strlen(entry) + 1);
898
+
append_to_property(fn, m->ref, entry, strlen(entry) + 1, TYPE_STRING);
903
899
904
900
free(entry);
905
901
}
···
959
955
char **compp;
960
956
int i, depth;
961
957
962
-
/* walk back retreiving depth */
958
+
/* walk back retrieving depth */
963
959
depth = 0;
964
960
for (wn = node; wn; wn = wn->parent)
965
961
depth++;
···
982
978
free(compp);
983
979
984
980
value_32 = cpu_to_fdt32(m->offset);
985
-
append_to_property(wn, prop->name, &value_32, sizeof(value_32));
981
+
append_to_property(wn, prop->name, &value_32, sizeof(value_32), TYPE_UINT32);
986
982
}
987
983
988
984
static void generate_local_fixups_tree_internal(struct dt_info *dti,
+2
-2
scripts/dtc/util.h
+2
-2
scripts/dtc/util.h
···
108
108
* stderr.
109
109
*
110
110
* @param filename The filename to write, or - for stdout
111
-
* @param blob Poiner to buffer containing fdt
111
+
* @param blob Pointer to buffer containing fdt
112
112
* @return 0 if ok, -1 on error
113
113
*/
114
114
int utilfdt_write(const char *filename, const void *blob);
···
119
119
* an error message for the user.
120
120
*
121
121
* @param filename The filename to write, or - for stdout
122
-
* @param blob Poiner to buffer containing fdt
122
+
* @param blob Pointer to buffer containing fdt
123
123
* @return 0 if ok, else an errno value representing the error
124
124
*/
125
125
int utilfdt_write_err(const char *filename, const void *blob);