ALSA: ens137x: Use guard() for spin locks

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Clean up the code using guard() for spin locks.

Merely code refactoring, and no behavior change.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250829144342.4290-7-tiwai@suse.de

Takashi Iwai 7 months ago d062d697 d701303b

+138 -165

1 changed file

expand all

sound

pci

ens1370.c

+138 -165

sound/pci/ens1370.c

··· 799 799 } else if (s == ensoniq->capture_substream) 800 800 return -EINVAL; 801 801 } 802 - spin_lock(&ensoniq->reg_lock); 803 - if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 804 - ensoniq->sctrl |= what; 805 - else 806 - ensoniq->sctrl &= ~what; 807 - outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 808 - spin_unlock(&ensoniq->reg_lock); 802 + scoped_guard(spinlock, &ensoniq->reg_lock) { 803 + if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 804 + ensoniq->sctrl |= what; 805 + else 806 + ensoniq->sctrl &= ~what; 807 + outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 808 + } 809 809 break; 810 810 } 811 811 case SNDRV_PCM_TRIGGER_START: ··· 825 825 snd_pcm_trigger_done(s, substream); 826 826 } 827 827 } 828 - spin_lock(&ensoniq->reg_lock); 829 - if (cmd == SNDRV_PCM_TRIGGER_START) 830 - ensoniq->ctrl |= what; 831 - else 832 - ensoniq->ctrl &= ~what; 833 - outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 834 - spin_unlock(&ensoniq->reg_lock); 828 + scoped_guard(spinlock, &ensoniq->reg_lock) { 829 + if (cmd == SNDRV_PCM_TRIGGER_START) 830 + ensoniq->ctrl |= what; 831 + else 832 + ensoniq->ctrl &= ~what; 833 + outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 834 + } 835 835 break; 836 836 } 837 837 default: ··· 856 856 mode |= 0x02; 857 857 if (runtime->channels > 1) 858 858 mode |= 0x01; 859 - spin_lock_irq(&ensoniq->reg_lock); 860 - ensoniq->ctrl &= ~ES_DAC1_EN; 859 + scoped_guard(spinlock_irq, &ensoniq->reg_lock) { 860 + ensoniq->ctrl &= ~ES_DAC1_EN; 861 861 #ifdef CHIP1371 862 - /* 48k doesn't need SRC (it breaks AC3-passthru) */ 863 - if (runtime->rate == 48000) 864 - ensoniq->ctrl |= ES_1373_BYPASS_P1; 865 - else 866 - ensoniq->ctrl &= ~ES_1373_BYPASS_P1; 862 + /* 48k doesn't need SRC (it breaks AC3-passthru) */ 863 + if (runtime->rate == 48000) 864 + ensoniq->ctrl |= ES_1373_BYPASS_P1; 865 + else 866 + ensoniq->ctrl &= ~ES_1373_BYPASS_P1; 867 867 #endif 868 - outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 869 - outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 870 - outl(runtime->dma_addr, ES_REG(ensoniq, DAC1_FRAME)); 871 - outl((ensoniq->p1_dma_size >> 2) - 1, ES_REG(ensoniq, DAC1_SIZE)); 872 - ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM); 873 - ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode); 874 - outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 875 - outl((ensoniq->p1_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 876 - ES_REG(ensoniq, DAC1_COUNT)); 868 + outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 869 + outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 870 + outl(runtime->dma_addr, ES_REG(ensoniq, DAC1_FRAME)); 871 + outl((ensoniq->p1_dma_size >> 2) - 1, ES_REG(ensoniq, DAC1_SIZE)); 872 + ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM); 873 + ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode); 874 + outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 875 + outl((ensoniq->p1_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 876 + ES_REG(ensoniq, DAC1_COUNT)); 877 877 #ifdef CHIP1370 878 - ensoniq->ctrl &= ~ES_1370_WTSRSELM; 879 - switch (runtime->rate) { 880 - case 5512: ensoniq->ctrl |= ES_1370_WTSRSEL(0); break; 881 - case 11025: ensoniq->ctrl |= ES_1370_WTSRSEL(1); break; 882 - case 22050: ensoniq->ctrl |= ES_1370_WTSRSEL(2); break; 883 - case 44100: ensoniq->ctrl |= ES_1370_WTSRSEL(3); break; 884 - default: snd_BUG(); 885 - } 878 + ensoniq->ctrl &= ~ES_1370_WTSRSELM; 879 + switch (runtime->rate) { 880 + case 5512: ensoniq->ctrl |= ES_1370_WTSRSEL(0); break; 881 + case 11025: ensoniq->ctrl |= ES_1370_WTSRSEL(1); break; 882 + case 22050: ensoniq->ctrl |= ES_1370_WTSRSEL(2); break; 883 + case 44100: ensoniq->ctrl |= ES_1370_WTSRSEL(3); break; 884 + default: snd_BUG(); 885 + } 886 886 #endif 887 - outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 888 - spin_unlock_irq(&ensoniq->reg_lock); 887 + outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 888 + } 889 889 #ifndef CHIP1370 890 890 snd_es1371_dac1_rate(ensoniq, runtime->rate); 891 891 #endif ··· 904 904 mode |= 0x02; 905 905 if (runtime->channels > 1) 906 906 mode |= 0x01; 907 - spin_lock_irq(&ensoniq->reg_lock); 908 - ensoniq->ctrl &= ~ES_DAC2_EN; 909 - outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 910 - outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 911 - outl(runtime->dma_addr, ES_REG(ensoniq, DAC2_FRAME)); 912 - outl((ensoniq->p2_dma_size >> 2) - 1, ES_REG(ensoniq, DAC2_SIZE)); 913 - ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN | 914 - ES_P2_END_INCM | ES_P2_ST_INCM | ES_P2_MODEM); 915 - ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) | 916 - ES_P2_END_INCO(mode & 2 ? 2 : 1) | ES_P2_ST_INCO(0); 917 - outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 918 - outl((ensoniq->p2_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 919 - ES_REG(ensoniq, DAC2_COUNT)); 907 + scoped_guard(spinlock_irq, &ensoniq->reg_lock) { 908 + ensoniq->ctrl &= ~ES_DAC2_EN; 909 + outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 910 + outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 911 + outl(runtime->dma_addr, ES_REG(ensoniq, DAC2_FRAME)); 912 + outl((ensoniq->p2_dma_size >> 2) - 1, ES_REG(ensoniq, DAC2_SIZE)); 913 + ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN | 914 + ES_P2_END_INCM | ES_P2_ST_INCM | ES_P2_MODEM); 915 + ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) | 916 + ES_P2_END_INCO(mode & 2 ? 2 : 1) | ES_P2_ST_INCO(0); 917 + outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 918 + outl((ensoniq->p2_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 919 + ES_REG(ensoniq, DAC2_COUNT)); 920 920 #ifdef CHIP1370 921 - if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_CAPTURE)) { 922 - ensoniq->ctrl &= ~ES_1370_PCLKDIVM; 923 - ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate)); 924 - ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_PLAY2; 925 - } 921 + if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_CAPTURE)) { 922 + ensoniq->ctrl &= ~ES_1370_PCLKDIVM; 923 + ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate)); 924 + ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_PLAY2; 925 + } 926 926 #endif 927 - outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 928 - spin_unlock_irq(&ensoniq->reg_lock); 927 + outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 928 + } 929 929 #ifndef CHIP1370 930 930 snd_es1371_dac2_rate(ensoniq, runtime->rate); 931 931 #endif ··· 944 944 mode |= 0x02; 945 945 if (runtime->channels > 1) 946 946 mode |= 0x01; 947 - spin_lock_irq(&ensoniq->reg_lock); 948 - ensoniq->ctrl &= ~ES_ADC_EN; 949 - outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 950 - outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE)); 951 - outl(runtime->dma_addr, ES_REG(ensoniq, ADC_FRAME)); 952 - outl((ensoniq->c_dma_size >> 2) - 1, ES_REG(ensoniq, ADC_SIZE)); 953 - ensoniq->sctrl &= ~(ES_R1_LOOP_SEL | ES_R1_MODEM); 954 - ensoniq->sctrl |= ES_R1_INT_EN | ES_R1_MODEO(mode); 955 - outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 956 - outl((ensoniq->c_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 957 - ES_REG(ensoniq, ADC_COUNT)); 947 + scoped_guard(spinlock_irq, &ensoniq->reg_lock) { 948 + ensoniq->ctrl &= ~ES_ADC_EN; 949 + outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 950 + outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE)); 951 + outl(runtime->dma_addr, ES_REG(ensoniq, ADC_FRAME)); 952 + outl((ensoniq->c_dma_size >> 2) - 1, ES_REG(ensoniq, ADC_SIZE)); 953 + ensoniq->sctrl &= ~(ES_R1_LOOP_SEL | ES_R1_MODEM); 954 + ensoniq->sctrl |= ES_R1_INT_EN | ES_R1_MODEO(mode); 955 + outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 956 + outl((ensoniq->c_period_size >> snd_ensoniq_sample_shift[mode]) - 1, 957 + ES_REG(ensoniq, ADC_COUNT)); 958 958 #ifdef CHIP1370 959 - if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_PLAY2)) { 960 - ensoniq->ctrl &= ~ES_1370_PCLKDIVM; 961 - ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate)); 962 - ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_CAPTURE; 963 - } 959 + if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_PLAY2)) { 960 + ensoniq->ctrl &= ~ES_1370_PCLKDIVM; 961 + ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate)); 962 + ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_CAPTURE; 963 + } 964 964 #endif 965 - outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 966 - spin_unlock_irq(&ensoniq->reg_lock); 965 + outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 966 + } 967 967 #ifndef CHIP1370 968 968 snd_es1371_adc_rate(ensoniq, runtime->rate); 969 969 #endif ··· 975 975 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 976 976 size_t ptr; 977 977 978 - spin_lock(&ensoniq->reg_lock); 978 + guard(spinlock)(&ensoniq->reg_lock); 979 979 if (inl(ES_REG(ensoniq, CONTROL)) & ES_DAC1_EN) { 980 980 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 981 981 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, DAC1_SIZE))); 982 - ptr = bytes_to_frames(substream->runtime, ptr); 982 + return bytes_to_frames(substream->runtime, ptr); 983 983 } else { 984 - ptr = 0; 984 + return 0; 985 985 } 986 - spin_unlock(&ensoniq->reg_lock); 987 - return ptr; 988 986 } 989 987 990 988 static snd_pcm_uframes_t snd_ensoniq_playback2_pointer(struct snd_pcm_substream *substream) ··· 990 992 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 991 993 size_t ptr; 992 994 993 - spin_lock(&ensoniq->reg_lock); 995 + guard(spinlock)(&ensoniq->reg_lock); 994 996 if (inl(ES_REG(ensoniq, CONTROL)) & ES_DAC2_EN) { 995 997 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE)); 996 998 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, DAC2_SIZE))); 997 - ptr = bytes_to_frames(substream->runtime, ptr); 999 + return bytes_to_frames(substream->runtime, ptr); 998 1000 } else { 999 - ptr = 0; 1001 + return 0; 1000 1002 } 1001 - spin_unlock(&ensoniq->reg_lock); 1002 - return ptr; 1003 1003 } 1004 1004 1005 1005 static snd_pcm_uframes_t snd_ensoniq_capture_pointer(struct snd_pcm_substream *substream) ··· 1005 1009 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1006 1010 size_t ptr; 1007 1011 1008 - spin_lock(&ensoniq->reg_lock); 1012 + guard(spinlock)(&ensoniq->reg_lock); 1009 1013 if (inl(ES_REG(ensoniq, CONTROL)) & ES_ADC_EN) { 1010 1014 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE)); 1011 1015 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, ADC_SIZE))); 1012 - ptr = bytes_to_frames(substream->runtime, ptr); 1016 + return bytes_to_frames(substream->runtime, ptr); 1013 1017 } else { 1014 - ptr = 0; 1018 + return 0; 1015 1019 } 1016 - spin_unlock(&ensoniq->reg_lock); 1017 - return ptr; 1018 1020 } 1019 1021 1020 1022 static const struct snd_pcm_hardware snd_ensoniq_playback1 = ··· 1090 1096 ensoniq->playback1_substream = substream; 1091 1097 runtime->hw = snd_ensoniq_playback1; 1092 1098 snd_pcm_set_sync(substream); 1093 - spin_lock_irq(&ensoniq->reg_lock); 1094 - if (ensoniq->spdif && ensoniq->playback2_substream == NULL) 1095 - ensoniq->spdif_stream = ensoniq->spdif_default; 1096 - spin_unlock_irq(&ensoniq->reg_lock); 1099 + scoped_guard(spinlock_irq, &ensoniq->reg_lock) { 1100 + if (ensoniq->spdif && ensoniq->playback2_substream == NULL) 1101 + ensoniq->spdif_stream = ensoniq->spdif_default; 1102 + } 1097 1103 #ifdef CHIP1370 1098 1104 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1099 1105 &snd_es1370_hw_constraints_rates); ··· 1113 1119 ensoniq->playback2_substream = substream; 1114 1120 runtime->hw = snd_ensoniq_playback2; 1115 1121 snd_pcm_set_sync(substream); 1116 - spin_lock_irq(&ensoniq->reg_lock); 1117 - if (ensoniq->spdif && ensoniq->playback1_substream == NULL) 1118 - ensoniq->spdif_stream = ensoniq->spdif_default; 1119 - spin_unlock_irq(&ensoniq->reg_lock); 1122 + scoped_guard(spinlock_irq, &ensoniq->reg_lock) { 1123 + if (ensoniq->spdif && ensoniq->playback1_substream == NULL) 1124 + ensoniq->spdif_stream = ensoniq->spdif_default; 1125 + } 1120 1126 #ifdef CHIP1370 1121 1127 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 1122 1128 &snd_es1370_hw_constraints_clock); ··· 1160 1166 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1161 1167 1162 1168 ensoniq->playback2_substream = NULL; 1163 - spin_lock_irq(&ensoniq->reg_lock); 1169 + guard(spinlock_irq)(&ensoniq->reg_lock); 1164 1170 #ifdef CHIP1370 1165 1171 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_PLAY2; 1166 1172 #endif 1167 1173 ensoniq->mode &= ~ES_MODE_PLAY2; 1168 - spin_unlock_irq(&ensoniq->reg_lock); 1169 1174 return 0; 1170 1175 } 1171 1176 ··· 1173 1180 struct ensoniq *ensoniq = snd_pcm_substream_chip(substream); 1174 1181 1175 1182 ensoniq->capture_substream = NULL; 1176 - spin_lock_irq(&ensoniq->reg_lock); 1183 + guard(spinlock_irq)(&ensoniq->reg_lock); 1177 1184 #ifdef CHIP1370 1178 1185 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_CAPTURE; 1179 1186 #endif 1180 1187 ensoniq->mode &= ~ES_MODE_CAPTURE; 1181 - spin_unlock_irq(&ensoniq->reg_lock); 1182 1188 return 0; 1183 1189 } 1184 1190 ··· 1299 1307 struct snd_ctl_elem_value *ucontrol) 1300 1308 { 1301 1309 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1302 - spin_lock_irq(&ensoniq->reg_lock); 1310 + 1311 + guard(spinlock_irq)(&ensoniq->reg_lock); 1303 1312 ucontrol->value.iec958.status[0] = (ensoniq->spdif_default >> 0) & 0xff; 1304 1313 ucontrol->value.iec958.status[1] = (ensoniq->spdif_default >> 8) & 0xff; 1305 1314 ucontrol->value.iec958.status[2] = (ensoniq->spdif_default >> 16) & 0xff; 1306 1315 ucontrol->value.iec958.status[3] = (ensoniq->spdif_default >> 24) & 0xff; 1307 - spin_unlock_irq(&ensoniq->reg_lock); 1308 1316 return 0; 1309 1317 } 1310 1318 ··· 1319 1327 ((u32)ucontrol->value.iec958.status[1] << 8) | 1320 1328 ((u32)ucontrol->value.iec958.status[2] << 16) | 1321 1329 ((u32)ucontrol->value.iec958.status[3] << 24); 1322 - spin_lock_irq(&ensoniq->reg_lock); 1330 + guard(spinlock_irq)(&ensoniq->reg_lock); 1323 1331 change = ensoniq->spdif_default != val; 1324 1332 ensoniq->spdif_default = val; 1325 1333 if (change && ensoniq->playback1_substream == NULL && 1326 1334 ensoniq->playback2_substream == NULL) 1327 1335 outl(val, ES_REG(ensoniq, CHANNEL_STATUS)); 1328 - spin_unlock_irq(&ensoniq->reg_lock); 1329 1336 return change; 1330 1337 } 1331 1338 ··· 1342 1351 struct snd_ctl_elem_value *ucontrol) 1343 1352 { 1344 1353 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1345 - spin_lock_irq(&ensoniq->reg_lock); 1354 + 1355 + guard(spinlock_irq)(&ensoniq->reg_lock); 1346 1356 ucontrol->value.iec958.status[0] = (ensoniq->spdif_stream >> 0) & 0xff; 1347 1357 ucontrol->value.iec958.status[1] = (ensoniq->spdif_stream >> 8) & 0xff; 1348 1358 ucontrol->value.iec958.status[2] = (ensoniq->spdif_stream >> 16) & 0xff; 1349 1359 ucontrol->value.iec958.status[3] = (ensoniq->spdif_stream >> 24) & 0xff; 1350 - spin_unlock_irq(&ensoniq->reg_lock); 1351 1360 return 0; 1352 1361 } 1353 1362 ··· 1362 1371 ((u32)ucontrol->value.iec958.status[1] << 8) | 1363 1372 ((u32)ucontrol->value.iec958.status[2] << 16) | 1364 1373 ((u32)ucontrol->value.iec958.status[3] << 24); 1365 - spin_lock_irq(&ensoniq->reg_lock); 1374 + guard(spinlock_irq)(&ensoniq->reg_lock); 1366 1375 change = ensoniq->spdif_stream != val; 1367 1376 ensoniq->spdif_stream = val; 1368 1377 if (change && (ensoniq->playback1_substream != NULL || 1369 1378 ensoniq->playback2_substream != NULL)) 1370 1379 outl(val, ES_REG(ensoniq, CHANNEL_STATUS)); 1371 - spin_unlock_irq(&ensoniq->reg_lock); 1372 1380 return change; 1373 1381 } 1374 1382 ··· 1382 1392 { 1383 1393 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1384 1394 1385 - spin_lock_irq(&ensoniq->reg_lock); 1395 + guard(spinlock_irq)(&ensoniq->reg_lock); 1386 1396 ucontrol->value.integer.value[0] = ensoniq->ctrl & ES_1373_SPDIF_THRU ? 1 : 0; 1387 - spin_unlock_irq(&ensoniq->reg_lock); 1388 1397 return 0; 1389 1398 } 1390 1399 ··· 1396 1407 1397 1408 nval1 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_THRU : 0; 1398 1409 nval2 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_EN : 0; 1399 - spin_lock_irq(&ensoniq->reg_lock); 1410 + guard(spinlock_irq)(&ensoniq->reg_lock); 1400 1411 change = (ensoniq->ctrl & ES_1373_SPDIF_THRU) != nval1; 1401 1412 ensoniq->ctrl &= ~ES_1373_SPDIF_THRU; 1402 1413 ensoniq->ctrl |= nval1; ··· 1404 1415 ensoniq->cssr |= nval2; 1405 1416 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1406 1417 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 1407 - spin_unlock_irq(&ensoniq->reg_lock); 1408 1418 return change; 1409 1419 } 1410 1420 ··· 1443 1455 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1444 1456 int val = 0; 1445 1457 1446 - spin_lock_irq(&ensoniq->reg_lock); 1458 + guard(spinlock_irq)(&ensoniq->reg_lock); 1447 1459 if ((ensoniq->cssr & (ES_1373_REAR_BIT27|ES_1373_REAR_BIT26| 1448 1460 ES_1373_REAR_BIT24)) == ES_1373_REAR_BIT26) 1449 1461 val = 1; 1450 1462 ucontrol->value.integer.value[0] = val; 1451 - spin_unlock_irq(&ensoniq->reg_lock); 1452 1463 return 0; 1453 1464 } 1454 1465 ··· 1460 1473 1461 1474 nval1 = ucontrol->value.integer.value[0] ? 1462 1475 ES_1373_REAR_BIT26 : (ES_1373_REAR_BIT27|ES_1373_REAR_BIT24); 1463 - spin_lock_irq(&ensoniq->reg_lock); 1476 + guard(spinlock_irq)(&ensoniq->reg_lock); 1464 1477 change = (ensoniq->cssr & (ES_1373_REAR_BIT27| 1465 1478 ES_1373_REAR_BIT26|ES_1373_REAR_BIT24)) != nval1; 1466 1479 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24); 1467 1480 ensoniq->cssr |= nval1; 1468 1481 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); 1469 - spin_unlock_irq(&ensoniq->reg_lock); 1470 1482 return change; 1471 1483 } 1472 1484 ··· 1486 1500 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1487 1501 int val = 0; 1488 1502 1489 - spin_lock_irq(&ensoniq->reg_lock); 1503 + guard(spinlock_irq)(&ensoniq->reg_lock); 1490 1504 if (ensoniq->ctrl & ES_1371_GPIO_OUT(4)) 1491 1505 val = 1; 1492 1506 ucontrol->value.integer.value[0] = val; 1493 - spin_unlock_irq(&ensoniq->reg_lock); 1494 1507 return 0; 1495 1508 } 1496 1509 ··· 1500 1515 int changed; 1501 1516 unsigned int ctrl; 1502 1517 1503 - spin_lock_irq(&ensoniq->reg_lock); 1518 + guard(spinlock_irq)(&ensoniq->reg_lock); 1504 1519 ctrl = ensoniq->ctrl; 1505 1520 if (ucontrol->value.integer.value[0]) 1506 1521 ensoniq->ctrl |= ES_1371_GPIO_OUT(4); /* switch line-in -> rear out */ ··· 1509 1524 changed = (ctrl != ensoniq->ctrl); 1510 1525 if (changed) 1511 1526 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1512 - spin_unlock_irq(&ensoniq->reg_lock); 1513 1527 return changed; 1514 1528 } 1515 1529 ··· 1644 1660 struct ensoniq *ensoniq = snd_kcontrol_chip(kcontrol); 1645 1661 int mask = kcontrol->private_value; 1646 1662 1647 - spin_lock_irq(&ensoniq->reg_lock); 1663 + guard(spinlock_irq)(&ensoniq->reg_lock); 1648 1664 ucontrol->value.integer.value[0] = ensoniq->ctrl & mask ? 1 : 0; 1649 - spin_unlock_irq(&ensoniq->reg_lock); 1650 1665 return 0; 1651 1666 } 1652 1667 ··· 1658 1675 int change; 1659 1676 1660 1677 nval = ucontrol->value.integer.value[0] ? mask : 0; 1661 - spin_lock_irq(&ensoniq->reg_lock); 1678 + guard(spinlock_irq)(&ensoniq->reg_lock); 1662 1679 change = (ensoniq->ctrl & mask) != nval; 1663 1680 ensoniq->ctrl &= ~mask; 1664 1681 ensoniq->ctrl |= nval; 1665 1682 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL)); 1666 - spin_unlock_irq(&ensoniq->reg_lock); 1667 1683 return change; 1668 1684 } 1669 1685 ··· 2056 2074 if (rmidi == NULL) 2057 2075 return; 2058 2076 /* do Rx at first */ 2059 - spin_lock(&ensoniq->reg_lock); 2060 - mask = ensoniq->uartm & ES_MODE_INPUT ? ES_RXRDY : 0; 2061 - while (mask) { 2062 - status = inb(ES_REG(ensoniq, UART_STATUS)); 2063 - if ((status & mask) == 0) 2064 - break; 2065 - byte = inb(ES_REG(ensoniq, UART_DATA)); 2066 - snd_rawmidi_receive(ensoniq->midi_input, &byte, 1); 2077 + scoped_guard(spinlock, &ensoniq->reg_lock) { 2078 + mask = ensoniq->uartm & ES_MODE_INPUT ? ES_RXRDY : 0; 2079 + while (mask) { 2080 + status = inb(ES_REG(ensoniq, UART_STATUS)); 2081 + if ((status & mask) == 0) 2082 + break; 2083 + byte = inb(ES_REG(ensoniq, UART_DATA)); 2084 + snd_rawmidi_receive(ensoniq->midi_input, &byte, 1); 2085 + } 2067 2086 } 2068 - spin_unlock(&ensoniq->reg_lock); 2069 2087 2070 2088 /* do Tx at second */ 2071 - spin_lock(&ensoniq->reg_lock); 2089 + guard(spinlock)(&ensoniq->reg_lock); 2072 2090 mask = ensoniq->uartm & ES_MODE_OUTPUT ? ES_TXRDY : 0; 2073 2091 while (mask) { 2074 2092 status = inb(ES_REG(ensoniq, UART_STATUS)); ··· 2082 2100 outb(byte, ES_REG(ensoniq, UART_DATA)); 2083 2101 } 2084 2102 } 2085 - spin_unlock(&ensoniq->reg_lock); 2086 2103 } 2087 2104 2088 2105 static int snd_ensoniq_midi_input_open(struct snd_rawmidi_substream *substream) 2089 2106 { 2090 2107 struct ensoniq *ensoniq = substream->rmidi->private_data; 2091 2108 2092 - spin_lock_irq(&ensoniq->reg_lock); 2109 + guard(spinlock_irq)(&ensoniq->reg_lock); 2093 2110 ensoniq->uartm |= ES_MODE_INPUT; 2094 2111 ensoniq->midi_input = substream; 2095 2112 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) { ··· 2096 2115 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2097 2116 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2098 2117 } 2099 - spin_unlock_irq(&ensoniq->reg_lock); 2100 2118 return 0; 2101 2119 } 2102 2120 ··· 2103 2123 { 2104 2124 struct ensoniq *ensoniq = substream->rmidi->private_data; 2105 2125 2106 - spin_lock_irq(&ensoniq->reg_lock); 2126 + guard(spinlock_irq)(&ensoniq->reg_lock); 2107 2127 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) { 2108 2128 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2109 2129 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL)); ··· 2112 2132 } 2113 2133 ensoniq->midi_input = NULL; 2114 2134 ensoniq->uartm &= ~ES_MODE_INPUT; 2115 - spin_unlock_irq(&ensoniq->reg_lock); 2116 2135 return 0; 2117 2136 } 2118 2137 ··· 2119 2140 { 2120 2141 struct ensoniq *ensoniq = substream->rmidi->private_data; 2121 2142 2122 - spin_lock_irq(&ensoniq->reg_lock); 2143 + guard(spinlock_irq)(&ensoniq->reg_lock); 2123 2144 ensoniq->uartm |= ES_MODE_OUTPUT; 2124 2145 ensoniq->midi_output = substream; 2125 2146 if (!(ensoniq->uartm & ES_MODE_INPUT)) { ··· 2127 2148 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2128 2149 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL)); 2129 2150 } 2130 - spin_unlock_irq(&ensoniq->reg_lock); 2131 2151 return 0; 2132 2152 } 2133 2153 ··· 2134 2156 { 2135 2157 struct ensoniq *ensoniq = substream->rmidi->private_data; 2136 2158 2137 - spin_lock_irq(&ensoniq->reg_lock); 2159 + guard(spinlock_irq)(&ensoniq->reg_lock); 2138 2160 if (!(ensoniq->uartm & ES_MODE_INPUT)) { 2139 2161 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL)); 2140 2162 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL)); ··· 2143 2165 } 2144 2166 ensoniq->midi_output = NULL; 2145 2167 ensoniq->uartm &= ~ES_MODE_OUTPUT; 2146 - spin_unlock_irq(&ensoniq->reg_lock); 2147 2168 return 0; 2148 2169 } 2149 2170 2150 2171 static void snd_ensoniq_midi_input_trigger(struct snd_rawmidi_substream *substream, int up) 2151 2172 { 2152 - unsigned long flags; 2153 2173 struct ensoniq *ensoniq = substream->rmidi->private_data; 2154 2174 int idx; 2155 2175 2156 - spin_lock_irqsave(&ensoniq->reg_lock, flags); 2176 + guard(spinlock_irqsave)(&ensoniq->reg_lock); 2157 2177 if (up) { 2158 2178 if ((ensoniq->uartc & ES_RXINTEN) == 0) { 2159 2179 /* empty input FIFO */ ··· 2166 2190 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2167 2191 } 2168 2192 } 2169 - spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 2170 2193 } 2171 2194 2172 2195 static void snd_ensoniq_midi_output_trigger(struct snd_rawmidi_substream *substream, int up) 2173 2196 { 2174 - unsigned long flags; 2175 2197 struct ensoniq *ensoniq = substream->rmidi->private_data; 2176 2198 unsigned char byte; 2177 2199 2178 - spin_lock_irqsave(&ensoniq->reg_lock, flags); 2200 + guard(spinlock_irqsave)(&ensoniq->reg_lock); 2179 2201 if (up) { 2180 2202 if (ES_TXINTENI(ensoniq->uartc) == 0) { 2181 2203 ensoniq->uartc |= ES_TXINTENO(1); ··· 2194 2220 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL)); 2195 2221 } 2196 2222 } 2197 - spin_unlock_irqrestore(&ensoniq->reg_lock, flags); 2198 2223 } 2199 2224 2200 2225 static const struct snd_rawmidi_ops snd_ensoniq_midi_output = ··· 2244 2271 if (!(status & ES_INTR)) 2245 2272 return IRQ_NONE; 2246 2273 2247 - spin_lock(&ensoniq->reg_lock); 2248 - sctrl = ensoniq->sctrl; 2249 - if (status & ES_DAC1) 2250 - sctrl &= ~ES_P1_INT_EN; 2251 - if (status & ES_DAC2) 2252 - sctrl &= ~ES_P2_INT_EN; 2253 - if (status & ES_ADC) 2254 - sctrl &= ~ES_R1_INT_EN; 2255 - outl(sctrl, ES_REG(ensoniq, SERIAL)); 2256 - outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 2257 - spin_unlock(&ensoniq->reg_lock); 2274 + scoped_guard(spinlock, &ensoniq->reg_lock) { 2275 + sctrl = ensoniq->sctrl; 2276 + if (status & ES_DAC1) 2277 + sctrl &= ~ES_P1_INT_EN; 2278 + if (status & ES_DAC2) 2279 + sctrl &= ~ES_P2_INT_EN; 2280 + if (status & ES_ADC) 2281 + sctrl &= ~ES_R1_INT_EN; 2282 + outl(sctrl, ES_REG(ensoniq, SERIAL)); 2283 + outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL)); 2284 + } 2258 2285 2259 2286 if (status & ES_UART) 2260 2287 snd_ensoniq_midi_interrupt(ensoniq);