tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

MIPS: BMIPS: Add support NAND device nodes

Adds NAND device nodes to BCM7xxx MIPS based SoCs.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14003/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Jaedon Shin and committed by
Ralf Baechle cfc8be04 b2420e27

+195
+20
arch/mips/boot/dts/brcm/bcm7346.dtsi
··· 372 372 status = "disabled"; 373 373 }; 374 374 375 + hif_l2_intc: interrupt-controller@411000 { 376 + compatible = "brcm,l2-intc"; 377 + reg = <0x411000 0x30>; 378 + interrupt-controller; 379 + #interrupt-cells = <1>; 380 + interrupt-parent = <&periph_intc>; 381 + interrupts = <30>; 382 + }; 383 + 384 + nand: nand@412800 { 385 + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; 386 + #address-cells = <1>; 387 + #size-cells = <0>; 388 + reg-names = "nand"; 389 + reg = <0x412800 0x400>; 390 + interrupt-parent = <&hif_l2_intc>; 391 + interrupts = <24>; 392 + status = "disabled"; 393 + }; 394 + 375 395 sata: sata@181000 { 376 396 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; 377 397 reg-names = "ahci", "top-ctrl";
+20
arch/mips/boot/dts/brcm/bcm7358.dtsi
··· 298 298 interrupts = <66>; 299 299 status = "disabled"; 300 300 }; 301 + 302 + hif_l2_intc: interrupt-controller@411000 { 303 + compatible = "brcm,l2-intc"; 304 + reg = <0x411000 0x30>; 305 + interrupt-controller; 306 + #interrupt-cells = <1>; 307 + interrupt-parent = <&periph_intc>; 308 + interrupts = <30>; 309 + }; 310 + 311 + nand: nand@412800 { 312 + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; 313 + #address-cells = <1>; 314 + #size-cells = <0>; 315 + reg-names = "nand"; 316 + reg = <0x412800 0x400>; 317 + interrupt-parent = <&hif_l2_intc>; 318 + interrupts = <24>; 319 + status = "disabled"; 320 + }; 301 321 }; 302 322 };
+20
arch/mips/boot/dts/brcm/bcm7360.dtsi
··· 291 291 status = "disabled"; 292 292 }; 293 293 294 + hif_l2_intc: interrupt-controller@411000 { 295 + compatible = "brcm,l2-intc"; 296 + reg = <0x411000 0x30>; 297 + interrupt-controller; 298 + #interrupt-cells = <1>; 299 + interrupt-parent = <&periph_intc>; 300 + interrupts = <30>; 301 + }; 302 + 303 + nand: nand@412800 { 304 + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; 305 + #address-cells = <1>; 306 + #size-cells = <0>; 307 + reg-names = "nand"; 308 + reg = <0x412800 0x400>; 309 + interrupt-parent = <&hif_l2_intc>; 310 + interrupts = <24>; 311 + status = "disabled"; 312 + }; 313 + 294 314 sata: sata@181000 { 295 315 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; 296 316 reg-names = "ahci", "top-ctrl";
+20
arch/mips/boot/dts/brcm/bcm7362.dtsi
··· 287 287 status = "disabled"; 288 288 }; 289 289 290 + hif_l2_intc: interrupt-controller@411000 { 291 + compatible = "brcm,l2-intc"; 292 + reg = <0x411000 0x30>; 293 + interrupt-controller; 294 + #interrupt-cells = <1>; 295 + interrupt-parent = <&periph_intc>; 296 + interrupts = <30>; 297 + }; 298 + 299 + nand: nand@412800 { 300 + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; 301 + #address-cells = <1>; 302 + #size-cells = <0>; 303 + reg-names = "nand"; 304 + reg = <0x412800 0x400>; 305 + interrupt-parent = <&hif_l2_intc>; 306 + interrupts = <24>; 307 + status = "disabled"; 308 + }; 309 + 290 310 sata: sata@181000 { 291 311 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; 292 312 reg-names = "ahci", "top-ctrl";
+20
arch/mips/boot/dts/brcm/bcm7425.dtsi
··· 371 371 status = "disabled"; 372 372 }; 373 373 374 + hif_l2_intc: interrupt-controller@41a000 { 375 + compatible = "brcm,l2-intc"; 376 + reg = <0x41a000 0x30>; 377 + interrupt-controller; 378 + #interrupt-cells = <1>; 379 + interrupt-parent = <&periph_intc>; 380 + interrupts = <24>; 381 + }; 382 + 383 + nand: nand@41b800 { 384 + compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand"; 385 + #address-cells = <1>; 386 + #size-cells = <0>; 387 + reg-names = "nand"; 388 + reg = <0x41b800 0x400>; 389 + interrupt-parent = <&hif_l2_intc>; 390 + interrupts = <24>; 391 + status = "disabled"; 392 + }; 393 + 374 394 sata: sata@181000 { 375 395 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; 376 396 reg-names = "ahci", "top-ctrl";
+20
arch/mips/boot/dts/brcm/bcm7435.dtsi
··· 386 386 status = "disabled"; 387 387 }; 388 388 389 + hif_l2_intc: interrupt-controller@41b000 { 390 + compatible = "brcm,l2-intc"; 391 + reg = <0x41b000 0x30>; 392 + interrupt-controller; 393 + #interrupt-cells = <1>; 394 + interrupt-parent = <&periph_intc>; 395 + interrupts = <24>; 396 + }; 397 + 398 + nand: nand@41c800 { 399 + compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand"; 400 + #address-cells = <1>; 401 + #size-cells = <0>; 402 + reg-names = "nand", "flash-dma"; 403 + reg = <0x41c800 0x600>, <0x41d000 0x100>; 404 + interrupt-parent = <&hif_l2_intc>; 405 + interrupts = <24>, <4>; 406 + status = "disabled"; 407 + }; 408 + 389 409 sata: sata@181000 { 390 410 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; 391 411 reg-names = "ahci", "top-ctrl";
+5
arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
··· 1 1 /dts-v1/; 2 2 3 3 /include/ "bcm7346.dtsi" 4 + /include/ "bcm97xxx-nand-cs1-bch24.dtsi" 4 5 5 6 / { 6 7 compatible = "brcm,bcm97346dbsmb", "brcm,bcm7346"; ··· 91 90 }; 92 91 93 92 &ohci3 { 93 + status = "okay"; 94 + }; 95 + 96 + &nand { 94 97 status = "okay"; 95 98 }; 96 99
+5
arch/mips/boot/dts/brcm/bcm97358svmb.dts
··· 1 1 /dts-v1/; 2 2 3 3 /include/ "bcm7358.dtsi" 4 + /include/ "bcm97xxx-nand-cs1-bch4.dtsi" 4 5 5 6 / { 6 7 compatible = "brcm,bcm97358svmb", "brcm,bcm7358"; ··· 63 62 }; 64 63 65 64 &ohci0 { 65 + status = "okay"; 66 + }; 67 + 68 + &nand { 66 69 status = "okay"; 67 70 };
+5
arch/mips/boot/dts/brcm/bcm97362svmb.dts
··· 1 1 /dts-v1/; 2 2 3 3 /include/ "bcm7362.dtsi" 4 + /include/ "bcm97xxx-nand-cs1-bch4.dtsi" 4 5 5 6 / { 6 7 compatible = "brcm,bcm97362svmb", "brcm,bcm7362"; ··· 55 54 }; 56 55 57 56 &ohci0 { 57 + status = "okay"; 58 + }; 59 + 60 + &nand { 58 61 status = "okay"; 59 62 }; 60 63
+5
arch/mips/boot/dts/brcm/bcm97425svmb.dts
··· 1 1 /dts-v1/; 2 2 3 3 /include/ "bcm7425.dtsi" 4 + /include/ "bcm97xxx-nand-cs1-bch24.dtsi" 4 5 5 6 / { 6 7 compatible = "brcm,bcm97425svmb", "brcm,bcm7425"; ··· 93 92 }; 94 93 95 94 &ohci3 { 95 + status = "okay"; 96 + }; 97 + 98 + &nand { 96 99 status = "okay"; 97 100 }; 98 101
+5
arch/mips/boot/dts/brcm/bcm97435svmb.dts
··· 1 1 /dts-v1/; 2 2 3 3 /include/ "bcm7435.dtsi" 4 + /include/ "bcm97xxx-nand-cs1-bch24.dtsi" 4 5 5 6 / { 6 7 compatible = "brcm,bcm97435svmb", "brcm,bcm7435"; ··· 93 92 }; 94 93 95 94 &ohci3 { 95 + status = "okay"; 96 + }; 97 + 98 + &nand { 96 99 status = "okay"; 97 100 }; 98 101
+25
arch/mips/boot/dts/brcm/bcm97xxx-nand-cs1-bch24.dtsi
··· 1 + &nand { 2 + nandcs@1 { 3 + compatible = "brcm,nandcs"; 4 + reg = <1>; 5 + nand-on-flash-bbt; 6 + 7 + nand-ecc-strength = <24>; 8 + nand-ecc-step-size = <1024>; 9 + brcm,nand-oob-sector-size = <27>; 10 + 11 + partitions { 12 + compatible = "fixed-partitions"; 13 + #address-cells = <1>; 14 + #size-cells = <1>; 15 + 16 + flash1.rootfs@0 { 17 + reg = <0x0 0x10000000>; 18 + }; 19 + 20 + flash1.kernel@10000000 { 21 + reg = <0x10000000 0x400000>; 22 + }; 23 + }; 24 + }; 25 + };
+25
arch/mips/boot/dts/brcm/bcm97xxx-nand-cs1-bch4.dtsi
··· 1 + &nand { 2 + nandcs@1 { 3 + compatible = "brcm,nandcs"; 4 + reg = <1>; 5 + nand-on-flash-bbt; 6 + 7 + nand-ecc-strength = <4>; 8 + nand-ecc-step-size = <512>; 9 + brcm,nand-oob-sector-size = <16>; 10 + 11 + partitions { 12 + compatible = "fixed-partitions"; 13 + #address-cells = <1>; 14 + #size-cells = <1>; 15 + 16 + flash1.rootfs@0 { 17 + reg = <0x0 0x10000000>; 18 + }; 19 + 20 + flash1.kernel@10000000 { 21 + reg = <0x10000000 0x400000>; 22 + }; 23 + }; 24 + }; 25 + };