Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'depends/rmk/memory_h' into next/cleanup2

There are lots of conflicts between the omap and exynos cleanups
and the memory.h remove series.

Conflicts:
arch/arm/mach-exynos4/mach-smdkc210.c
arch/arm/mach-exynos4/mach-smdkv310.c
arch/arm/mach-imx/mach-cpuimx27.c
arch/arm/mach-omap1/board-ams-delta.c
arch/arm/mach-omap1/board-generic.c
arch/arm/mach-omap1/board-h2.c
arch/arm/mach-omap1/board-h3.c
arch/arm/mach-omap1/board-nokia770.c
arch/arm/mach-omap1/board-osk.c
arch/arm/mach-omap1/board-palmte.c
arch/arm/mach-omap1/board-palmtt.c
arch/arm/mach-omap1/board-palmz71.c
arch/arm/mach-omap1/board-sx1.c
arch/arm/mach-omap1/board-voiceblue.c
arch/arm/mach-omap1/io.c
arch/arm/mach-omap2/board-generic.c
arch/arm/mach-omap2/io.c
arch/arm/plat-omap/io.c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+827 -1662
+36 -10
arch/arm/Kconfig
··· 195 195 The base address of exception vectors. 196 196 197 197 config ARM_PATCH_PHYS_VIRT 198 - bool "Patch physical to virtual translations at runtime" 198 + bool "Patch physical to virtual translations at runtime" if EMBEDDED 199 + default y 199 200 depends on !XIP_KERNEL && MMU 200 201 depends on !ARCH_REALVIEW || !SPARSEMEM 201 202 help ··· 205 204 kernel in system memory. 206 205 207 206 This can only be used with non-XIP MMU kernels where the base 208 - of physical memory is at a 16MB boundary, or theoretically 64K 209 - for the MSM machine class. 207 + of physical memory is at a 16MB boundary. 210 208 211 - config ARM_PATCH_PHYS_VIRT_16BIT 212 - def_bool y 213 - depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM 209 + Only disable this option if you know that you do not require 210 + this feature (eg, building a kernel for a single machine) and 211 + you need to shrink the kernel to the minimal size. 212 + 213 + config NEED_MACH_MEMORY_H 214 + bool 214 215 help 215 - This option extends the physical to virtual translation patching 216 - to allow physical memory down to a theoretical minimum of 64K 217 - boundaries. 216 + Select this when mach/memory.h is required to provide special 217 + definitions for this platform. The need for mach/memory.h should 218 + be avoided when possible. 219 + 220 + config PHYS_OFFSET 221 + hex "Physical address of main memory" 222 + depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H 223 + help 224 + Please provide the physical address corresponding to the 225 + location of main memory in your system. 218 226 219 227 source "init/Kconfig" 220 228 ··· 256 246 select GENERIC_CLOCKEVENTS 257 247 select PLAT_VERSATILE 258 248 select PLAT_VERSATILE_FPGA_IRQ 249 + select NEED_MACH_MEMORY_H 259 250 help 260 251 Support for ARM's Integrator platform. 261 252 ··· 272 261 select PLAT_VERSATILE_CLCD 273 262 select ARM_TIMER_SP804 274 263 select GPIO_PL061 if GPIOLIB 264 + select NEED_MACH_MEMORY_H 275 265 help 276 266 This enables support for ARM Ltd RealView boards. 277 267 ··· 313 301 select ARCH_REQUIRE_GPIOLIB 314 302 select HAVE_CLK 315 303 select CLKDEV_LOOKUP 316 - select ARM_PATCH_PHYS_VIRT if MMU 317 304 help 318 305 This enables support for systems based on the Atmel AT91RM9200, 319 306 AT91SAM9 and AT91CAP9 processors. ··· 333 322 bool "Cirrus Logic CLPS711x/EP721x-based" 334 323 select CPU_ARM720T 335 324 select ARCH_USES_GETTIMEOFFSET 325 + select NEED_MACH_MEMORY_H 336 326 help 337 327 Support for Cirrus Logic 711x/721x based boards. 338 328 ··· 374 362 select ISA 375 363 select NO_IOPORT 376 364 select ARCH_USES_GETTIMEOFFSET 365 + select NEED_MACH_MEMORY_H 377 366 help 378 367 This is an evaluation board for the StrongARM processor available 379 368 from Digital. It has limited hardware on-board, including an ··· 390 377 select ARCH_REQUIRE_GPIOLIB 391 378 select ARCH_HAS_HOLES_MEMORYMODEL 392 379 select ARCH_USES_GETTIMEOFFSET 380 + select NEED_MEMORY_H 393 381 help 394 382 This enables support for the Cirrus EP93xx series of CPUs. 395 383 ··· 399 385 select CPU_SA110 400 386 select FOOTBRIDGE 401 387 select GENERIC_CLOCKEVENTS 388 + select NEED_MACH_MEMORY_H 402 389 help 403 390 Support for systems based on the DC21285 companion chip 404 391 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. ··· 449 434 select PCI 450 435 select ARCH_SUPPORTS_MSI 451 436 select VMSPLIT_1G 437 + select NEED_MACH_MEMORY_H 452 438 help 453 439 Support for Intel's IOP13XX (XScale) family of processors. 454 440 ··· 480 464 select CPU_XSC3 481 465 select PCI 482 466 select ARCH_USES_GETTIMEOFFSET 467 + select NEED_MACH_MEMORY_H 483 468 help 484 469 Support for Intel's IXP23xx (XScale) family of processors. 485 470 ··· 490 473 select CPU_XSCALE 491 474 select PCI 492 475 select ARCH_USES_GETTIMEOFFSET 476 + select NEED_MACH_MEMORY_H 493 477 help 494 478 Support for Intel's IXP2400/2800 (XScale) family of processors. 495 479 ··· 584 566 select CPU_ARM922T 585 567 select ARCH_REQUIRE_GPIOLIB 586 568 select ARCH_USES_GETTIMEOFFSET 569 + select NEED_MACH_MEMORY_H 587 570 help 588 571 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 589 572 System-on-Chip devices. ··· 676 657 select SPARSE_IRQ 677 658 select MULTI_IRQ_HANDLER 678 659 select PM_GENERIC_DOMAINS if PM 660 + select NEED_MACH_MEMORY_H 679 661 help 680 662 Support for Renesas's SH-Mobile and R-Mobile ARM platforms. 681 663 ··· 691 671 select NO_IOPORT 692 672 select ARCH_SPARSEMEM_ENABLE 693 673 select ARCH_USES_GETTIMEOFFSET 674 + select NEED_MACH_MEMORY_H 694 675 help 695 676 On the Acorn Risc-PC, Linux can support the internal IDE disk and 696 677 CD-ROM interface, serial and parallel port, and the floppy drive. ··· 710 689 select HAVE_SCHED_CLOCK 711 690 select TICK_ONESHOT 712 691 select ARCH_REQUIRE_GPIOLIB 692 + select NEED_MACH_MEMORY_H 713 693 help 714 694 Support for StrongARM 11x0 based boards. 715 695 ··· 800 778 select HAVE_S3C2410_I2C if I2C 801 779 select HAVE_S3C_RTC if RTC_CLASS 802 780 select HAVE_S3C2410_WATCHDOG if WATCHDOG 781 + select NEED_MACH_MEMORY_H 803 782 help 804 783 Samsung S5PV210/S5PC110 series based systems 805 784 ··· 817 794 select HAVE_S3C_RTC if RTC_CLASS 818 795 select HAVE_S3C2410_I2C if I2C 819 796 select HAVE_S3C2410_WATCHDOG if WATCHDOG 797 + select NEED_MACH_MEMORY_H 820 798 help 821 799 Samsung EXYNOS4 series based systems 822 800 ··· 829 805 select ZONE_DMA 830 806 select PCI 831 807 select ARCH_USES_GETTIMEOFFSET 808 + select NEED_MACH_MEMORY_H 832 809 help 833 810 Support for the StrongARM based Digital DNARD machine, also known 834 811 as "Shark" (<http://www.shark-linux.de/shark.html>). ··· 857 832 select CLKDEV_LOOKUP 858 833 select HAVE_MACH_CLKDEV 859 834 select GENERIC_GPIO 835 + select NEED_MACH_MEMORY_H 860 836 help 861 837 Support for ST-Ericsson U300 series mobile platforms. 862 838
+3
arch/arm/Makefile
··· 128 128 ifeq ($(CONFIG_ARCH_SA1100),y) 129 129 textofs-$(CONFIG_SA1111) := 0x00208000 130 130 endif 131 + textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 132 + textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 133 + textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 131 134 132 135 # Machine directory name. This list is sorted alphanumerically 133 136 # by CONFIG_* macro name.
+7
arch/arm/include/asm/dma-mapping.h
··· 205 205 int dma_mmap_writecombine(struct device *, struct vm_area_struct *, 206 206 void *, dma_addr_t, size_t); 207 207 208 + /* 209 + * This can be called during boot to increase the size of the consistent 210 + * DMA region above it's default value of 2MB. It must be called before the 211 + * memory allocator is initialised, i.e. before any core_initcall. 212 + */ 213 + extern void __init init_consistent_dma_size(unsigned long size); 214 + 208 215 209 216 #ifdef CONFIG_DMABOUNCE 210 217 /*
+1 -1
arch/arm/include/asm/mach/arch.h
··· 17 17 struct machine_desc { 18 18 unsigned int nr; /* architecture number */ 19 19 const char *name; /* architecture name */ 20 - unsigned long boot_params; /* tagged list */ 20 + unsigned long atag_offset; /* tagged list (relative) */ 21 21 const char **dt_compat; /* array of device tree 22 22 * 'compatible' strings */ 23 23
+8 -17
arch/arm/include/asm/memory.h
··· 16 16 #include <linux/compiler.h> 17 17 #include <linux/const.h> 18 18 #include <linux/types.h> 19 - #include <mach/memory.h> 20 19 #include <asm/sizes.h> 20 + 21 + #ifdef CONFIG_NEED_MACH_MEMORY_H 22 + #include <mach/memory.h> 23 + #endif 21 24 22 25 /* 23 26 * Allow for constants defined here to be used from assembly code ··· 80 77 */ 81 78 #define IOREMAP_MAX_ORDER 24 82 79 83 - /* 84 - * Size of DMA-consistent memory region. Must be multiple of 2M, 85 - * between 2MB and 14MB inclusive. 86 - */ 87 - #ifndef CONSISTENT_DMA_SIZE 88 - #define CONSISTENT_DMA_SIZE SZ_2M 89 - #endif 90 - 91 80 #define CONSISTENT_END (0xffe00000UL) 92 - #define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE) 93 81 94 82 #else /* CONFIG_MMU */ 95 83 ··· 154 160 * so that all we need to do is modify the 8-bit constant field. 155 161 */ 156 162 #define __PV_BITS_31_24 0x81000000 157 - #define __PV_BITS_23_16 0x00810000 158 163 159 164 extern unsigned long __pv_phys_offset; 160 165 #define PHYS_OFFSET __pv_phys_offset ··· 171 178 { 172 179 unsigned long t; 173 180 __pv_stub(x, t, "add", __PV_BITS_31_24); 174 - #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 175 - __pv_stub(t, t, "add", __PV_BITS_23_16); 176 - #endif 177 181 return t; 178 182 } 179 183 ··· 178 188 { 179 189 unsigned long t; 180 190 __pv_stub(x, t, "sub", __PV_BITS_31_24); 181 - #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 182 - __pv_stub(t, t, "sub", __PV_BITS_23_16); 183 - #endif 184 191 return t; 185 192 } 186 193 #else ··· 187 200 #endif 188 201 189 202 #ifndef PHYS_OFFSET 203 + #ifdef PLAT_PHYS_OFFSET 190 204 #define PHYS_OFFSET PLAT_PHYS_OFFSET 205 + #else 206 + #define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) 207 + #endif 191 208 #endif 192 209 193 210 /*
-4
arch/arm/include/asm/module.h
··· 31 31 32 32 /* Add __virt_to_phys patching state as well */ 33 33 #ifdef CONFIG_ARM_PATCH_PHYS_VIRT 34 - #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 35 - #define MODULE_ARCH_VERMAGIC_P2V "p2v16 " 36 - #else 37 34 #define MODULE_ARCH_VERMAGIC_P2V "p2v8 " 38 - #endif 39 35 #else 40 36 #define MODULE_ARCH_VERMAGIC_P2V "" 41 37 #endif
+2 -2
arch/arm/kernel/debug.S
··· 22 22 #if defined(CONFIG_DEBUG_ICEDCC) 23 23 @@ debug using ARM EmbeddedICE DCC channel 24 24 25 - .macro addruart, rp, rv 25 + .macro addruart, rp, rv, tmp 26 26 .endm 27 27 28 28 #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) ··· 106 106 107 107 #ifdef CONFIG_MMU 108 108 .macro addruart_current, rx, tmp1, tmp2 109 - addruart \tmp1, \tmp2 109 + addruart \tmp1, \tmp2, \rx 110 110 mrc p15, 0, \rx, c1, c0 111 111 tst \rx, #1 112 112 moveq \rx, \tmp1
+15 -50
arch/arm/kernel/head.S
··· 95 95 sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) 96 96 add r8, r8, r4 @ PHYS_OFFSET 97 97 #else 98 - ldr r8, =PLAT_PHYS_OFFSET 98 + ldr r8, =PHYS_OFFSET @ always constant in this case 99 99 #endif 100 100 101 101 /* ··· 234 234 * This allows debug messages to be output 235 235 * via a serial console before paging_init. 236 236 */ 237 - addruart r7, r3 237 + addruart r7, r3, r0 238 238 239 239 mov r3, r3, lsr #20 240 240 mov r3, r3, lsl #2 ··· 488 488 add r5, r5, r3 @ adjust table end address 489 489 add r7, r7, r3 @ adjust __pv_phys_offset address 490 490 str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset 491 - #ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 492 491 mov r6, r3, lsr #24 @ constant for add/sub instructions 493 492 teq r3, r6, lsl #24 @ must be 16MiB aligned 494 - #else 495 - mov r6, r3, lsr #16 @ constant for add/sub instructions 496 - teq r3, r6, lsl #16 @ must be 64kiB aligned 497 - #endif 498 493 THUMB( it ne @ cross section branch ) 499 494 bne __error 500 495 str r6, [r7, #4] @ save to __pv_offset ··· 505 510 .text 506 511 __fixup_a_pv_table: 507 512 #ifdef CONFIG_THUMB2_KERNEL 508 - #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 509 - lsls r0, r6, #24 510 - lsr r6, #8 511 - beq 1f 512 - clz r7, r0 513 - lsr r0, #24 514 - lsl r0, r7 515 - bic r0, 0x0080 516 - lsrs r7, #1 517 - orrcs r0, #0x0080 518 - orr r0, r0, r7, lsl #12 519 - #endif 520 - 1: lsls r6, #24 521 - beq 4f 513 + lsls r6, #24 514 + beq 2f 522 515 clz r7, r6 523 516 lsr r6, #24 524 517 lsl r6, r7 ··· 515 532 orrcs r6, #0x0080 516 533 orr r6, r6, r7, lsl #12 517 534 orr r6, #0x4000 518 - b 4f 519 - 2: @ at this point the C flag is always clear 520 - add r7, r3 521 - #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 522 - ldrh ip, [r7] 523 - tst ip, 0x0400 @ the i bit tells us LS or MS byte 524 - beq 3f 525 - cmp r0, #0 @ set C flag, and ... 526 - biceq ip, 0x0400 @ immediate zero value has a special encoding 527 - streqh ip, [r7] @ that requires the i bit cleared 528 - #endif 529 - 3: ldrh ip, [r7, #2] 535 + b 2f 536 + 1: add r7, r3 537 + ldrh ip, [r7, #2] 530 538 and ip, 0x8f00 531 - orrcc ip, r6 @ mask in offset bits 31-24 532 - orrcs ip, r0 @ mask in offset bits 23-16 539 + orr ip, r6 @ mask in offset bits 31-24 533 540 strh ip, [r7, #2] 534 - 4: cmp r4, r5 541 + 2: cmp r4, r5 535 542 ldrcc r7, [r4], #4 @ use branch for delay slot 536 - bcc 2b 543 + bcc 1b 537 544 bx lr 538 545 #else 539 - #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 540 - and r0, r6, #255 @ offset bits 23-16 541 - mov r6, r6, lsr #8 @ offset bits 31-24 542 - #else 543 - mov r0, #0 @ just in case... 544 - #endif 545 - b 3f 546 - 2: ldr ip, [r7, r3] 546 + b 2f 547 + 1: ldr ip, [r7, r3] 547 548 bic ip, ip, #0x000000ff 548 - tst ip, #0x400 @ rotate shift tells us LS or MS byte 549 - orrne ip, ip, r6 @ mask in offset bits 31-24 550 - orreq ip, ip, r0 @ mask in offset bits 23-16 549 + orr ip, ip, r6 @ mask in offset bits 31-24 551 550 str ip, [r7, r3] 552 - 3: cmp r4, r5 551 + 2: cmp r4, r5 553 552 ldrcc r7, [r4], #4 @ use branch for delay slot 554 - bcc 2b 553 + bcc 1b 555 554 mov pc, lr 556 555 #endif 557 556 ENDPROC(__fixup_a_pv_table)
+2 -19
arch/arm/kernel/setup.c
··· 820 820 821 821 if (__atags_pointer) 822 822 tags = phys_to_virt(__atags_pointer); 823 - else if (mdesc->boot_params) { 824 - #ifdef CONFIG_MMU 825 - /* 826 - * We still are executing with a minimal MMU mapping created 827 - * with the presumption that the machine default for this 828 - * is located in the first MB of RAM. Anything else will 829 - * fault and silently hang the kernel at this point. 830 - */ 831 - if (mdesc->boot_params < PHYS_OFFSET || 832 - mdesc->boot_params >= PHYS_OFFSET + SZ_1M) { 833 - printk(KERN_WARNING 834 - "Default boot params at physical 0x%08lx out of reach\n", 835 - mdesc->boot_params); 836 - } else 837 - #endif 838 - { 839 - tags = phys_to_virt(mdesc->boot_params); 840 - } 841 - } 823 + else if (mdesc->atag_offset) 824 + tags = (void *)(PAGE_OFFSET + mdesc->atag_offset); 842 825 843 826 #if defined(CONFIG_DEPRECATED_PARAM_STRUCT) 844 827 /*
+2
arch/arm/mach-at91/at91sam9g45.c
··· 12 12 13 13 #include <linux/module.h> 14 14 #include <linux/pm.h> 15 + #include <linux/dma-mapping.h> 15 16 16 17 #include <asm/irq.h> 17 18 #include <asm/mach/arch.h> ··· 320 319 static void __init at91sam9g45_map_io(void) 321 320 { 322 321 at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE); 322 + init_consistent_dma_size(SZ_4M); 323 323 } 324 324 325 325 static void __init at91sam9g45_initialize(void)
-2
arch/arm/mach-at91/include/mach/at91sam9g45.h
··· 128 128 #define AT91SAM9G45_EHCI_BASE 0x00800000 /* USB Host controller (EHCI) */ 129 129 #define AT91SAM9G45_VDEC_BASE 0x00900000 /* Video Decoder Controller */ 130 130 131 - #define CONSISTENT_DMA_SIZE SZ_4M 132 - 133 131 /* 134 132 * DMA peripheral identifiers 135 133 * for hardware handshaking interface
+1 -1
arch/arm/mach-at91/include/mach/debug-macro.S
··· 14 14 #include <mach/hardware.h> 15 15 #include <mach/at91_dbgu.h> 16 16 17 - .macro addruart, rp, rv 17 + .macro addruart, rp, rv, tmp 18 18 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) 19 19 ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) 20 20 .endm
+1 -2
arch/arm/mach-bcmring/include/mach/hardware.h
··· 22 22 #define __ASM_ARCH_HARDWARE_H 23 23 24 24 #include <asm/sizes.h> 25 - #include <mach/memory.h> 26 25 #include <cfg_global.h> 27 26 #include <mach/csp/mm_io.h> 28 27 ··· 30 31 * *_SIZE is the size of the region 31 32 * *_BASE is the virtual address 32 33 */ 33 - #define RAM_START PLAT_PHYS_OFFSET 34 + #define RAM_START PHYS_OFFSET 34 35 35 36 #define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED) 36 37 #define RAM_BASE PAGE_OFFSET
-33
arch/arm/mach-bcmring/include/mach/memory.h
··· 1 - /***************************************************************************** 2 - * Copyright 2005 - 2008 Broadcom Corporation. All rights reserved. 3 - * 4 - * Unless you and Broadcom execute a separate written software license 5 - * agreement governing use of this software, this software is licensed to you 6 - * under the terms of the GNU General Public License version 2, available at 7 - * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). 8 - * 9 - * Notwithstanding the above, under no circumstances may you combine this 10 - * software in any way with any other Broadcom software provided under a 11 - * license other than the GPL, without Broadcom's express prior written 12 - * consent. 13 - *****************************************************************************/ 14 - 15 - #ifndef __ASM_ARCH_MEMORY_H 16 - #define __ASM_ARCH_MEMORY_H 17 - 18 - #include <cfg_global.h> 19 - 20 - /* 21 - * Physical vs virtual RAM address space conversion. These are 22 - * private definitions which should NOT be used outside memory.h 23 - * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. 24 - */ 25 - 26 - #define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE 27 - 28 - /* 29 - * Maximum DMA memory allowed is 14M 30 - */ 31 - #define CONSISTENT_DMA_SIZE (SZ_16M - SZ_2M) 32 - 33 - #endif
+3
arch/arm/mach-bcmring/mm.c
··· 13 13 *****************************************************************************/ 14 14 15 15 #include <linux/platform_device.h> 16 + #include <linux/dma-mapping.h> 16 17 #include <asm/mach/map.h> 17 18 18 19 #include <mach/hardware.h> ··· 54 53 { 55 54 56 55 iotable_init(bcmring_io_desc, ARRAY_SIZE(bcmring_io_desc)); 56 + /* Maximum DMA memory allowed is 14M */ 57 + init_consistent_dma_size(14 << 20); 57 58 }
+1 -1
arch/arm/mach-clps711x/autcpu12.c
··· 64 64 65 65 MACHINE_START(AUTCPU12, "autronix autcpu12") 66 66 /* Maintainer: Thomas Gleixner */ 67 - .boot_params = 0xc0020000, 67 + .atag_offset = 0x20000, 68 68 .map_io = autcpu12_map_io, 69 69 .init_irq = clps711x_init_irq, 70 70 .timer = &clps711x_timer,
+1 -1
arch/arm/mach-clps711x/cdb89712.c
··· 55 55 56 56 MACHINE_START(CDB89712, "Cirrus-CDB89712") 57 57 /* Maintainer: Ray Lehtiniemi */ 58 - .boot_params = 0xc0000100, 58 + .atag_offset = 0x100, 59 59 .map_io = cdb89712_map_io, 60 60 .init_irq = clps711x_init_irq, 61 61 .timer = &clps711x_timer,
+1 -1
arch/arm/mach-clps711x/ceiva.c
··· 56 56 57 57 MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame") 58 58 /* Maintainer: Rob Scott */ 59 - .boot_params = 0xc0000100, 59 + .atag_offset = 0x100, 60 60 .map_io = ceiva_map_io, 61 61 .init_irq = clps711x_init_irq, 62 62 .timer = &clps711x_timer,
+1 -1
arch/arm/mach-clps711x/clep7312.c
··· 37 37 38 38 MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312") 39 39 /* Maintainer: Nobody */ 40 - .boot_params = 0xc0000100, 40 + .atag_offset = 0x0100, 41 41 .fixup = fixup_clep7312, 42 42 .map_io = clps711x_map_io, 43 43 .init_irq = clps711x_init_irq,
+1 -1
arch/arm/mach-clps711x/edb7211-arch.c
··· 57 57 58 58 MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)") 59 59 /* Maintainer: Jon McClintock */ 60 - .boot_params = 0xc0020100, /* 0xc0000000 - 0xc001ffff can be video RAM */ 60 + .atag_offset = 0x20100, /* 0xc0000000 - 0xc001ffff can be video RAM */ 61 61 .fixup = fixup_edb7211, 62 62 .map_io = edb7211_map_io, 63 63 .reserve = edb7211_reserve,
-1
arch/arm/mach-clps711x/fortunet.c
··· 75 75 76 76 MACHINE_START(FORTUNET, "ARM-FortuNet") 77 77 /* Maintainer: FortuNet Inc. */ 78 - .boot_params = 0x00000000, 79 78 .fixup = fortunet_fixup, 80 79 .map_io = clps711x_map_io, 81 80 .init_irq = clps711x_init_irq,
+1 -1
arch/arm/mach-clps711x/include/mach/debug-macro.S
··· 14 14 #include <mach/hardware.h> 15 15 #include <asm/hardware/clps7111.h> 16 16 17 - .macro addruart, rp, rv 17 + .macro addruart, rp, rv, tmp 18 18 #ifndef CONFIG_DEBUG_CLPS711X_UART2 19 19 mov \rp, #0x0000 @ UART1 20 20 #else
+1 -1
arch/arm/mach-clps711x/p720t.c
··· 89 89 90 90 MACHINE_START(P720T, "ARM-Prospector720T") 91 91 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 92 - .boot_params = 0xc0000100, 92 + .atag_offset = 0x100, 93 93 .fixup = fixup_p720t, 94 94 .map_io = p720t_map_io, 95 95 .init_irq = clps711x_init_irq,
+1 -1
arch/arm/mach-cns3xxx/cns3420vb.c
··· 197 197 } 198 198 199 199 MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") 200 - .boot_params = 0x00000100, 200 + .atag_offset = 0x100, 201 201 .map_io = cns3420_map_io, 202 202 .init_irq = cns3xxx_init_irq, 203 203 .timer = &cns3xxx_timer,
+1 -1
arch/arm/mach-cns3xxx/include/mach/debug-macro.S
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 - .macro addruart,rp,rv 13 + .macro addruart,rp,rv,tmp 14 14 mov \rp, #0x00009000 15 15 orr \rv, \rp, #0xf0000000 @ virtual base 16 16 orr \rp, \rp, #0x10000000
-26
arch/arm/mach-cns3xxx/include/mach/memory.h
··· 1 - /* 2 - * Copyright 2003 ARM Limited 3 - * Copyright 2008 Cavium Networks 4 - * 5 - * This file is free software; you can redistribute it and/or modify 6 - * it under the terms of the GNU General Public License, Version 2, as 7 - * published by the Free Software Foundation. 8 - */ 9 - 10 - #ifndef __MACH_MEMORY_H 11 - #define __MACH_MEMORY_H 12 - 13 - /* 14 - * Physical DRAM offset. 15 - */ 16 - #define PLAT_PHYS_OFFSET UL(0x00000000) 17 - 18 - #define __phys_to_bus(x) ((x) + PHYS_OFFSET) 19 - #define __bus_to_phys(x) ((x) - PHYS_OFFSET) 20 - 21 - #define __virt_to_bus(v) __phys_to_bus(__virt_to_phys(v)) 22 - #define __bus_to_virt(b) __phys_to_virt(__bus_to_phys(b)) 23 - #define __pfn_to_bus(p) __phys_to_bus(__pfn_to_phys(p)) 24 - #define __bus_to_pfn(b) __phys_to_pfn(__bus_to_phys(b)) 25 - 26 - #endif
+1 -1
arch/arm/mach-davinci/board-da830-evm.c
··· 676 676 } 677 677 678 678 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") 679 - .boot_params = (DA8XX_DDR_BASE + 0x100), 679 + .atag_offset = 0x100, 680 680 .map_io = da830_evm_map_io, 681 681 .init_irq = cp_intc_init, 682 682 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-da850-evm.c
··· 1291 1291 } 1292 1292 1293 1293 MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") 1294 - .boot_params = (DA8XX_DDR_BASE + 0x100), 1294 + .atag_offset = 0x100, 1295 1295 .map_io = da850_evm_map_io, 1296 1296 .init_irq = cp_intc_init, 1297 1297 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-dm355-evm.c
··· 351 351 } 352 352 353 353 MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") 354 - .boot_params = (0x80000100), 354 + .atag_offset = 0x100, 355 355 .map_io = dm355_evm_map_io, 356 356 .init_irq = davinci_irq_init, 357 357 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-dm355-leopard.c
··· 270 270 } 271 271 272 272 MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard") 273 - .boot_params = (0x80000100), 273 + .atag_offset = 0x100, 274 274 .map_io = dm355_leopard_map_io, 275 275 .init_irq = davinci_irq_init, 276 276 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-dm365-evm.c
··· 612 612 } 613 613 614 614 MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") 615 - .boot_params = (0x80000100), 615 + .atag_offset = 0x100, 616 616 .map_io = dm365_evm_map_io, 617 617 .init_irq = davinci_irq_init, 618 618 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-dm644x-evm.c
··· 712 712 713 713 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") 714 714 /* Maintainer: MontaVista Software <source@mvista.com> */ 715 - .boot_params = (DAVINCI_DDR_BASE + 0x100), 715 + .atag_offset = 0x100, 716 716 .map_io = davinci_evm_map_io, 717 717 .init_irq = davinci_irq_init, 718 718 .timer = &davinci_timer,
+2 -2
arch/arm/mach-davinci/board-dm646x-evm.c
··· 792 792 } 793 793 794 794 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") 795 - .boot_params = (0x80000100), 795 + .atag_offset = 0x100, 796 796 .map_io = davinci_map_io, 797 797 .init_irq = davinci_irq_init, 798 798 .timer = &davinci_timer, ··· 801 801 MACHINE_END 802 802 803 803 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") 804 - .boot_params = (0x80000100), 804 + .atag_offset = 0x100, 805 805 .map_io = davinci_map_io, 806 806 .init_irq = davinci_irq_init, 807 807 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-mityomapl138.c
··· 566 566 } 567 567 568 568 MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808") 569 - .boot_params = (DA8XX_DDR_BASE + 0x100), 569 + .atag_offset = 0x100, 570 570 .map_io = mityomapl138_map_io, 571 571 .init_irq = cp_intc_init, 572 572 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-neuros-osd2.c
··· 272 272 273 273 MACHINE_START(NEUROS_OSD2, "Neuros OSD2") 274 274 /* Maintainer: Neuros Technologies <neuros@groups.google.com> */ 275 - .boot_params = (DAVINCI_DDR_BASE + 0x100), 275 + .atag_offset = 0x100, 276 276 .map_io = davinci_ntosd2_map_io, 277 277 .init_irq = davinci_irq_init, 278 278 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-omapl138-hawk.c
··· 338 338 } 339 339 340 340 MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard") 341 - .boot_params = (DA8XX_DDR_BASE + 0x100), 341 + .atag_offset = 0x100, 342 342 .map_io = omapl138_hawk_map_io, 343 343 .init_irq = cp_intc_init, 344 344 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-sffsdr.c
··· 151 151 152 152 MACHINE_START(SFFSDR, "Lyrtech SFFSDR") 153 153 /* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */ 154 - .boot_params = (DAVINCI_DDR_BASE + 0x100), 154 + .atag_offset = 0x100, 155 155 .map_io = davinci_sffsdr_map_io, 156 156 .init_irq = davinci_irq_init, 157 157 .timer = &davinci_timer,
+1 -1
arch/arm/mach-davinci/board-tnetv107x-evm.c
··· 277 277 #endif 278 278 279 279 MACHINE_START(TNETV107X, "TNETV107X EVM") 280 - .boot_params = (TNETV107X_DDR_BASE + 0x100), 280 + .atag_offset = 0x100, 281 281 .map_io = tnetv107x_init, 282 282 .init_irq = cp_intc_init, 283 283 .timer = &davinci_timer,
+3
arch/arm/mach-davinci/common.c
··· 12 12 #include <linux/io.h> 13 13 #include <linux/etherdevice.h> 14 14 #include <linux/davinci_emac.h> 15 + #include <linux/dma-mapping.h> 15 16 16 17 #include <asm/tlb.h> 17 18 #include <asm/mach/map.h> ··· 86 85 if (davinci_soc_info.io_desc && (davinci_soc_info.io_desc_num > 0)) 87 86 iotable_init(davinci_soc_info.io_desc, 88 87 davinci_soc_info.io_desc_num); 88 + 89 + init_consistent_dma_size(14 << 20); 89 90 90 91 /* 91 92 * Normally devicemaps_init() would flush caches and tlb after
+1 -1
arch/arm/mach-davinci/cpuidle.c
··· 19 19 #include <asm/proc-fns.h> 20 20 21 21 #include <mach/cpuidle.h> 22 - #include <mach/memory.h> 22 + #include <mach/ddr2.h> 23 23 24 24 #define DAVINCI_CPUIDLE_MAX_STATES 2 25 25
+4
arch/arm/mach-davinci/include/mach/ddr2.h
··· 1 + #define DDR2_SDRCR_OFFSET 0xc 2 + #define DDR2_SRPD_BIT (1 << 23) 3 + #define DDR2_MCLKSTOPEN_BIT (1 << 30) 4 + #define DDR2_LPMODEN_BIT (1 << 31)
+23 -29
arch/arm/mach-davinci/include/mach/debug-macro.S
··· 18 18 19 19 #include <linux/serial_reg.h> 20 20 21 - #include <asm/memory.h> 22 - 23 21 #include <mach/serial.h> 24 22 25 23 #define UART_SHIFT 2 26 - 27 - #define davinci_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) 28 - #define davinci_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) 29 24 30 25 .pushsection .data 31 26 davinci_uart_phys: .word 0 32 27 davinci_uart_virt: .word 0 33 28 .popsection 34 29 35 - .macro addruart, rp, rv 30 + .macro addruart, rp, rv, tmp 36 31 37 32 /* Use davinci_uart_phys/virt if already configured */ 38 - 10: mrc p15, 0, \rp, c1, c0 39 - tst \rp, #1 @ MMU enabled? 40 - ldreq \rp, =davinci_uart_v2p(davinci_uart_phys) 41 - ldrne \rp, =davinci_uart_phys 42 - add \rv, \rp, #4 @ davinci_uart_virt 43 - ldr \rp, [\rp, #0] 44 - ldr \rv, [\rv, #0] 33 + 10: adr \rp, 99f @ get effective addr of 99f 34 + ldr \rv, [\rp] @ get absolute addr of 99f 35 + sub \rv, \rv, \rp @ offset between the two 36 + ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys 37 + sub \tmp, \rp, \rv @ make it effective 38 + ldr \rp, [\tmp, #0] @ davinci_uart_phys 39 + ldr \rv, [\tmp, #4] @ davinci_uart_virt 45 40 cmp \rp, #0 @ is port configured? 46 41 cmpne \rv, #0 47 - bne 99f @ already configured 42 + bne 100f @ already configured 48 43 49 44 /* Check the debug UART address set in uncompress.h */ 50 - mrc p15, 0, \rp, c1, c0 51 - tst \rp, #1 @ MMU enabled? 45 + and \rp, pc, #0xff000000 46 + ldr \rv, =DAVINCI_UART_INFO_OFS 47 + add \rp, \rp, \rv 52 48 53 49 /* Copy uart phys address from decompressor uart info */ 54 - ldreq \rv, =davinci_uart_v2p(davinci_uart_phys) 55 - ldrne \rv, =davinci_uart_phys 56 - ldreq \rp, =DAVINCI_UART_INFO 57 - ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO) 58 - ldr \rp, [\rp, #0] 59 - str \rp, [\rv] 50 + ldr \rv, [\rp, #0] 51 + str \rv, [\tmp, #0] 60 52 61 53 /* Copy uart virt address from decompressor uart info */ 62 - ldreq \rv, =davinci_uart_v2p(davinci_uart_virt) 63 - ldrne \rv, =davinci_uart_virt 64 - ldreq \rp, =DAVINCI_UART_INFO 65 - ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO) 66 - ldr \rp, [\rp, #4] 67 - str \rp, [\rv] 54 + ldr \rv, [\rp, #4] 55 + str \rv, [\tmp, #4] 68 56 69 57 b 10b 70 - 99: 58 + 59 + .align 60 + 99: .word . 61 + .word davinci_uart_phys 62 + .ltorg 63 + 64 + 100: 71 65 .endm 72 66 73 67 .macro senduart,rd,rx
-44
arch/arm/mach-davinci/include/mach/memory.h
··· 1 - /* 2 - * DaVinci memory space definitions 3 - * 4 - * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> 5 - * 6 - * 2007 (c) MontaVista Software, Inc. This file is licensed under 7 - * the terms of the GNU General Public License version 2. This program 8 - * is licensed "as is" without any warranty of any kind, whether express 9 - * or implied. 10 - */ 11 - #ifndef __ASM_ARCH_MEMORY_H 12 - #define __ASM_ARCH_MEMORY_H 13 - 14 - /************************************************************************** 15 - * Included Files 16 - **************************************************************************/ 17 - #include <asm/page.h> 18 - #include <asm/sizes.h> 19 - 20 - /************************************************************************** 21 - * Definitions 22 - **************************************************************************/ 23 - #define DAVINCI_DDR_BASE 0x80000000 24 - #define DA8XX_DDR_BASE 0xc0000000 25 - 26 - #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx) 27 - #error Cannot enable DaVinci and DA8XX platforms concurrently 28 - #elif defined(CONFIG_ARCH_DAVINCI_DA8XX) 29 - #define PLAT_PHYS_OFFSET DA8XX_DDR_BASE 30 - #else 31 - #define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE 32 - #endif 33 - 34 - #define DDR2_SDRCR_OFFSET 0xc 35 - #define DDR2_SRPD_BIT BIT(23) 36 - #define DDR2_MCLKSTOPEN_BIT BIT(30) 37 - #define DDR2_LPMODEN_BIT BIT(31) 38 - 39 - /* 40 - * Increase size of DMA-consistent memory region 41 - */ 42 - #define CONSISTENT_DMA_SIZE (14<<20) 43 - 44 - #endif /* __ASM_ARCH_MEMORY_H */
+2 -1
arch/arm/mach-davinci/include/mach/serial.h
··· 21 21 * macros in debug-macro.S. 22 22 * 23 23 * This area sits just below the page tables (see arch/arm/kernel/head.S). 24 + * We define it as a relative offset from start of usable RAM. 24 25 */ 25 - #define DAVINCI_UART_INFO (PLAT_PHYS_OFFSET + 0x3ff8) 26 + #define DAVINCI_UART_INFO_OFS 0x3ff8 26 27 27 28 #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) 28 29 #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
+6 -1
arch/arm/mach-davinci/include/mach/uncompress.h
··· 43 43 44 44 static inline void set_uart_info(u32 phys, void * __iomem virt) 45 45 { 46 - u32 *uart_info = (u32 *)(DAVINCI_UART_INFO); 46 + /* 47 + * Get address of some.bss variable and round it down 48 + * a la CONFIG_AUTO_ZRELADDR. 49 + */ 50 + u32 ram_start = (u32)&uart & 0xf8000000; 51 + u32 *uart_info = (u32 *)(ram_start + DAVINCI_UART_INFO_OFS); 47 52 48 53 uart = (u32 *)phys; 49 54 uart_info[0] = phys;
+1 -1
arch/arm/mach-davinci/sleep.S
··· 22 22 #include <linux/linkage.h> 23 23 #include <asm/assembler.h> 24 24 #include <mach/psc.h> 25 - #include <mach/memory.h> 25 + #include <mach/ddr2.h> 26 26 27 27 #include "clock.h" 28 28
+1 -1
arch/arm/mach-dove/cm-a510.c
··· 87 87 } 88 88 89 89 MACHINE_START(CM_A510, "Compulab CM-A510 Board") 90 - .boot_params = 0x00000100, 90 + .atag_offset = 0x100, 91 91 .init_machine = cm_a510_init, 92 92 .map_io = dove_map_io, 93 93 .init_early = dove_init_early,
+1 -1
arch/arm/mach-dove/dove-db-setup.c
··· 94 94 } 95 95 96 96 MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board") 97 - .boot_params = 0x00000100, 97 + .atag_offset = 0x100, 98 98 .init_machine = dove_db_init, 99 99 .map_io = dove_map_io, 100 100 .init_early = dove_init_early,
+1 -1
arch/arm/mach-dove/include/mach/debug-macro.S
··· 8 8 9 9 #include <mach/bridge-regs.h> 10 10 11 - .macro addruart, rp, rv 11 + .macro addruart, rp, rv, tmp 12 12 ldr \rp, =DOVE_SB_REGS_PHYS_BASE 13 13 ldr \rv, =DOVE_SB_REGS_VIRT_BASE 14 14 orr \rp, \rp, #0x00012000
-10
arch/arm/mach-dove/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-dove/include/mach/memory.h 3 - */ 4 - 5 - #ifndef __ASM_ARCH_MEMORY_H 6 - #define __ASM_ARCH_MEMORY_H 7 - 8 - #define PLAT_PHYS_OFFSET UL(0x00000000) 9 - 10 - #endif
+1 -1
arch/arm/mach-ebsa110/core.c
··· 280 280 281 281 MACHINE_START(EBSA110, "EBSA110") 282 282 /* Maintainer: Russell King */ 283 - .boot_params = 0x00000400, 283 + .atag_offset = 0x400, 284 284 .reserve_lp0 = 1, 285 285 .reserve_lp2 = 1, 286 286 .soft_reboot = 1,
+1 -1
arch/arm/mach-ebsa110/include/mach/debug-macro.S
··· 11 11 * 12 12 **/ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0xf0000000 16 16 orr \rp, \rp, #0x00000be0 17 17 mov \rp, \rv
+1 -1
arch/arm/mach-ep93xx/adssphere.c
··· 33 33 34 34 MACHINE_START(ADSSPHERE, "ADS Sphere board") 35 35 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 36 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 36 + .atag_offset = 0x100, 37 37 .map_io = ep93xx_map_io, 38 38 .init_irq = ep93xx_init_irq, 39 39 .timer = &ep93xx_timer,
+8 -8
arch/arm/mach-ep93xx/edb93xx.c
··· 240 240 #ifdef CONFIG_MACH_EDB9301 241 241 MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board") 242 242 /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */ 243 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 243 + .atag_offset = 0x100, 244 244 .map_io = ep93xx_map_io, 245 245 .init_irq = ep93xx_init_irq, 246 246 .timer = &ep93xx_timer, ··· 251 251 #ifdef CONFIG_MACH_EDB9302 252 252 MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board") 253 253 /* Maintainer: George Kashperko <george@chas.com.ua> */ 254 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 254 + .atag_offset = 0x100, 255 255 .map_io = ep93xx_map_io, 256 256 .init_irq = ep93xx_init_irq, 257 257 .timer = &ep93xx_timer, ··· 262 262 #ifdef CONFIG_MACH_EDB9302A 263 263 MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board") 264 264 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 265 - .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, 265 + .atag_offset = 0x100, 266 266 .map_io = ep93xx_map_io, 267 267 .init_irq = ep93xx_init_irq, 268 268 .timer = &ep93xx_timer, ··· 273 273 #ifdef CONFIG_MACH_EDB9307 274 274 MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board") 275 275 /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */ 276 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 276 + .atag_offset = 0x100, 277 277 .map_io = ep93xx_map_io, 278 278 .init_irq = ep93xx_init_irq, 279 279 .timer = &ep93xx_timer, ··· 284 284 #ifdef CONFIG_MACH_EDB9307A 285 285 MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board") 286 286 /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */ 287 - .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, 287 + .atag_offset = 0x100, 288 288 .map_io = ep93xx_map_io, 289 289 .init_irq = ep93xx_init_irq, 290 290 .timer = &ep93xx_timer, ··· 295 295 #ifdef CONFIG_MACH_EDB9312 296 296 MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board") 297 297 /* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */ 298 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 298 + .atag_offset = 0x100, 299 299 .map_io = ep93xx_map_io, 300 300 .init_irq = ep93xx_init_irq, 301 301 .timer = &ep93xx_timer, ··· 306 306 #ifdef CONFIG_MACH_EDB9315 307 307 MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board") 308 308 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 309 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 309 + .atag_offset = 0x100, 310 310 .map_io = ep93xx_map_io, 311 311 .init_irq = ep93xx_init_irq, 312 312 .timer = &ep93xx_timer, ··· 317 317 #ifdef CONFIG_MACH_EDB9315A 318 318 MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board") 319 319 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 320 - .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, 320 + .atag_offset = 0x100, 321 321 .map_io = ep93xx_map_io, 322 322 .init_irq = ep93xx_init_irq, 323 323 .timer = &ep93xx_timer,
+1 -1
arch/arm/mach-ep93xx/gesbc9312.c
··· 33 33 34 34 MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") 35 35 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 36 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 36 + .atag_offset = 0x100, 37 37 .map_io = ep93xx_map_io, 38 38 .init_irq = ep93xx_init_irq, 39 39 .timer = &ep93xx_timer,
+1 -1
arch/arm/mach-ep93xx/include/mach/debug-macro.S
··· 11 11 */ 12 12 #include <mach/ep93xx-regs.h> 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base 16 16 ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base 17 17 orr \rp, \rp, #0x000c0000
+4 -4
arch/arm/mach-ep93xx/micro9.c
··· 77 77 #ifdef CONFIG_MACH_MICRO9H 78 78 MACHINE_START(MICRO9, "Contec Micro9-High") 79 79 /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ 80 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 80 + .atag_offset = 0x100, 81 81 .map_io = ep93xx_map_io, 82 82 .init_irq = ep93xx_init_irq, 83 83 .timer = &ep93xx_timer, ··· 88 88 #ifdef CONFIG_MACH_MICRO9M 89 89 MACHINE_START(MICRO9M, "Contec Micro9-Mid") 90 90 /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ 91 - .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100, 91 + .atag_offset = 0x100, 92 92 .map_io = ep93xx_map_io, 93 93 .init_irq = ep93xx_init_irq, 94 94 .timer = &ep93xx_timer, ··· 99 99 #ifdef CONFIG_MACH_MICRO9L 100 100 MACHINE_START(MICRO9L, "Contec Micro9-Lite") 101 101 /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ 102 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 102 + .atag_offset = 0x100, 103 103 .map_io = ep93xx_map_io, 104 104 .init_irq = ep93xx_init_irq, 105 105 .timer = &ep93xx_timer, ··· 110 110 #ifdef CONFIG_MACH_MICRO9S 111 111 MACHINE_START(MICRO9S, "Contec Micro9-Slim") 112 112 /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ 113 - .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100, 113 + .atag_offset = 0x100, 114 114 .map_io = ep93xx_map_io, 115 115 .init_irq = ep93xx_init_irq, 116 116 .timer = &ep93xx_timer,
+2 -2
arch/arm/mach-ep93xx/simone.c
··· 65 65 } 66 66 67 67 MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board") 68 - /* Maintainer: Ryan Mallon */ 69 - .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, 68 + /* Maintainer: Ryan Mallon */ 69 + .atag_offset = 0x100, 70 70 .map_io = ep93xx_map_io, 71 71 .init_irq = ep93xx_init_irq, 72 72 .timer = &ep93xx_timer,
+1 -1
arch/arm/mach-ep93xx/snappercl15.c
··· 163 163 164 164 MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15") 165 165 /* Maintainer: Ryan Mallon */ 166 - .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, 166 + .atag_offset = 0x100, 167 167 .map_io = ep93xx_map_io, 168 168 .init_irq = ep93xx_init_irq, 169 169 .timer = &ep93xx_timer,
+1 -1
arch/arm/mach-ep93xx/ts72xx.c
··· 257 257 258 258 MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") 259 259 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 260 - .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 260 + .atag_offset = 0x100, 261 261 .map_io = ts72xx_map_io, 262 262 .init_irq = ep93xx_init_irq, 263 263 .timer = &ep93xx_timer,
+1 -1
arch/arm/mach-exynos4/include/mach/debug-macro.S
··· 20 20 * aligned and add in the offset when we load the value here. 21 21 */ 22 22 23 - .macro addruart, rp, rv 23 + .macro addruart, rp, rv, tmp 24 24 ldr \rp, = S3C_PA_UART 25 25 ldr \rv, = S3C_VA_UART 26 26 #if CONFIG_DEBUG_S3C_UART != 0
+1 -1
arch/arm/mach-exynos4/mach-armlex4210.c
··· 207 207 208 208 MACHINE_START(ARMLEX4210, "ARMLEX4210") 209 209 /* Maintainer: Alim Akhtar <alim.akhtar@samsung.com> */ 210 - .boot_params = S5P_PA_SDRAM + 0x100, 210 + .atag_offset = 0x100, 211 211 .init_irq = exynos4_init_irq, 212 212 .map_io = armlex4210_map_io, 213 213 .init_machine = armlex4210_machine_init,
+1 -1
arch/arm/mach-exynos4/mach-nuri.c
··· 1186 1186 1187 1187 MACHINE_START(NURI, "NURI") 1188 1188 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ 1189 - .boot_params = S5P_PA_SDRAM + 0x100, 1189 + .atag_offset = 0x100, 1190 1190 .init_irq = exynos4_init_irq, 1191 1191 .map_io = nuri_map_io, 1192 1192 .init_machine = nuri_machine_init,
+1 -1
arch/arm/mach-exynos4/mach-universal_c210.c
··· 1055 1055 1056 1056 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") 1057 1057 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ 1058 - .boot_params = S5P_PA_SDRAM + 0x100, 1058 + .atag_offset = 0x100, 1059 1059 .init_irq = exynos4_init_irq, 1060 1060 .map_io = universal_map_io, 1061 1061 .init_machine = universal_machine_init,
+1 -1
arch/arm/mach-footbridge/cats-hw.c
··· 86 86 87 87 MACHINE_START(CATS, "Chalice-CATS") 88 88 /* Maintainer: Philip Blundell */ 89 - .boot_params = 0x00000100, 89 + .atag_offset = 0x100, 90 90 .soft_reboot = 1, 91 91 .fixup = fixup_cats, 92 92 .map_io = footbridge_map_io,
+1 -1
arch/arm/mach-footbridge/ebsa285.c
··· 15 15 16 16 MACHINE_START(EBSA285, "EBSA285") 17 17 /* Maintainer: Russell King */ 18 - .boot_params = 0x00000100, 18 + .atag_offset = 0x100, 19 19 .video_start = 0x000a0000, 20 20 .video_end = 0x000bffff, 21 21 .map_io = footbridge_map_io,
+2 -2
arch/arm/mach-footbridge/include/mach/debug-macro.S
··· 15 15 16 16 #ifndef CONFIG_DEBUG_DC21285_PORT 17 17 /* For NetWinder debugging */ 18 - .macro addruart, rp, rv 18 + .macro addruart, rp, rv, tmp 19 19 mov \rp, #0x000003f8 20 20 orr \rv, \rp, #0xff000000 @ virtual 21 21 orr \rp, \rp, #0x7c000000 @ physical ··· 31 31 .equ dc21285_high, ARMCSR_BASE & 0xff000000 32 32 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff 33 33 34 - .macro addruart, rp, rv 34 + .macro addruart, rp, rv, tmp 35 35 .if dc21285_low 36 36 mov \rp, #dc21285_low 37 37 .else
+1 -1
arch/arm/mach-footbridge/netwinder-hw.c
··· 648 648 649 649 MACHINE_START(NETWINDER, "Rebel-NetWinder") 650 650 /* Maintainer: Russell King/Rebel.com */ 651 - .boot_params = 0x00000100, 651 + .atag_offset = 0x100, 652 652 .video_start = 0x000a0000, 653 653 .video_end = 0x000bffff, 654 654 .reserve_lp0 = 1,
+1 -1
arch/arm/mach-footbridge/personal.c
··· 15 15 16 16 MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer") 17 17 /* Maintainer: Jamey Hicks / George France */ 18 - .boot_params = 0x00000100, 18 + .atag_offset = 0x100, 19 19 .map_io = footbridge_map_io, 20 20 .init_irq = footbridge_init_irq, 21 21 .timer = &footbridge_timer,
+1 -1
arch/arm/mach-gemini/board-nas4220b.c
··· 102 102 } 103 103 104 104 MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B") 105 - .boot_params = 0x100, 105 + .atag_offset = 0x100, 106 106 .map_io = gemini_map_io, 107 107 .init_irq = gemini_init_irq, 108 108 .timer = &ib4220b_timer,
+1 -1
arch/arm/mach-gemini/board-rut1xx.c
··· 86 86 } 87 87 88 88 MACHINE_START(RUT100, "Teltonika RUT100") 89 - .boot_params = 0x100, 89 + .atag_offset = 0x100, 90 90 .map_io = gemini_map_io, 91 91 .init_irq = gemini_init_irq, 92 92 .timer = &rut1xx_timer,
+1 -1
arch/arm/mach-gemini/board-wbd111.c
··· 129 129 } 130 130 131 131 MACHINE_START(WBD111, "Wiliboard WBD-111") 132 - .boot_params = 0x100, 132 + .atag_offset = 0x100, 133 133 .map_io = gemini_map_io, 134 134 .init_irq = gemini_init_irq, 135 135 .timer = &wbd111_timer,
+1 -1
arch/arm/mach-gemini/board-wbd222.c
··· 129 129 } 130 130 131 131 MACHINE_START(WBD222, "Wiliboard WBD-222") 132 - .boot_params = 0x100, 132 + .atag_offset = 0x100, 133 133 .map_io = gemini_map_io, 134 134 .init_irq = gemini_init_irq, 135 135 .timer = &wbd222_timer,
+1 -1
arch/arm/mach-gemini/include/mach/debug-macro.S
··· 11 11 */ 12 12 #include <mach/hardware.h> 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 ldr \rp, =GEMINI_UART_BASE @ physical 16 16 ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual 17 17 .endm
-19
arch/arm/mach-gemini/include/mach/memory.h
··· 1 - /* 2 - * Copyright (C) 2001-2006 Storlink, Corp. 3 - * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> 4 - * 5 - * This program is free software; you can redistribute it and/or modify 6 - * it under the terms of the GNU General Public License as published by 7 - * the Free Software Foundation; either version 2 of the License, or 8 - * (at your option) any later version. 9 - */ 10 - #ifndef __MACH_MEMORY_H 11 - #define __MACH_MEMORY_H 12 - 13 - #ifdef CONFIG_GEMINI_MEM_SWAP 14 - # define PLAT_PHYS_OFFSET UL(0x00000000) 15 - #else 16 - # define PLAT_PHYS_OFFSET UL(0x10000000) 17 - #endif 18 - 19 - #endif /* __MACH_MEMORY_H */
+1 -1
arch/arm/mach-h720x/h7201-eval.c
··· 29 29 30 30 MACHINE_START(H7201, "Hynix GMS30C7201") 31 31 /* Maintainer: Robert Schwebel, Pengutronix */ 32 - .boot_params = 0xc0001000, 32 + .atag_offset = 0x1000, 33 33 .map_io = h720x_map_io, 34 34 .init_irq = h720x_init_irq, 35 35 .timer = &h7201_timer,
+1 -1
arch/arm/mach-h720x/h7202-eval.c
··· 71 71 72 72 MACHINE_START(H7202, "Hynix HMS30C7202") 73 73 /* Maintainer: Robert Schwebel, Pengutronix */ 74 - .boot_params = 0x40000100, 74 + .atag_offset = 0x100, 75 75 .map_io = h720x_map_io, 76 76 .init_irq = h7202_init_irq, 77 77 .timer = &h7202_timer,
+1 -1
arch/arm/mach-h720x/include/mach/debug-macro.S
··· 16 16 .equ io_virt, IO_VIRT 17 17 .equ io_phys, IO_PHYS 18 18 19 - .macro addruart, rp, rv 19 + .macro addruart, rp, rv, tmp 20 20 mov \rp, #0x00020000 @ UART1 21 21 add \rv, \rp, #io_virt @ virtual address 22 22 add \rp, \rp, #io_phys @ physical base address
-11
arch/arm/mach-h720x/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-h720x/include/mach/memory.h 3 - * 4 - * Copyright (c) 2000 Jungjun Kim 5 - * 6 - */ 7 - #ifndef __ASM_ARCH_MEMORY_H 8 - #define __ASM_ARCH_MEMORY_H 9 - 10 - #define PLAT_PHYS_OFFSET UL(0x40000000) 11 - #endif
+1 -1
arch/arm/mach-imx/mach-armadillo5x0.c
··· 558 558 559 559 MACHINE_START(ARMADILLO5X0, "Armadillo-500") 560 560 /* Maintainer: Alberto Panizzo */ 561 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 561 + .atag_offset = 0x100, 562 562 .map_io = mx31_map_io, 563 563 .init_early = imx31_init_early, 564 564 .init_irq = mx31_init_irq,
+1 -1
arch/arm/mach-imx/mach-cpuimx27.c
··· 311 311 }; 312 312 313 313 MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27") 314 - .boot_params = MX27_PHYS_OFFSET + 0x100, 314 + .atag_offset = 0x100, 315 315 .map_io = mx27_map_io, 316 316 .init_early = imx27_init_early, 317 317 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-cpuimx35.c
··· 194 194 195 195 MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35") 196 196 /* Maintainer: Eukrea Electromatique */ 197 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 197 + .atag_offset = 0x100, 198 198 .map_io = mx35_map_io, 199 199 .init_early = imx35_init_early, 200 200 .init_irq = mx35_init_irq,
+1 -1
arch/arm/mach-imx/mach-eukrea_cpuimx25.c
··· 163 163 164 164 MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25") 165 165 /* Maintainer: Eukrea Electromatique */ 166 - .boot_params = MX25_PHYS_OFFSET + 0x100, 166 + .atag_offset = 0x100, 167 167 .map_io = mx25_map_io, 168 168 .init_early = imx25_init_early, 169 169 .init_irq = mx25_init_irq,
+1 -1
arch/arm/mach-imx/mach-imx27_visstrim_m10.c
··· 275 275 }; 276 276 277 277 MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10") 278 - .boot_params = MX27_PHYS_OFFSET + 0x100, 278 + .atag_offset = 0x100, 279 279 .map_io = mx27_map_io, 280 280 .init_early = imx27_init_early, 281 281 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-imx27ipcam.c
··· 71 71 72 72 MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM") 73 73 /* maintainer: Freescale Semiconductor, Inc. */ 74 - .boot_params = MX27_PHYS_OFFSET + 0x100, 74 + .atag_offset = 0x100, 75 75 .map_io = mx27_map_io, 76 76 .init_early = imx27_init_early, 77 77 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-imx27lite.c
··· 77 77 }; 78 78 79 79 MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") 80 - .boot_params = MX27_PHYS_OFFSET + 0x100, 80 + .atag_offset = 0x100, 81 81 .map_io = mx27_map_io, 82 82 .init_early = imx27_init_early, 83 83 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-kzm_arm11_01.c
··· 271 271 }; 272 272 273 273 MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") 274 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 274 + .atag_offset = 0x100, 275 275 .map_io = kzm_map_io, 276 276 .init_early = imx31_init_early, 277 277 .init_irq = mx31_init_irq,
+2 -2
arch/arm/mach-imx/mach-mx1ads.c
··· 145 145 146 146 MACHINE_START(MX1ADS, "Freescale MX1ADS") 147 147 /* Maintainer: Sascha Hauer, Pengutronix */ 148 - .boot_params = MX1_PHYS_OFFSET + 0x100, 148 + .atag_offset = 0x100, 149 149 .map_io = mx1_map_io, 150 150 .init_early = imx1_init_early, 151 151 .init_irq = mx1_init_irq, ··· 154 154 MACHINE_END 155 155 156 156 MACHINE_START(MXLADS, "Freescale MXLADS") 157 - .boot_params = MX1_PHYS_OFFSET + 0x100, 157 + .atag_offset = 0x100, 158 158 .map_io = mx1_map_io, 159 159 .init_early = imx1_init_early, 160 160 .init_irq = mx1_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx21ads.c
··· 305 305 306 306 MACHINE_START(MX21ADS, "Freescale i.MX21ADS") 307 307 /* maintainer: Freescale Semiconductor, Inc. */ 308 - .boot_params = MX21_PHYS_OFFSET + 0x100, 308 + .atag_offset = 0x100, 309 309 .map_io = mx21ads_map_io, 310 310 .init_early = imx21_init_early, 311 311 .init_irq = mx21_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx25_3ds.c
··· 253 253 254 254 MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)") 255 255 /* Maintainer: Freescale Semiconductor, Inc. */ 256 - .boot_params = MX25_PHYS_OFFSET + 0x100, 256 + .atag_offset = 0x100, 257 257 .map_io = mx25_map_io, 258 258 .init_early = imx25_init_early, 259 259 .init_irq = mx25_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx27_3ds.c
··· 421 421 422 422 MACHINE_START(MX27_3DS, "Freescale MX27PDK") 423 423 /* maintainer: Freescale Semiconductor, Inc. */ 424 - .boot_params = MX27_PHYS_OFFSET + 0x100, 424 + .atag_offset = 0x100, 425 425 .map_io = mx27_map_io, 426 426 .init_early = imx27_init_early, 427 427 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx27ads.c
··· 345 345 346 346 MACHINE_START(MX27ADS, "Freescale i.MX27ADS") 347 347 /* maintainer: Freescale Semiconductor, Inc. */ 348 - .boot_params = MX27_PHYS_OFFSET + 0x100, 348 + .atag_offset = 0x100, 349 349 .map_io = mx27ads_map_io, 350 350 .init_early = imx27_init_early, 351 351 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx31_3ds.c
··· 764 764 765 765 MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") 766 766 /* Maintainer: Freescale Semiconductor, Inc. */ 767 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 767 + .atag_offset = 0x100, 768 768 .map_io = mx31_map_io, 769 769 .init_early = imx31_init_early, 770 770 .init_irq = mx31_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx31ads.c
··· 535 535 536 536 MACHINE_START(MX31ADS, "Freescale MX31ADS") 537 537 /* Maintainer: Freescale Semiconductor, Inc. */ 538 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 538 + .atag_offset = 0x100, 539 539 .map_io = mx31ads_map_io, 540 540 .init_early = imx31_init_early, 541 541 .init_irq = mx31ads_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx31lilly.c
··· 295 295 }; 296 296 297 297 MACHINE_START(LILLY1131, "INCO startec LILLY-1131") 298 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 298 + .atag_offset = 0x100, 299 299 .map_io = mx31_map_io, 300 300 .init_early = imx31_init_early, 301 301 .init_irq = mx31_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx31lite.c
··· 280 280 281 281 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") 282 282 /* Maintainer: Freescale Semiconductor, Inc. */ 283 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 283 + .atag_offset = 0x100, 284 284 .map_io = mx31lite_map_io, 285 285 .init_early = imx31_init_early, 286 286 .init_irq = mx31_init_irq,
+1 -1
arch/arm/mach-imx/mach-mx31moboard.c
··· 567 567 568 568 MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") 569 569 /* Maintainer: Valentin Longchamp, EPFL Mobots group */ 570 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 570 + .atag_offset = 0x100, 571 571 .reserve = mx31moboard_reserve, 572 572 .map_io = mx31_map_io, 573 573 .init_early = imx31_init_early,
+1 -1
arch/arm/mach-imx/mach-mx35_3ds.c
··· 217 217 218 218 MACHINE_START(MX35_3DS, "Freescale MX35PDK") 219 219 /* Maintainer: Freescale Semiconductor, Inc */ 220 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 220 + .atag_offset = 0x100, 221 221 .map_io = mx35_map_io, 222 222 .init_early = imx35_init_early, 223 223 .init_irq = mx35_init_irq,
+1 -1
arch/arm/mach-imx/mach-mxt_td60.c
··· 267 267 268 268 MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") 269 269 /* maintainer: Maxtrack Industrial */ 270 - .boot_params = MX27_PHYS_OFFSET + 0x100, 270 + .atag_offset = 0x100, 271 271 .map_io = mx27_map_io, 272 272 .init_early = imx27_init_early, 273 273 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-pca100.c
··· 435 435 }; 436 436 437 437 MACHINE_START(PCA100, "phyCARD-i.MX27") 438 - .boot_params = MX27_PHYS_OFFSET + 0x100, 438 + .atag_offset = 0x100, 439 439 .map_io = mx27_map_io, 440 440 .init_early = imx27_init_early, 441 441 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-pcm037.c
··· 688 688 689 689 MACHINE_START(PCM037, "Phytec Phycore pcm037") 690 690 /* Maintainer: Pengutronix */ 691 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 691 + .atag_offset = 0x100, 692 692 .reserve = pcm037_reserve, 693 693 .map_io = mx31_map_io, 694 694 .init_early = imx31_init_early,
+1 -1
arch/arm/mach-imx/mach-pcm038.c
··· 349 349 }; 350 350 351 351 MACHINE_START(PCM038, "phyCORE-i.MX27") 352 - .boot_params = MX27_PHYS_OFFSET + 0x100, 352 + .atag_offset = 0x100, 353 353 .map_io = mx27_map_io, 354 354 .init_early = imx27_init_early, 355 355 .init_irq = mx27_init_irq,
+1 -1
arch/arm/mach-imx/mach-pcm043.c
··· 418 418 419 419 MACHINE_START(PCM043, "Phytec Phycore pcm043") 420 420 /* Maintainer: Pengutronix */ 421 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 421 + .atag_offset = 0x100, 422 422 .map_io = mx35_map_io, 423 423 .init_early = imx35_init_early, 424 424 .init_irq = mx35_init_irq,
+1 -1
arch/arm/mach-imx/mach-qong.c
··· 262 262 263 263 MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") 264 264 /* Maintainer: DENX Software Engineering GmbH */ 265 - .boot_params = MX3x_PHYS_OFFSET + 0x100, 265 + .atag_offset = 0x100, 266 266 .map_io = mx31_map_io, 267 267 .init_early = imx31_init_early, 268 268 .init_irq = mx31_init_irq,
+1 -1
arch/arm/mach-imx/mach-scb9328.c
··· 137 137 138 138 MACHINE_START(SCB9328, "Synertronixx scb9328") 139 139 /* Sascha Hauer */ 140 - .boot_params = 0x08000100, 140 + .atag_offset = 100, 141 141 .map_io = mx1_map_io, 142 142 .init_early = imx1_init_early, 143 143 .init_irq = mx1_init_irq,
+1 -1
arch/arm/mach-integrator/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0x16000000 @ physical base address 16 16 mov \rv, #0xf0000000 @ virtual base 17 17 add \rv, \rv, #0x16000000 >> 4
+1 -1
arch/arm/mach-integrator/integrator_ap.c
··· 459 459 460 460 MACHINE_START(INTEGRATOR, "ARM-Integrator") 461 461 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 462 - .boot_params = 0x00000100, 462 + .atag_offset = 0x100, 463 463 .reserve = integrator_reserve, 464 464 .map_io = ap_map_io, 465 465 .init_early = integrator_init_early,
+1 -1
arch/arm/mach-integrator/integrator_cp.c
··· 492 492 493 493 MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") 494 494 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 495 - .boot_params = 0x00000100, 495 + .atag_offset = 0x100, 496 496 .reserve = integrator_reserve, 497 497 .map_io = intcp_map_io, 498 498 .init_early = intcp_init_early,
+1 -1
arch/arm/mach-iop13xx/include/mach/debug-macro.S
··· 11 11 * published by the Free Software Foundation. 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0x00002300 16 16 orr \rp, \rp, #0x00000040 17 17 orr \rv, \rp, #0xfe000000 @ virtual
+1 -1
arch/arm/mach-iop13xx/iq81340mc.c
··· 91 91 92 92 MACHINE_START(IQ81340MC, "Intel IQ81340MC") 93 93 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ 94 - .boot_params = 0x00000100, 94 + .atag_offset = 0x100, 95 95 .map_io = iop13xx_map_io, 96 96 .init_irq = iop13xx_init_irq, 97 97 .timer = &iq81340mc_timer,
+1 -1
arch/arm/mach-iop13xx/iq81340sc.c
··· 93 93 94 94 MACHINE_START(IQ81340SC, "Intel IQ81340SC") 95 95 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ 96 - .boot_params = 0x00000100, 96 + .atag_offset = 0x100, 97 97 .map_io = iop13xx_map_io, 98 98 .init_irq = iop13xx_init_irq, 99 99 .timer = &iq81340sc_timer,
+1 -1
arch/arm/mach-iop32x/em7210.c
··· 203 203 } 204 204 205 205 MACHINE_START(EM7210, "Lanner EM7210") 206 - .boot_params = 0xa0000100, 206 + .atag_offset = 0x100, 207 207 .map_io = em7210_map_io, 208 208 .init_irq = iop32x_init_irq, 209 209 .timer = &em7210_timer,
+1 -1
arch/arm/mach-iop32x/glantank.c
··· 207 207 208 208 MACHINE_START(GLANTANK, "GLAN Tank") 209 209 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 210 - .boot_params = 0xa0000100, 210 + .atag_offset = 0x100, 211 211 .map_io = glantank_map_io, 212 212 .init_irq = iop32x_init_irq, 213 213 .timer = &glantank_timer,
+1 -1
arch/arm/mach-iop32x/include/mach/debug-macro.S
··· 11 11 * published by the Free Software Foundation. 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0xfe000000 @ physical as well as virtual 16 16 orr \rp, \rp, #0x00800000 @ location of the UART 17 17 mov \rv, \rp
-13
arch/arm/mach-iop32x/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-iop32x/include/mach/memory.h 3 - */ 4 - 5 - #ifndef __MEMORY_H 6 - #define __MEMORY_H 7 - 8 - /* 9 - * Physical DRAM offset. 10 - */ 11 - #define PLAT_PHYS_OFFSET UL(0xa0000000) 12 - 13 - #endif
+2 -2
arch/arm/mach-iop32x/iq31244.c
··· 313 313 314 314 MACHINE_START(IQ31244, "Intel IQ31244") 315 315 /* Maintainer: Intel Corp. */ 316 - .boot_params = 0xa0000100, 316 + .atag_offset = 0x100, 317 317 .map_io = iq31244_map_io, 318 318 .init_irq = iop32x_init_irq, 319 319 .timer = &iq31244_timer, ··· 327 327 */ 328 328 MACHINE_START(EP80219, "Intel EP80219") 329 329 /* Maintainer: Intel Corp. */ 330 - .boot_params = 0xa0000100, 330 + .atag_offset = 0x100, 331 331 .map_io = iq31244_map_io, 332 332 .init_irq = iop32x_init_irq, 333 333 .timer = &iq31244_timer,
+1 -1
arch/arm/mach-iop32x/iq80321.c
··· 186 186 187 187 MACHINE_START(IQ80321, "Intel IQ80321") 188 188 /* Maintainer: Intel Corp. */ 189 - .boot_params = 0xa0000100, 189 + .atag_offset = 0x100, 190 190 .map_io = iq80321_map_io, 191 191 .init_irq = iop32x_init_irq, 192 192 .timer = &iq80321_timer,
+1 -1
arch/arm/mach-iop32x/n2100.c
··· 327 327 328 328 MACHINE_START(N2100, "Thecus N2100") 329 329 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 330 - .boot_params = 0xa0000100, 330 + .atag_offset = 0x100, 331 331 .map_io = n2100_map_io, 332 332 .init_irq = iop32x_init_irq, 333 333 .timer = &n2100_timer,
+1 -1
arch/arm/mach-iop33x/include/mach/debug-macro.S
··· 11 11 * published by the Free Software Foundation. 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0x00ff0000 16 16 orr \rp, \rp, #0x0000f700 17 17 orr \rv, #0xfe000000 @ virtual
-13
arch/arm/mach-iop33x/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-iop33x/include/mach/memory.h 3 - */ 4 - 5 - #ifndef __MEMORY_H 6 - #define __MEMORY_H 7 - 8 - /* 9 - * Physical DRAM offset. 10 - */ 11 - #define PLAT_PHYS_OFFSET UL(0x00000000) 12 - 13 - #endif
+1 -1
arch/arm/mach-iop33x/iq80331.c
··· 141 141 142 142 MACHINE_START(IQ80331, "Intel IQ80331") 143 143 /* Maintainer: Intel Corp. */ 144 - .boot_params = 0x00000100, 144 + .atag_offset = 0x100, 145 145 .map_io = iop3xx_map_io, 146 146 .init_irq = iop33x_init_irq, 147 147 .timer = &iq80331_timer,
+1 -1
arch/arm/mach-iop33x/iq80332.c
··· 141 141 142 142 MACHINE_START(IQ80332, "Intel IQ80332") 143 143 /* Maintainer: Intel Corp. */ 144 - .boot_params = 0x00000100, 144 + .atag_offset = 0x100, 145 145 .map_io = iop3xx_map_io, 146 146 .init_irq = iop33x_init_irq, 147 147 .timer = &iq80332_timer,
+1 -1
arch/arm/mach-ixp2000/enp2611.c
··· 254 254 255 255 MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board") 256 256 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 257 - .boot_params = 0x00000100, 257 + .atag_offset = 0x100, 258 258 .map_io = enp2611_map_io, 259 259 .init_irq = ixp2000_init_irq, 260 260 .timer = &enp2611_timer,
+1 -1
arch/arm/mach-ixp2000/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0x00030000 16 16 #ifdef __ARMEB__ 17 17 orr \rp, \rp, #0x00000003
+1 -1
arch/arm/mach-ixp2000/ixdp2400.c
··· 171 171 172 172 MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform") 173 173 /* Maintainer: MontaVista Software, Inc. */ 174 - .boot_params = 0x00000100, 174 + .atag_offset = 0x100, 175 175 .map_io = ixdp2x00_map_io, 176 176 .init_irq = ixdp2400_init_irq, 177 177 .timer = &ixdp2400_timer,
+1 -1
arch/arm/mach-ixp2000/ixdp2800.c
··· 286 286 287 287 MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform") 288 288 /* Maintainer: MontaVista Software, Inc. */ 289 - .boot_params = 0x00000100, 289 + .atag_offset = 0x100, 290 290 .map_io = ixdp2x00_map_io, 291 291 .init_irq = ixdp2800_init_irq, 292 292 .timer = &ixdp2800_timer,
+3 -3
arch/arm/mach-ixp2000/ixdp2x01.c
··· 417 417 #ifdef CONFIG_ARCH_IXDP2401 418 418 MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") 419 419 /* Maintainer: MontaVista Software, Inc. */ 420 - .boot_params = 0x00000100, 420 + .atag_offset = 0x100, 421 421 .map_io = ixdp2x01_map_io, 422 422 .init_irq = ixdp2x01_init_irq, 423 423 .timer = &ixdp2x01_timer, ··· 428 428 #ifdef CONFIG_ARCH_IXDP2801 429 429 MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform") 430 430 /* Maintainer: MontaVista Software, Inc. */ 431 - .boot_params = 0x00000100, 431 + .atag_offset = 0x100, 432 432 .map_io = ixdp2x01_map_io, 433 433 .init_irq = ixdp2x01_init_irq, 434 434 .timer = &ixdp2x01_timer, ··· 441 441 */ 442 442 MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform") 443 443 /* Maintainer: MontaVista Software, Inc. */ 444 - .boot_params = 0x00000100, 444 + .atag_offset = 0x100, 445 445 .map_io = ixdp2x01_map_io, 446 446 .init_irq = ixdp2x01_init_irq, 447 447 .timer = &ixdp2x01_timer,
+1 -1
arch/arm/mach-ixp23xx/espresso.c
··· 88 88 .map_io = ixp23xx_map_io, 89 89 .init_irq = ixp23xx_init_irq, 90 90 .timer = &ixp23xx_timer, 91 - .boot_params = 0x00000100, 91 + .atag_offset = 0x100, 92 92 .init_machine = espresso_init, 93 93 MACHINE_END
+1 -1
arch/arm/mach-ixp23xx/include/mach/debug-macro.S
··· 12 12 */ 13 13 #include <mach/ixp23xx.h> 14 14 15 - .macro addruart, rp, rv 15 + .macro addruart, rp, rv, tmp 16 16 ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical 17 17 ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual 18 18 #ifdef __ARMEB__
+1 -1
arch/arm/mach-ixp23xx/ixdp2351.c
··· 331 331 .map_io = ixdp2351_map_io, 332 332 .init_irq = ixdp2351_init_irq, 333 333 .timer = &ixp23xx_timer, 334 - .boot_params = 0x00000100, 334 + .atag_offset = 0x100, 335 335 .init_machine = ixdp2351_init, 336 336 MACHINE_END
+1 -1
arch/arm/mach-ixp23xx/roadrunner.c
··· 175 175 .map_io = ixp23xx_map_io, 176 176 .init_irq = ixp23xx_init_irq, 177 177 .timer = &ixp23xx_timer, 178 - .boot_params = 0x00000100, 178 + .atag_offset = 0x100, 179 179 .init_machine = roadrunner_init, 180 180 MACHINE_END
+2 -2
arch/arm/mach-ixp4xx/avila-setup.c
··· 167 167 .map_io = ixp4xx_map_io, 168 168 .init_irq = ixp4xx_init_irq, 169 169 .timer = &ixp4xx_timer, 170 - .boot_params = 0x0100, 170 + .atag_offset = 0x100, 171 171 .init_machine = avila_init, 172 172 #if defined(CONFIG_PCI) 173 173 .dma_zone_size = SZ_64M, ··· 185 185 .map_io = ixp4xx_map_io, 186 186 .init_irq = ixp4xx_init_irq, 187 187 .timer = &ixp4xx_timer, 188 - .boot_params = 0x0100, 188 + .atag_offset = 0x100, 189 189 .init_machine = avila_init, 190 190 #if defined(CONFIG_PCI) 191 191 .dma_zone_size = SZ_64M,
+2 -2
arch/arm/mach-ixp4xx/coyote-setup.c
··· 112 112 .map_io = ixp4xx_map_io, 113 113 .init_irq = ixp4xx_init_irq, 114 114 .timer = &ixp4xx_timer, 115 - .boot_params = 0x0100, 115 + .atag_offset = 0x100, 116 116 .init_machine = coyote_init, 117 117 #if defined(CONFIG_PCI) 118 118 .dma_zone_size = SZ_64M, ··· 130 130 .map_io = ixp4xx_map_io, 131 131 .init_irq = ixp4xx_init_irq, 132 132 .timer = &ixp4xx_timer, 133 - .boot_params = 0x0100, 133 + .atag_offset = 0x100, 134 134 .init_machine = coyote_init, 135 135 MACHINE_END 136 136 #endif
+1 -1
arch/arm/mach-ixp4xx/dsmg600-setup.c
··· 279 279 280 280 MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") 281 281 /* Maintainer: www.nslu2-linux.org */ 282 - .boot_params = 0x00000100, 282 + .atag_offset = 0x100, 283 283 .map_io = ixp4xx_map_io, 284 284 .init_irq = ixp4xx_init_irq, 285 285 .timer = &dsmg600_timer,
+1 -1
arch/arm/mach-ixp4xx/fsg-setup.c
··· 273 273 .map_io = ixp4xx_map_io, 274 274 .init_irq = ixp4xx_init_irq, 275 275 .timer = &ixp4xx_timer, 276 - .boot_params = 0x0100, 276 + .atag_offset = 0x100, 277 277 .init_machine = fsg_init, 278 278 #if defined(CONFIG_PCI) 279 279 .dma_zone_size = SZ_64M,
+1 -1
arch/arm/mach-ixp4xx/gateway7001-setup.c
··· 99 99 .map_io = ixp4xx_map_io, 100 100 .init_irq = ixp4xx_init_irq, 101 101 .timer = &ixp4xx_timer, 102 - .boot_params = 0x0100, 102 + .atag_offset = 0x100, 103 103 .init_machine = gateway7001_init, 104 104 #if defined(CONFIG_PCI) 105 105 .dma_zone_size = SZ_64M,
+1 -1
arch/arm/mach-ixp4xx/goramo_mlr.c
··· 499 499 .map_io = ixp4xx_map_io, 500 500 .init_irq = ixp4xx_init_irq, 501 501 .timer = &ixp4xx_timer, 502 - .boot_params = 0x0100, 502 + .atag_offset = 0x100, 503 503 .init_machine = gmlr_init, 504 504 #if defined(CONFIG_PCI) 505 505 .dma_zone_size = SZ_64M,
+1 -1
arch/arm/mach-ixp4xx/gtwx5715-setup.c
··· 167 167 .map_io = ixp4xx_map_io, 168 168 .init_irq = ixp4xx_init_irq, 169 169 .timer = &ixp4xx_timer, 170 - .boot_params = 0x0100, 170 + .atag_offset = 0x100, 171 171 .init_machine = gtwx5715_init, 172 172 #if defined(CONFIG_PCI) 173 173 .dma_zone_size = SZ_64M,
+1 -1
arch/arm/mach-ixp4xx/include/mach/debug-macro.S
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 - .macro addruart, rp, rv 13 + .macro addruart, rp, rv, tmp 14 14 #ifdef __ARMEB__ 15 15 mov \rp, #3 @ Uart regs are at off set of 3 if 16 16 @ byte writes used - Big Endian.
-17
arch/arm/mach-ixp4xx/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-ixp4xx/include/mach/memory.h 3 - * 4 - * Copyright (c) 2001-2004 MontaVista Software, Inc. 5 - */ 6 - 7 - #ifndef __ASM_ARCH_MEMORY_H 8 - #define __ASM_ARCH_MEMORY_H 9 - 10 - #include <asm/sizes.h> 11 - 12 - /* 13 - * Physical DRAM offset. 14 - */ 15 - #define PLAT_PHYS_OFFSET UL(0x00000000) 16 - 17 - #endif
+4 -4
arch/arm/mach-ixp4xx/ixdp425-setup.c
··· 256 256 .map_io = ixp4xx_map_io, 257 257 .init_irq = ixp4xx_init_irq, 258 258 .timer = &ixp4xx_timer, 259 - .boot_params = 0x0100, 259 + .atag_offset = 0x100, 260 260 .init_machine = ixdp425_init, 261 261 #if defined(CONFIG_PCI) 262 262 .dma_zone_size = SZ_64M, ··· 270 270 .map_io = ixp4xx_map_io, 271 271 .init_irq = ixp4xx_init_irq, 272 272 .timer = &ixp4xx_timer, 273 - .boot_params = 0x0100, 273 + .atag_offset = 0x100, 274 274 .init_machine = ixdp425_init, 275 275 #if defined(CONFIG_PCI) 276 276 .dma_zone_size = SZ_64M, ··· 284 284 .map_io = ixp4xx_map_io, 285 285 .init_irq = ixp4xx_init_irq, 286 286 .timer = &ixp4xx_timer, 287 - .boot_params = 0x0100, 287 + .atag_offset = 0x100, 288 288 .init_machine = ixdp425_init, 289 289 #if defined(CONFIG_PCI) 290 290 .dma_zone_size = SZ_64M, ··· 298 298 .map_io = ixp4xx_map_io, 299 299 .init_irq = ixp4xx_init_irq, 300 300 .timer = &ixp4xx_timer, 301 - .boot_params = 0x0100, 301 + .atag_offset = 0x100, 302 302 .init_machine = ixdp425_init, 303 303 #if defined(CONFIG_PCI) 304 304 .dma_zone_size = SZ_64M,
+1 -1
arch/arm/mach-ixp4xx/nas100d-setup.c
··· 314 314 315 315 MACHINE_START(NAS100D, "Iomega NAS 100d") 316 316 /* Maintainer: www.nslu2-linux.org */ 317 - .boot_params = 0x00000100, 317 + .atag_offset = 0x100, 318 318 .map_io = ixp4xx_map_io, 319 319 .init_irq = ixp4xx_init_irq, 320 320 .timer = &ixp4xx_timer,
+1 -1
arch/arm/mach-ixp4xx/nslu2-setup.c
··· 300 300 301 301 MACHINE_START(NSLU2, "Linksys NSLU2") 302 302 /* Maintainer: www.nslu2-linux.org */ 303 - .boot_params = 0x00000100, 303 + .atag_offset = 0x100, 304 304 .map_io = ixp4xx_map_io, 305 305 .init_irq = ixp4xx_init_irq, 306 306 .timer = &nslu2_timer,
+1 -1
arch/arm/mach-ixp4xx/vulcan-setup.c
··· 239 239 .map_io = ixp4xx_map_io, 240 240 .init_irq = ixp4xx_init_irq, 241 241 .timer = &ixp4xx_timer, 242 - .boot_params = 0x0100, 242 + .atag_offset = 0x100, 243 243 .init_machine = vulcan_init, 244 244 #if defined(CONFIG_PCI) 245 245 .dma_zone_size = SZ_64M,
+1 -1
arch/arm/mach-ixp4xx/wg302v2-setup.c
··· 100 100 .map_io = ixp4xx_map_io, 101 101 .init_irq = ixp4xx_init_irq, 102 102 .timer = &ixp4xx_timer, 103 - .boot_params = 0x0100, 103 + .atag_offset = 0x100, 104 104 .init_machine = wg302v2_init, 105 105 #if defined(CONFIG_PCI) 106 106 .dma_zone_size = SZ_64M,
+1 -1
arch/arm/mach-kirkwood/d2net_v2-setup.c
··· 221 221 } 222 222 223 223 MACHINE_START(D2NET_V2, "LaCie d2 Network v2") 224 - .boot_params = 0x00000100, 224 + .atag_offset = 0x100, 225 225 .init_machine = d2net_v2_init, 226 226 .map_io = kirkwood_map_io, 227 227 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/db88f6281-bp-setup.c
··· 97 97 98 98 MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board") 99 99 /* Maintainer: Saeed Bishara <saeed@marvell.com> */ 100 - .boot_params = 0x00000100, 100 + .atag_offset = 0x100, 101 101 .init_machine = db88f6281_init, 102 102 .map_io = kirkwood_map_io, 103 103 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/dockstar-setup.c
··· 102 102 } 103 103 104 104 MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar") 105 - .boot_params = 0x00000100, 105 + .atag_offset = 0x100, 106 106 .init_machine = dockstar_init, 107 107 .map_io = kirkwood_map_io, 108 108 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/guruplug-setup.c
··· 121 121 122 122 MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board") 123 123 /* Maintainer: Siddarth Gore <gores@marvell.com> */ 124 - .boot_params = 0x00000100, 124 + .atag_offset = 0x100, 125 125 .init_machine = guruplug_init, 126 126 .map_io = kirkwood_map_io, 127 127 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/include/mach/debug-macro.S
··· 8 8 9 9 #include <mach/bridge-regs.h> 10 10 11 - .macro addruart, rp, rv 11 + .macro addruart, rp, rv, tmp 12 12 ldr \rp, =KIRKWOOD_REGS_PHYS_BASE 13 13 ldr \rv, =KIRKWOOD_REGS_VIRT_BASE 14 14 orr \rp, \rp, #0x00012000
-10
arch/arm/mach-kirkwood/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-kirkwood/include/mach/memory.h 3 - */ 4 - 5 - #ifndef __ASM_ARCH_MEMORY_H 6 - #define __ASM_ARCH_MEMORY_H 7 - 8 - #define PLAT_PHYS_OFFSET UL(0x00000000) 9 - 10 - #endif
+1 -1
arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
··· 163 163 164 164 MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board") 165 165 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ 166 - .boot_params = 0x00000100, 166 + .atag_offset = 0x100, 167 167 .init_machine = mv88f6281gtw_ge_init, 168 168 .map_io = kirkwood_map_io, 169 169 .init_early = kirkwood_init_early,
+3 -3
arch/arm/mach-kirkwood/netspace_v2-setup.c
··· 258 258 259 259 #ifdef CONFIG_MACH_NETSPACE_V2 260 260 MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") 261 - .boot_params = 0x00000100, 261 + .atag_offset = 0x100, 262 262 .init_machine = netspace_v2_init, 263 263 .map_io = kirkwood_map_io, 264 264 .init_early = kirkwood_init_early, ··· 269 269 270 270 #ifdef CONFIG_MACH_INETSPACE_V2 271 271 MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2") 272 - .boot_params = 0x00000100, 272 + .atag_offset = 0x100, 273 273 .init_machine = netspace_v2_init, 274 274 .map_io = kirkwood_map_io, 275 275 .init_early = kirkwood_init_early, ··· 280 280 281 281 #ifdef CONFIG_MACH_NETSPACE_MAX_V2 282 282 MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2") 283 - .boot_params = 0x00000100, 283 + .atag_offset = 0x100, 284 284 .init_machine = netspace_v2_init, 285 285 .map_io = kirkwood_map_io, 286 286 .init_early = kirkwood_init_early,
+2 -2
arch/arm/mach-kirkwood/netxbig_v2-setup.c
··· 399 399 400 400 #ifdef CONFIG_MACH_NET2BIG_V2 401 401 MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") 402 - .boot_params = 0x00000100, 402 + .atag_offset = 0x100, 403 403 .init_machine = netxbig_v2_init, 404 404 .map_io = kirkwood_map_io, 405 405 .init_early = kirkwood_init_early, ··· 410 410 411 411 #ifdef CONFIG_MACH_NET5BIG_V2 412 412 MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") 413 - .boot_params = 0x00000100, 413 + .atag_offset = 0x100, 414 414 .init_machine = netxbig_v2_init, 415 415 .map_io = kirkwood_map_io, 416 416 .init_early = kirkwood_init_early,
+3 -3
arch/arm/mach-kirkwood/openrd-setup.c
··· 214 214 #ifdef CONFIG_MACH_OPENRD_BASE 215 215 MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") 216 216 /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ 217 - .boot_params = 0x00000100, 217 + .atag_offset = 0x100, 218 218 .init_machine = openrd_init, 219 219 .map_io = kirkwood_map_io, 220 220 .init_early = kirkwood_init_early, ··· 226 226 #ifdef CONFIG_MACH_OPENRD_CLIENT 227 227 MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board") 228 228 /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ 229 - .boot_params = 0x00000100, 229 + .atag_offset = 0x100, 230 230 .init_machine = openrd_init, 231 231 .map_io = kirkwood_map_io, 232 232 .init_early = kirkwood_init_early, ··· 238 238 #ifdef CONFIG_MACH_OPENRD_ULTIMATE 239 239 MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board") 240 240 /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ 241 - .boot_params = 0x00000100, 241 + .atag_offset = 0x100, 242 242 .init_machine = openrd_init, 243 243 .map_io = kirkwood_map_io, 244 244 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
··· 79 79 80 80 MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board") 81 81 /* Maintainer: Saeed Bishara <saeed@marvell.com> */ 82 - .boot_params = 0x00000100, 82 + .atag_offset = 0x100, 83 83 .init_machine = rd88f6192_init, 84 84 .map_io = kirkwood_map_io, 85 85 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/rd88f6281-setup.c
··· 115 115 116 116 MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board") 117 117 /* Maintainer: Saeed Bishara <saeed@marvell.com> */ 118 - .boot_params = 0x00000100, 118 + .atag_offset = 0x100, 119 119 .init_machine = rd88f6281_init, 120 120 .map_io = kirkwood_map_io, 121 121 .init_early = kirkwood_init_early,
+2 -2
arch/arm/mach-kirkwood/sheevaplug-setup.c
··· 138 138 #ifdef CONFIG_MACH_SHEEVAPLUG 139 139 MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board") 140 140 /* Maintainer: shadi Ammouri <shadi@marvell.com> */ 141 - .boot_params = 0x00000100, 141 + .atag_offset = 0x100, 142 142 .init_machine = sheevaplug_init, 143 143 .map_io = kirkwood_map_io, 144 144 .init_early = kirkwood_init_early, ··· 149 149 150 150 #ifdef CONFIG_MACH_ESATA_SHEEVAPLUG 151 151 MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board") 152 - .boot_params = 0x00000100, 152 + .atag_offset = 0x100, 153 153 .init_machine = sheevaplug_init, 154 154 .map_io = kirkwood_map_io, 155 155 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/t5325-setup.c
··· 201 201 202 202 MACHINE_START(T5325, "HP t5325 Thin Client") 203 203 /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ 204 - .boot_params = 0x00000100, 204 + .atag_offset = 0x100, 205 205 .init_machine = hp_t5325_init, 206 206 .map_io = kirkwood_map_io, 207 207 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/ts219-setup.c
··· 132 132 133 133 MACHINE_START(TS219, "QNAP TS-119/TS-219") 134 134 /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ 135 - .boot_params = 0x00000100, 135 + .atag_offset = 0x100, 136 136 .init_machine = qnap_ts219_init, 137 137 .map_io = kirkwood_map_io, 138 138 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-kirkwood/ts41x-setup.c
··· 176 176 177 177 MACHINE_START(TS41X, "QNAP TS-41x") 178 178 /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ 179 - .boot_params = 0x00000100, 179 + .atag_offset = 0x100, 180 180 .init_machine = qnap_ts41x_init, 181 181 .map_io = kirkwood_map_io, 182 182 .init_early = kirkwood_init_early,
+1 -1
arch/arm/mach-ks8695/board-acs5k.c
··· 223 223 224 224 MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board") 225 225 /* Maintainer: Simtec Electronics. */ 226 - .boot_params = KS8695_SDRAM_PA + 0x100, 226 + .atag_offset = 0x100, 227 227 .map_io = ks8695_map_io, 228 228 .init_irq = ks8695_init_irq, 229 229 .init_machine = acs5k_init,
+1 -1
arch/arm/mach-ks8695/board-dsm320.c
··· 121 121 122 122 MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player") 123 123 /* Maintainer: Simtec Electronics. */ 124 - .boot_params = KS8695_SDRAM_PA + 0x100, 124 + .atag_offset = 0x100, 125 125 .map_io = ks8695_map_io, 126 126 .init_irq = ks8695_init_irq, 127 127 .init_machine = dsm320_init,
+1 -1
arch/arm/mach-ks8695/board-micrel.c
··· 53 53 54 54 MACHINE_START(KS8695, "KS8695 Centaur Development Board") 55 55 /* Maintainer: Micrel Semiconductor Inc. */ 56 - .boot_params = KS8695_SDRAM_PA + 0x100, 56 + .atag_offset = 0x100, 57 57 .map_io = ks8695_map_io, 58 58 .init_irq = ks8695_init_irq, 59 59 .init_machine = micrel_init,
+1 -1
arch/arm/mach-ks8695/include/mach/debug-macro.S
··· 14 14 #include <mach/hardware.h> 15 15 #include <mach/regs-uart.h> 16 16 17 - .macro addruart, rp, rv 17 + .macro addruart, rp, rv, tmp 18 18 ldr \rp, =KS8695_UART_PA @ physical base address 19 19 ldr \rv, =KS8695_UART_VA @ virtual base address 20 20 .endm
+1 -1
arch/arm/mach-l7200/include/mach/debug-macro.S
··· 14 14 .equ io_virt, IO_BASE 15 15 .equ io_phys, IO_START 16 16 17 - .macro addruart, rp, rv 17 + .macro addruart, rp, rv, tmp 18 18 mov \rp, #0x00044000 @ UART1 19 19 @ mov \rp, #0x00045000 @ UART2 20 20 add \rv, \rp, #io_virt @ virtual address
+1 -1
arch/arm/mach-lpc32xx/include/mach/debug-macro.S
··· 20 20 * Debug output is hardcoded to standard UART 5 21 21 */ 22 22 23 - .macro addruart, rp, rv 23 + .macro addruart, rp, rv, tmp 24 24 ldreq \rp, =0x40090000 25 25 ldrne \rv, =0xF4090000 26 26 .endm
-27
arch/arm/mach-lpc32xx/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-lpc32xx/include/mach/memory.h 3 - * 4 - * Author: Kevin Wells <kevin.wells@nxp.com> 5 - * 6 - * Copyright (C) 2010 NXP Semiconductors 7 - * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License as published by 10 - * the Free Software Foundation; either version 2 of the License, or 11 - * (at your option) any later version. 12 - * 13 - * This program is distributed in the hope that it will be useful, 14 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 - * GNU General Public License for more details. 17 - */ 18 - 19 - #ifndef __ASM_ARCH_MEMORY_H 20 - #define __ASM_ARCH_MEMORY_H 21 - 22 - /* 23 - * Physical DRAM offset of bank 0 24 - */ 25 - #define PLAT_PHYS_OFFSET UL(0x80000000) 26 - 27 - #endif
+1 -1
arch/arm/mach-lpc32xx/phy3250.c
··· 382 382 383 383 MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller") 384 384 /* Maintainer: Kevin Wells, NXP Semiconductors */ 385 - .boot_params = 0x80000100, 385 + .atag_offset = 0x100, 386 386 .map_io = lpc32xx_map_io, 387 387 .init_irq = lpc32xx_init_irq, 388 388 .timer = &lpc32xx_timer,
+1 -1
arch/arm/mach-mmp/include/mach/debug-macro.S
··· 11 11 12 12 #include <mach/addr-map.h> 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 ldr \rp, =APB_PHYS_BASE @ physical 16 16 ldr \rv, =APB_VIRT_BASE @ virtual 17 17 orr \rp, \rp, #0x00017000
-14
arch/arm/mach-mmp/include/mach/memory.h
··· 1 - /* 2 - * linux/arch/arm/mach-mmp/include/mach/memory.h 3 - * 4 - * This program is free software; you can redistribute it and/or modify 5 - * it under the terms of the GNU General Public License version 2 as 6 - * published by the Free Software Foundation. 7 - */ 8 - 9 - #ifndef __ASM_MACH_MEMORY_H 10 - #define __ASM_MACH_MEMORY_H 11 - 12 - #define PLAT_PHYS_OFFSET UL(0x00000000) 13 - 14 - #endif /* __ASM_MACH_MEMORY_H */
+1 -1
arch/arm/mach-msm/board-halibut.c
··· 93 93 } 94 94 95 95 MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") 96 - .boot_params = 0x10000100, 96 + .atag_offset = 0x100, 97 97 .fixup = halibut_fixup, 98 98 .map_io = halibut_map_io, 99 99 .init_irq = halibut_init_irq,
+1 -1
arch/arm/mach-msm/board-mahimahi.c
··· 74 74 extern struct sys_timer msm_timer; 75 75 76 76 MACHINE_START(MAHIMAHI, "mahimahi") 77 - .boot_params = 0x20000100, 77 + .atag_offset = 0x100, 78 78 .fixup = mahimahi_fixup, 79 79 .map_io = mahimahi_map_io, 80 80 .init_irq = msm_init_irq,
+4 -4
arch/arm/mach-msm/board-msm7x27.c
··· 130 130 } 131 131 132 132 MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF") 133 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 133 + .atag_offset = 0x100, 134 134 .map_io = msm7x2x_map_io, 135 135 .init_irq = msm7x2x_init_irq, 136 136 .init_machine = msm7x2x_init, ··· 138 138 MACHINE_END 139 139 140 140 MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA") 141 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 141 + .atag_offset = 0x100, 142 142 .map_io = msm7x2x_map_io, 143 143 .init_irq = msm7x2x_init_irq, 144 144 .init_machine = msm7x2x_init, ··· 146 146 MACHINE_END 147 147 148 148 MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF") 149 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 149 + .atag_offset = 0x100, 150 150 .map_io = msm7x2x_map_io, 151 151 .init_irq = msm7x2x_init_irq, 152 152 .init_machine = msm7x2x_init, ··· 154 154 MACHINE_END 155 155 156 156 MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA") 157 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 157 + .atag_offset = 0x100, 158 158 .map_io = msm7x2x_map_io, 159 159 .init_irq = msm7x2x_init_irq, 160 160 .init_machine = msm7x2x_init,
+25 -3
arch/arm/mach-msm/board-msm7x30.c
··· 24 24 #include <linux/smsc911x.h> 25 25 #include <linux/usb/msm_hsusb.h> 26 26 #include <linux/clkdev.h> 27 + #include <linux/memblock.h> 27 28 28 29 #include <asm/mach-types.h> 29 30 #include <asm/mach/arch.h> ··· 42 41 #include "proc_comm.h" 43 42 44 43 extern struct sys_timer msm_timer; 44 + 45 + static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag, 46 + char **cmdline, struct meminfo *mi) 47 + { 48 + for (; tag->hdr.size; tag = tag_next(tag)) 49 + if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { 50 + tag->u.mem.start = 0; 51 + tag->u.mem.size += SZ_2M; 52 + } 53 + } 54 + 55 + static void __init msm7x30_reserve(void) 56 + { 57 + memblock_remove(0x0, SZ_2M); 58 + } 45 59 46 60 static int hsusb_phy_init_seq[] = { 47 61 0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */ ··· 122 106 } 123 107 124 108 MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") 125 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 109 + .atag_offset = 0x100, 110 + .fixup = msm7x30_fixup, 111 + .reserve = msm7x30_reserve, 126 112 .map_io = msm7x30_map_io, 127 113 .init_irq = msm7x30_init_irq, 128 114 .init_machine = msm7x30_init, ··· 132 114 MACHINE_END 133 115 134 116 MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") 135 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 117 + .atag_offset = 0x100, 118 + .fixup = msm7x30_fixup, 119 + .reserve = msm7x30_reserve, 136 120 .map_io = msm7x30_map_io, 137 121 .init_irq = msm7x30_init_irq, 138 122 .init_machine = msm7x30_init, ··· 142 122 MACHINE_END 143 123 144 124 MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") 145 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 125 + .atag_offset = 0x100, 126 + .fixup = msm7x30_fixup, 127 + .reserve = msm7x30_reserve, 146 128 .map_io = msm7x30_map_io, 147 129 .init_irq = msm7x30_init_irq, 148 130 .init_machine = msm7x30_init,
+22
arch/arm/mach-msm/board-msm8960.c
··· 20 20 #include <linux/io.h> 21 21 #include <linux/irq.h> 22 22 #include <linux/clkdev.h> 23 + #include <linux/memblock.h> 23 24 24 25 #include <asm/mach-types.h> 25 26 #include <asm/mach/arch.h> 26 27 #include <asm/hardware/gic.h> 28 + #include <asm/setup.h> 27 29 28 30 #include <mach/board.h> 29 31 #include <mach/msm_iomap.h> 30 32 31 33 #include "devices.h" 34 + 35 + static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag, 36 + char **cmdline, struct meminfo *mi) 37 + { 38 + for (; tag->hdr.size; tag = tag_next(tag)) 39 + if (tag->hdr.tag == ATAG_MEM && 40 + tag->u.mem.start == 0x40200000) { 41 + tag->u.mem.start = 0x40000000; 42 + tag->u.mem.size += SZ_2M; 43 + } 44 + } 45 + 46 + static void __init msm8960_reserve(void) 47 + { 48 + memblock_remove(0x40000000, SZ_2M); 49 + } 32 50 33 51 static void __init msm8960_map_io(void) 34 52 { ··· 94 76 } 95 77 96 78 MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") 79 + .fixup = msm8960_fixup, 80 + .reserve = msm8960_reserve, 97 81 .map_io = msm8960_map_io, 98 82 .init_irq = msm8960_init_irq, 99 83 .timer = &msm_timer, ··· 103 83 MACHINE_END 104 84 105 85 MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3") 86 + .fixup = msm8960_fixup, 87 + .reserve = msm8960_reserve, 106 88 .map_io = msm8960_map_io, 107 89 .init_irq = msm8960_init_irq, 108 90 .timer = &msm_timer,
+25
arch/arm/mach-msm/board-msm8x60.c
··· 20 20 #include <linux/platform_device.h> 21 21 #include <linux/io.h> 22 22 #include <linux/irq.h> 23 + #include <linux/memblock.h> 23 24 24 25 #include <asm/mach-types.h> 25 26 #include <asm/mach/arch.h> 26 27 #include <asm/hardware/gic.h> 28 + #include <asm/setup.h> 27 29 28 30 #include <mach/board.h> 29 31 #include <mach/msm_iomap.h> 30 32 33 + static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag, 34 + char **cmdline, struct meminfo *mi) 35 + { 36 + for (; tag->hdr.size; tag = tag_next(tag)) 37 + if (tag->hdr.tag == ATAG_MEM && 38 + tag->u.mem.start == 0x40200000) { 39 + tag->u.mem.start = 0x40000000; 40 + tag->u.mem.size += SZ_2M; 41 + } 42 + } 43 + 44 + static void __init msm8x60_reserve(void) 45 + { 46 + memblock_remove(0x40000000, SZ_2M); 47 + } 31 48 32 49 static void __init msm8x60_map_io(void) 33 50 { ··· 82 65 } 83 66 84 67 MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") 68 + .fixup = msm8x60_fixup, 69 + .reserve = msm8x60_reserve, 85 70 .map_io = msm8x60_map_io, 86 71 .init_irq = msm8x60_init_irq, 87 72 .init_machine = msm8x60_init, ··· 91 72 MACHINE_END 92 73 93 74 MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") 75 + .fixup = msm8x60_fixup, 76 + .reserve = msm8x60_reserve, 94 77 .map_io = msm8x60_map_io, 95 78 .init_irq = msm8x60_init_irq, 96 79 .init_machine = msm8x60_init, ··· 100 79 MACHINE_END 101 80 102 81 MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") 82 + .fixup = msm8x60_fixup, 83 + .reserve = msm8x60_reserve, 103 84 .map_io = msm8x60_map_io, 104 85 .init_irq = msm8x60_init_irq, 105 86 .init_machine = msm8x60_init, ··· 109 86 MACHINE_END 110 87 111 88 MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") 89 + .fixup = msm8x60_fixup, 90 + .reserve = msm8x60_reserve, 112 91 .map_io = msm8x60_map_io, 113 92 .init_irq = msm8x60_init_irq, 114 93 .init_machine = msm8x60_init,
+2 -2
arch/arm/mach-msm/board-qsd8x50.c
··· 193 193 } 194 194 195 195 MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF") 196 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 196 + .atag_offset = 0x100, 197 197 .map_io = qsd8x50_map_io, 198 198 .init_irq = qsd8x50_init_irq, 199 199 .init_machine = qsd8x50_init, ··· 201 201 MACHINE_END 202 202 203 203 MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5") 204 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 204 + .atag_offset = 0x100, 205 205 .map_io = qsd8x50_map_io, 206 206 .init_irq = qsd8x50_init_irq, 207 207 .init_machine = qsd8x50_init,
+1 -1
arch/arm/mach-msm/board-sapphire.c
··· 105 105 106 106 MACHINE_START(SAPPHIRE, "sapphire") 107 107 /* Maintainer: Brian Swetland <swetland@google.com> */ 108 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 108 + .atag_offset = 0x100, 109 109 .fixup = sapphire_fixup, 110 110 .map_io = sapphire_map_io, 111 111 .init_irq = sapphire_init_irq,
+1 -1
arch/arm/mach-msm/board-trout.c
··· 93 93 } 94 94 95 95 MACHINE_START(TROUT, "HTC Dream") 96 - .boot_params = 0x10000100, 96 + .atag_offset = 0x100, 97 97 .fixup = trout_fixup, 98 98 .map_io = trout_map_io, 99 99 .init_irq = trout_init_irq,
+2 -2
arch/arm/mach-msm/include/mach/debug-macro.S
··· 20 20 #include <mach/msm_iomap.h> 21 21 22 22 #if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) 23 - .macro addruart, rp, rv 23 + .macro addruart, rp, rv, tmp 24 24 ldr \rp, =MSM_DEBUG_UART_PHYS 25 25 ldr \rv, =MSM_DEBUG_UART_BASE 26 26 .endm ··· 37 37 beq 1001b 38 38 .endm 39 39 #else 40 - .macro addruart, rp, rv 40 + .macro addruart, rp, rv, tmp 41 41 mov \rv, #0xff000000 42 42 orr \rv, \rv, #0x00f00000 43 43 .endm
-35
arch/arm/mach-msm/include/mach/memory.h
··· 1 - /* arch/arm/mach-msm/include/mach/memory.h 2 - * 3 - * Copyright (C) 2007 Google, Inc. 4 - * 5 - * This software is licensed under the terms of the GNU General Public 6 - * License version 2, as published by the Free Software Foundation, and 7 - * may be copied, distributed, and modified under those terms. 8 - * 9 - * This program is distributed in the hope that it will be useful, 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 - * GNU General Public License for more details. 13 - * 14 - */ 15 - 16 - #ifndef __ASM_ARCH_MEMORY_H 17 - #define __ASM_ARCH_MEMORY_H 18 - 19 - /* physical offset of RAM */ 20 - #if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A) 21 - #define PLAT_PHYS_OFFSET UL(0x00000000) 22 - #elif defined(CONFIG_ARCH_QSD8X50) 23 - #define PLAT_PHYS_OFFSET UL(0x20000000) 24 - #elif defined(CONFIG_ARCH_MSM7X30) 25 - #define PLAT_PHYS_OFFSET UL(0x00200000) 26 - #elif defined(CONFIG_ARCH_MSM8X60) 27 - #define PLAT_PHYS_OFFSET UL(0x40200000) 28 - #elif defined(CONFIG_ARCH_MSM8960) 29 - #define PLAT_PHYS_OFFSET UL(0x40200000) 30 - #else 31 - #define PLAT_PHYS_OFFSET UL(0x10000000) 32 - #endif 33 - 34 - #endif 35 -
+1 -1
arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
··· 145 145 146 146 MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL") 147 147 /* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */ 148 - .boot_params = 0x00000100, 148 + .atag_offset = 0x100, 149 149 .init_machine = wxl_init, 150 150 .map_io = mv78xx0_map_io, 151 151 .init_early = mv78xx0_init_early,
+1 -1
arch/arm/mach-mv78xx0/db78x00-bp-setup.c
··· 93 93 94 94 MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board") 95 95 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ 96 - .boot_params = 0x00000100, 96 + .atag_offset = 0x100, 97 97 .init_machine = db78x00_init, 98 98 .map_io = mv78xx0_map_io, 99 99 .init_early = mv78xx0_init_early,
+1 -1
arch/arm/mach-mv78xx0/include/mach/debug-macro.S
··· 8 8 9 9 #include <mach/mv78xx0.h> 10 10 11 - .macro addruart, rp, rv 11 + .macro addruart, rp, rv, tmp 12 12 ldr \rp, =MV78XX0_REGS_PHYS_BASE 13 13 ldr \rv, =MV78XX0_REGS_VIRT_BASE 14 14 orr \rp, \rp, #0x00012000
-10
arch/arm/mach-mv78xx0/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-mv78xx0/include/mach/memory.h 3 - */ 4 - 5 - #ifndef __ASM_ARCH_MEMORY_H 6 - #define __ASM_ARCH_MEMORY_H 7 - 8 - #define PLAT_PHYS_OFFSET UL(0x00000000) 9 - 10 - #endif
+1 -1
arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
··· 78 78 79 79 MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") 80 80 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ 81 - .boot_params = 0x00000100, 81 + .atag_offset = 0x100, 82 82 .init_machine = rd78x00_masa_init, 83 83 .map_io = mv78xx0_map_io, 84 84 .init_early = mv78xx0_init_early,
+1 -1
arch/arm/mach-mx5/board-cpuimx51.c
··· 293 293 294 294 MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module") 295 295 /* Maintainer: Eric Bénard <eric@eukrea.com> */ 296 - .boot_params = MX51_PHYS_OFFSET + 0x100, 296 + .atag_offset = 0x100, 297 297 .map_io = mx51_map_io, 298 298 .init_early = imx51_init_early, 299 299 .init_irq = mx51_init_irq,
+1 -1
arch/arm/mach-mx5/board-cpuimx51sd.c
··· 331 331 332 332 MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD") 333 333 /* Maintainer: Eric Bénard <eric@eukrea.com> */ 334 - .boot_params = MX51_PHYS_OFFSET + 0x100, 334 + .atag_offset = 0x100, 335 335 .map_io = mx51_map_io, 336 336 .init_early = imx51_init_early, 337 337 .init_irq = mx51_init_irq,
+1 -1
arch/arm/mach-mx5/board-mx51_3ds.c
··· 169 169 170 170 MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board") 171 171 /* Maintainer: Freescale Semiconductor, Inc. */ 172 - .boot_params = MX51_PHYS_OFFSET + 0x100, 172 + .atag_offset = 0x100, 173 173 .map_io = mx51_map_io, 174 174 .init_early = imx51_init_early, 175 175 .init_irq = mx51_init_irq,
+1 -1
arch/arm/mach-mx5/board-mx51_babbage.c
··· 416 416 417 417 MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board") 418 418 /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */ 419 - .boot_params = MX51_PHYS_OFFSET + 0x100, 419 + .atag_offset = 0x100, 420 420 .map_io = mx51_map_io, 421 421 .init_early = imx51_init_early, 422 422 .init_irq = mx51_init_irq,
+1 -1
arch/arm/mach-mx5/board-mx51_efikamx.c
··· 280 280 281 281 MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop") 282 282 /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */ 283 - .boot_params = MX51_PHYS_OFFSET + 0x100, 283 + .atag_offset = 0x100, 284 284 .map_io = mx51_map_io, 285 285 .init_early = imx51_init_early, 286 286 .init_irq = mx51_init_irq,
+1 -1
arch/arm/mach-mx5/board-mx51_efikasb.c
··· 266 266 }; 267 267 268 268 MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook") 269 - .boot_params = MX51_PHYS_OFFSET + 0x100, 269 + .atag_offset = 0x100, 270 270 .map_io = mx51_map_io, 271 271 .init_early = imx51_init_early, 272 272 .init_irq = mx51_init_irq,
+1 -1
arch/arm/mach-mxs/include/mach/debug-macro.S
··· 30 30 31 31 #define UART_VADDR MXS_IO_ADDRESS(UART_PADDR) 32 32 33 - .macro addruart, rp, rv 33 + .macro addruart, rp, rv, tmp 34 34 ldr \rp, =UART_PADDR @ physical 35 35 ldr \rv, =UART_VADDR @ virtual 36 36 .endm
-24
arch/arm/mach-mxs/include/mach/memory.h
··· 1 - /* 2 - * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. 3 - * 4 - * This program is free software; you can redistribute it and/or modify 5 - * it under the terms of the GNU General Public License as published by 6 - * the Free Software Foundation; either version 2 of the License, or 7 - * (at your option) any later version. 8 - * 9 - * This program is distributed in the hope that it will be useful, 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 - * GNU General Public License for more details. 13 - * 14 - * You should have received a copy of the GNU General Public License along 15 - * with this program; if not, write to the Free Software Foundation, Inc., 16 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 17 - */ 18 - 19 - #ifndef __MACH_MXS_MEMORY_H__ 20 - #define __MACH_MXS_MEMORY_H__ 21 - 22 - #define PHYS_OFFSET UL(0x40000000) 23 - 24 - #endif /* __MACH_MXS_MEMORY_H__ */
+1 -1
arch/arm/mach-netx/include/mach/debug-macro.S
··· 13 13 14 14 #include "hardware.h" 15 15 16 - .macro addruart, rp, rv 16 + .macro addruart, rp, rv, tmp 17 17 mov \rp, #0x00000a00 18 18 orr \rv, \rp, #io_p2v(0x00100000) @ virtual 19 19 orr \rp, \rp, #0x00100000 @ physical
-26
arch/arm/mach-netx/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-netx/include/mach/memory.h 3 - * 4 - * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License version 2 8 - * as published by the Free Software Foundation. 9 - * 10 - * This program is distributed in the hope that it will be useful, 11 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 - * GNU General Public License for more details. 14 - * 15 - * You should have received a copy of the GNU General Public License 16 - * along with this program; if not, write to the Free Software 17 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 - */ 19 - 20 - #ifndef __ASM_ARCH_MEMORY_H 21 - #define __ASM_ARCH_MEMORY_H 22 - 23 - #define PLAT_PHYS_OFFSET UL(0x80000000) 24 - 25 - #endif 26 -
+1 -1
arch/arm/mach-netx/nxdb500.c
··· 200 200 } 201 201 202 202 MACHINE_START(NXDB500, "Hilscher nxdb500") 203 - .boot_params = 0x80000100, 203 + .atag_offset = 0x100, 204 204 .map_io = netx_map_io, 205 205 .init_irq = netx_init_irq, 206 206 .timer = &netx_timer,
+1 -1
arch/arm/mach-netx/nxdkn.c
··· 93 93 } 94 94 95 95 MACHINE_START(NXDKN, "Hilscher nxdkn") 96 - .boot_params = 0x80000100, 96 + .atag_offset = 0x100, 97 97 .map_io = netx_map_io, 98 98 .init_irq = netx_init_irq, 99 99 .timer = &netx_timer,
+1 -1
arch/arm/mach-netx/nxeb500hmi.c
··· 177 177 } 178 178 179 179 MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi") 180 - .boot_params = 0x80000100, 180 + .atag_offset = 0x100, 181 181 .map_io = netx_map_io, 182 182 .init_irq = netx_init_irq, 183 183 .timer = &netx_timer,
+1 -1
arch/arm/mach-nomadik/board-nhk8815.c
··· 276 276 277 277 MACHINE_START(NOMADIK, "NHK8815") 278 278 /* Maintainer: ST MicroElectronics */ 279 - .boot_params = 0x100, 279 + .atag_offset = 0x100, 280 280 .map_io = cpu8815_map_io, 281 281 .init_irq = cpu8815_init_irq, 282 282 .timer = &nomadik_timer,
+1 -1
arch/arm/mach-nomadik/include/mach/debug-macro.S
··· 10 10 * 11 11 */ 12 12 13 - .macro addruart, rp, rv 13 + .macro addruart, rp, rv, tmp 14 14 mov \rp, #0x00100000 15 15 add \rp, \rp, #0x000fb000 16 16 add \rv, \rp, #0xf0000000 @ virtual base
-28
arch/arm/mach-nomadik/include/mach/memory.h
··· 1 - /* 2 - * mach-nomadik/include/mach/memory.h 3 - * 4 - * Copyright (C) 1999 ARM Limited 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - * 16 - * You should have received a copy of the GNU General Public License 17 - * along with this program; if not, write to the Free Software 18 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 - */ 20 - #ifndef __ASM_ARCH_MEMORY_H 21 - #define __ASM_ARCH_MEMORY_H 22 - 23 - /* 24 - * Physical DRAM offset. 25 - */ 26 - #define PLAT_PHYS_OFFSET UL(0x00000000) 27 - 28 - #endif
-21
arch/arm/mach-nuc93x/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-nuc93x/include/mach/memory.h 3 - * 4 - * Copyright (c) 2008 Nuvoton technology corporation 5 - * All rights reserved. 6 - * 7 - * Wan ZongShun <mcuos.com@gmail.com> 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License as published by 11 - * the Free Software Foundation; either version 2 of the License, or 12 - * (at your option) any later version. 13 - * 14 - */ 15 - 16 - #ifndef __ASM_ARCH_MEMORY_H 17 - #define __ASM_ARCH_MEMORY_H 18 - 19 - #define PLAT_PHYS_OFFSET UL(0x00000000) 20 - 21 - #endif
-1
arch/arm/mach-nuc93x/mach-nuc932evb.c
··· 35 35 36 36 MACHINE_START(NUC932EVB, "NUC932EVB") 37 37 /* Maintainer: Wan ZongShun */ 38 - .boot_params = 0, 39 38 .map_io = nuc932evb_map_io, 40 39 .init_irq = nuc93x_init_irq, 41 40 .init_machine = nuc932evb_init,
+1 -1
arch/arm/mach-omap1/board-ams-delta.c
··· 375 375 376 376 MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") 377 377 /* Maintainer: Jonathan McDowell <noodles@earth.li> */ 378 - .boot_params = 0x10000100, 378 + .atag_offset = 0x100, 379 379 .map_io = omap15xx_map_io, 380 380 .init_early = omap1_init_early, 381 381 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-fsample.c
··· 384 384 385 385 MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") 386 386 /* Maintainer: Brian Swetland <swetland@google.com> */ 387 - .boot_params = 0x10000100, 387 + .atag_offset = 0x100, 388 388 .map_io = omap_fsample_map_io, 389 389 .init_early = omap1_init_early, 390 390 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-generic.c
··· 83 83 84 84 MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") 85 85 /* Maintainer: Tony Lindgren <tony@atomide.com> */ 86 - .boot_params = 0x10000100, 86 + .atag_offset = 0x100, 87 87 .map_io = omap16xx_map_io, 88 88 .init_early = omap1_init_early, 89 89 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-h2.c
··· 450 450 451 451 MACHINE_START(OMAP_H2, "TI-H2") 452 452 /* Maintainer: Imre Deak <imre.deak@nokia.com> */ 453 - .boot_params = 0x10000100, 453 + .atag_offset = 0x100, 454 454 .map_io = omap16xx_map_io, 455 455 .init_early = omap1_init_early, 456 456 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-h3.c
··· 438 438 439 439 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") 440 440 /* Maintainer: Texas Instruments, Inc. */ 441 - .boot_params = 0x10000100, 441 + .atag_offset = 0x100, 442 442 .map_io = omap16xx_map_io, 443 443 .init_early = omap1_init_early, 444 444 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-htcherald.c
··· 604 604 MACHINE_START(HERALD, "HTC Herald") 605 605 /* Maintainer: Cory Maccarrone <darkstar6262@gmail.com> */ 606 606 /* Maintainer: wing-linux.sourceforge.net */ 607 - .boot_params = 0x10000100, 607 + .atag_offset = 0x100, 608 608 .map_io = htcherald_map_io, 609 609 .init_early = omap1_init_early, 610 610 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-innovator.c
··· 454 454 455 455 MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") 456 456 /* Maintainer: MontaVista Software, Inc. */ 457 - .boot_params = 0x10000100, 457 + .atag_offset = 0x100, 458 458 .map_io = innovator_map_io, 459 459 .init_early = omap1_init_early, 460 460 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-nokia770.c
··· 253 253 } 254 254 255 255 MACHINE_START(NOKIA770, "Nokia 770") 256 - .boot_params = 0x10000100, 256 + .atag_offset = 0x100, 257 257 .map_io = omap16xx_map_io, 258 258 .init_early = omap1_init_early, 259 259 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-osk.c
··· 572 572 573 573 MACHINE_START(OMAP_OSK, "TI-OSK") 574 574 /* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */ 575 - .boot_params = 0x10000100, 575 + .atag_offset = 0x100, 576 576 .map_io = omap16xx_map_io, 577 577 .init_early = omap1_init_early, 578 578 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-palmte.c
··· 264 264 } 265 265 266 266 MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") 267 - .boot_params = 0x10000100, 267 + .atag_offset = 0x100, 268 268 .map_io = omap15xx_map_io, 269 269 .init_early = omap1_init_early, 270 270 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-palmtt.c
··· 310 310 } 311 311 312 312 MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") 313 - .boot_params = 0x10000100, 313 + .atag_offset = 0x100, 314 314 .map_io = omap15xx_map_io, 315 315 .init_early = omap1_init_early, 316 316 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-palmz71.c
··· 328 328 } 329 329 330 330 MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") 331 - .boot_params = 0x10000100, 331 + .atag_offset = 0x100, 332 332 .map_io = omap15xx_map_io, 333 333 .init_early = omap1_init_early, 334 334 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-perseus2.c
··· 346 346 347 347 MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") 348 348 /* Maintainer: Kevin Hilman <kjh@hilman.org> */ 349 - .boot_params = 0x10000100, 349 + .atag_offset = 0x100, 350 350 .map_io = omap_perseus2_map_io, 351 351 .init_early = omap1_init_early, 352 352 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-sx1.c
··· 409 409 } 410 410 411 411 MACHINE_START(SX1, "OMAP310 based Siemens SX1") 412 - .boot_params = 0x10000100, 412 + .atag_offset = 0x100, 413 413 .map_io = omap15xx_map_io, 414 414 .init_early = omap1_init_early, 415 415 .reserve = omap_reserve,
+1 -1
arch/arm/mach-omap1/board-voiceblue.c
··· 290 290 291 291 MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") 292 292 /* Maintainer: Ladislav Michl <michl@2n.cz> */ 293 - .boot_params = 0x10000100, 293 + .atag_offset = 0x100, 294 294 .map_io = omap15xx_map_io, 295 295 .init_early = omap1_init_early, 296 296 .reserve = omap_reserve,
+21 -27
arch/arm/mach-omap1/include/mach/debug-macro.S
··· 13 13 14 14 #include <linux/serial_reg.h> 15 15 16 - #include <asm/memory.h> 17 - 18 16 #include <plat/serial.h> 19 - 20 - #define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) 21 - #define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) 22 17 23 18 .pushsection .data 24 19 omap_uart_phys: .word 0x0 ··· 26 31 * the desired UART phys and virt addresses temporarily into 27 32 * the omap_uart_phys and omap_uart_virt above. 28 33 */ 29 - .macro addruart, rp, rv 34 + .macro addruart, rp, rv, tmp 30 35 31 36 /* Use omap_uart_phys/virt if already configured */ 32 - 9: mrc p15, 0, \rp, c1, c0 33 - tst \rp, #1 @ MMU enabled? 34 - ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled 35 - ldrne \rp, =omap_uart_phys @ MMU enabled 36 - add \rv, \rp, #4 @ omap_uart_virt 37 - ldr \rp, [\rp, #0] 38 - ldr \rv, [\rv, #0] 37 + 9: adr \rp, 99f @ get effective addr of 99f 38 + ldr \rv, [\rp] @ get absolute addr of 99f 39 + sub \rv, \rv, \rp @ offset between the two 40 + ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys 41 + sub \tmp, \rp, \rv @ make it effective 42 + ldr \rp, [\tmp, #0] @ omap_uart_phys 43 + ldr \rv, [\tmp, #4] @ omap_uart_virt 39 44 cmp \rp, #0 @ is port configured? 40 45 cmpne \rv, #0 41 - bne 99f @ already configured 46 + bne 100f @ already configured 42 47 43 48 /* Check the debug UART configuration set in uncompress.h */ 44 - mrc p15, 0, \rp, c1, c0 45 - tst \rp, #1 @ MMU enabled? 46 - ldreq \rp, =OMAP_UART_INFO @ MMU not enabled 47 - ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled 48 - ldr \rp, [\rp, #0] 49 + and \rp, pc, #0xff000000 50 + ldr \rv, =OMAP_UART_INFO_OFS 51 + ldr \rp, [\rp, \rv] 49 52 50 53 /* Select the UART to use based on the UART1 scratchpad value */ 51 54 10: cmp \rp, #0 @ no port configured? ··· 67 74 68 75 /* Store both phys and virt address for the uart */ 69 76 98: add \rp, \rp, #0xff000000 @ phys base 70 - mrc p15, 0, \rv, c1, c0 71 - tst \rv, #1 @ MMU enabled? 72 - ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled 73 - ldrne \rv, =omap_uart_phys @ MMU enabled 74 - str \rp, [\rv, #0] 77 + str \rp, [\tmp, #0] @ omap_uart_phys 75 78 sub \rp, \rp, #0xff000000 @ phys base 76 79 add \rp, \rp, #0xfe000000 @ virt base 77 - add \rv, \rv, #4 @ omap_uart_lsr 78 - str \rp, [\rv, #0] 80 + str \rp, [\tmp, #4] @ omap_uart_virt 79 81 b 9b 80 - 99: 82 + 83 + .align 84 + 99: .word . 85 + .word omap_uart_phys 86 + .ltorg 87 + 88 + 100: 81 89 .endm 82 90 83 91 .macro senduart,rd,rx
+52 -1
arch/arm/mach-omap1/include/mach/memory.h
··· 2 2 * arch/arm/mach-omap1/include/mach/memory.h 3 3 */ 4 4 5 - #include <plat/memory.h> 5 + #ifndef __ASM_ARCH_MEMORY_H 6 + #define __ASM_ARCH_MEMORY_H 7 + 8 + /* 9 + * Physical DRAM offset. 10 + */ 11 + #define PLAT_PHYS_OFFSET UL(0x10000000) 12 + 13 + /* 14 + * Bus address is physical address, except for OMAP-1510 Local Bus. 15 + * OMAP-1510 bus address is translated into a Local Bus address if the 16 + * OMAP bus type is lbus. We do the address translation based on the 17 + * device overriding the defaults used in the dma-mapping API. 18 + * Note that the is_lbus_device() test is not very efficient on 1510 19 + * because of the strncmp(). 20 + */ 21 + #ifdef CONFIG_ARCH_OMAP15XX 22 + 23 + /* 24 + * OMAP-1510 Local Bus address offset 25 + */ 26 + #define OMAP1510_LB_OFFSET UL(0x30000000) 27 + 28 + #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) 29 + #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) 30 + #define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) 31 + 32 + #define __arch_pfn_to_dma(dev, pfn) \ 33 + ({ dma_addr_t __dma = __pfn_to_phys(pfn); \ 34 + if (is_lbus_device(dev)) \ 35 + __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ 36 + __dma; }) 37 + 38 + #define __arch_dma_to_pfn(dev, addr) \ 39 + ({ dma_addr_t __dma = addr; \ 40 + if (is_lbus_device(dev)) \ 41 + __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ 42 + __phys_to_pfn(__dma); \ 43 + }) 44 + 45 + #define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ 46 + lbus_to_virt(addr) : \ 47 + __phys_to_virt(addr)); }) 48 + 49 + #define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ 50 + (dma_addr_t) (is_lbus_device(dev) ? \ 51 + virt_to_lbus(__addr) : \ 52 + __virt_to_phys(__addr)); }) 53 + 54 + #endif /* CONFIG_ARCH_OMAP15XX */ 55 + 56 + #endif
+1
arch/arm/mach-omap1/io.c
··· 133 133 */ 134 134 omap1_clk_init(); 135 135 omap1_mux_init(); 136 + omap_init_consistent_dma_size(); 136 137 } 137 138 138 139 /*
+1 -1
arch/arm/mach-omap2/board-2430sdp.c
··· 246 246 247 247 MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") 248 248 /* Maintainer: Syed Khasim - Texas Instruments Inc */ 249 - .boot_params = 0x80000100, 249 + .atag_offset = 0x100, 250 250 .reserve = omap_reserve, 251 251 .map_io = omap243x_map_io, 252 252 .init_early = omap2430_init_early,
+1 -1
arch/arm/mach-omap2/board-3430sdp.c
··· 724 724 725 725 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") 726 726 /* Maintainer: Syed Khasim - Texas Instruments Inc */ 727 - .boot_params = 0x80000100, 727 + .atag_offset = 0x100, 728 728 .reserve = omap_reserve, 729 729 .map_io = omap3_map_io, 730 730 .init_early = omap3430_init_early,
+1 -1
arch/arm/mach-omap2/board-3630sdp.c
··· 210 210 } 211 211 212 212 MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") 213 - .boot_params = 0x80000100, 213 + .atag_offset = 0x100, 214 214 .reserve = omap_reserve, 215 215 .map_io = omap3_map_io, 216 216 .init_early = omap3630_init_early,
+1 -1
arch/arm/mach-omap2/board-4430sdp.c
··· 827 827 828 828 MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") 829 829 /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */ 830 - .boot_params = 0x80000100, 830 + .atag_offset = 0x100, 831 831 .reserve = omap_reserve, 832 832 .map_io = omap4_map_io, 833 833 .init_early = omap4430_init_early,
+1 -1
arch/arm/mach-omap2/board-am3517crane.c
··· 93 93 } 94 94 95 95 MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") 96 - .boot_params = 0x80000100, 96 + .atag_offset = 0x100, 97 97 .reserve = omap_reserve, 98 98 .map_io = omap3_map_io, 99 99 .init_early = am35xx_init_early,
+1 -1
arch/arm/mach-omap2/board-am3517evm.c
··· 486 486 } 487 487 488 488 MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") 489 - .boot_params = 0x80000100, 489 + .atag_offset = 0x100, 490 490 .reserve = omap_reserve, 491 491 .map_io = omap3_map_io, 492 492 .init_early = am35xx_init_early,
+1 -1
arch/arm/mach-omap2/board-apollon.c
··· 339 339 340 340 MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") 341 341 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ 342 - .boot_params = 0x80000100, 342 + .atag_offset = 0x100, 343 343 .reserve = omap_reserve, 344 344 .map_io = omap242x_map_io, 345 345 .init_early = omap2420_init_early,
+2 -2
arch/arm/mach-omap2/board-cm-t35.c
··· 629 629 } 630 630 631 631 MACHINE_START(CM_T35, "Compulab CM-T35") 632 - .boot_params = 0x80000100, 632 + .atag_offset = 0x100, 633 633 .reserve = omap_reserve, 634 634 .map_io = omap3_map_io, 635 635 .init_early = omap35xx_init_early, ··· 639 639 MACHINE_END 640 640 641 641 MACHINE_START(CM_T3730, "Compulab CM-T3730") 642 - .boot_params = 0x80000100, 642 + .atag_offset = 0x100, 643 643 .reserve = omap_reserve, 644 644 .map_io = omap3_map_io, 645 645 .init_early = omap3630_init_early,
+1 -1
arch/arm/mach-omap2/board-cm-t3517.c
··· 294 294 } 295 295 296 296 MACHINE_START(CM_T3517, "Compulab CM-T3517") 297 - .boot_params = 0x80000100, 297 + .atag_offset = 0x100, 298 298 .reserve = omap_reserve, 299 299 .map_io = omap3_map_io, 300 300 .init_early = am35xx_init_early,
+1 -1
arch/arm/mach-omap2/board-devkit8000.c
··· 656 656 } 657 657 658 658 MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") 659 - .boot_params = 0x80000100, 659 + .atag_offset = 0x100, 660 660 .reserve = omap_reserve, 661 661 .map_io = omap3_map_io, 662 662 .init_early = omap35xx_init_early,
+4
arch/arm/mach-omap2/board-generic.c
··· 92 92 }; 93 93 94 94 DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") 95 + .atag_offset = 0x100, 95 96 .reserve = omap_reserve, 96 97 .map_io = omap242x_map_io, 97 98 .init_early = omap2420_init_early, ··· 110 109 }; 111 110 112 111 DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") 112 + .atag_offset = 0x100, 113 113 .reserve = omap_reserve, 114 114 .map_io = omap243x_map_io, 115 115 .init_early = omap2430_init_early, ··· 128 126 }; 129 127 130 128 DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") 129 + .atag_offset = 0x100, 131 130 .reserve = omap_reserve, 132 131 .map_io = omap3_map_io, 133 132 .init_early = omap3430_init_early, ··· 146 143 }; 147 144 148 145 DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") 146 + .atag_offset = 0x100, 149 147 .reserve = omap_reserve, 150 148 .map_io = omap4_map_io, 151 149 .init_early = omap4430_init_early,
+1 -1
arch/arm/mach-omap2/board-h4.c
··· 366 366 367 367 MACHINE_START(OMAP_H4, "OMAP2420 H4 board") 368 368 /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ 369 - .boot_params = 0x80000100, 369 + .atag_offset = 0x100, 370 370 .reserve = omap_reserve, 371 371 .map_io = omap242x_map_io, 372 372 .init_early = omap2420_init_early,
+2 -2
arch/arm/mach-omap2/board-igep0020.c
··· 667 667 } 668 668 669 669 MACHINE_START(IGEP0020, "IGEP v2 board") 670 - .boot_params = 0x80000100, 670 + .atag_offset = 0x100, 671 671 .reserve = omap_reserve, 672 672 .map_io = omap3_map_io, 673 673 .init_early = omap35xx_init_early, ··· 677 677 MACHINE_END 678 678 679 679 MACHINE_START(IGEP0030, "IGEP OMAP3 module") 680 - .boot_params = 0x80000100, 680 + .atag_offset = 0x100, 681 681 .reserve = omap_reserve, 682 682 .map_io = omap3_map_io, 683 683 .init_early = omap35xx_init_early,
+1 -1
arch/arm/mach-omap2/board-ldp.c
··· 328 328 } 329 329 330 330 MACHINE_START(OMAP_LDP, "OMAP LDP board") 331 - .boot_params = 0x80000100, 331 + .atag_offset = 0x100, 332 332 .reserve = omap_reserve, 333 333 .map_io = omap3_map_io, 334 334 .init_early = omap3430_init_early,
+3 -3
arch/arm/mach-omap2/board-n8x0.c
··· 684 684 } 685 685 686 686 MACHINE_START(NOKIA_N800, "Nokia N800") 687 - .boot_params = 0x80000100, 687 + .atag_offset = 0x100, 688 688 .reserve = omap_reserve, 689 689 .map_io = omap242x_map_io, 690 690 .init_early = omap2420_init_early, ··· 694 694 MACHINE_END 695 695 696 696 MACHINE_START(NOKIA_N810, "Nokia N810") 697 - .boot_params = 0x80000100, 697 + .atag_offset = 0x100, 698 698 .reserve = omap_reserve, 699 699 .map_io = omap242x_map_io, 700 700 .init_early = omap2420_init_early, ··· 704 704 MACHINE_END 705 705 706 706 MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") 707 - .boot_params = 0x80000100, 707 + .atag_offset = 0x100, 708 708 .reserve = omap_reserve, 709 709 .map_io = omap242x_map_io, 710 710 .init_early = omap2420_init_early,
+1 -1
arch/arm/mach-omap2/board-omap3beagle.c
··· 547 547 548 548 MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") 549 549 /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ 550 - .boot_params = 0x80000100, 550 + .atag_offset = 0x100, 551 551 .reserve = omap_reserve, 552 552 .map_io = omap3_map_io, 553 553 .init_early = omap3_init_early,
+1 -1
arch/arm/mach-omap2/board-omap3evm.c
··· 676 676 677 677 MACHINE_START(OMAP3EVM, "OMAP3 EVM") 678 678 /* Maintainer: Syed Mohammed Khasim - Texas Instruments */ 679 - .boot_params = 0x80000100, 679 + .atag_offset = 0x100, 680 680 .reserve = omap_reserve, 681 681 .map_io = omap3_map_io, 682 682 .init_early = omap35xx_init_early,
+2 -2
arch/arm/mach-omap2/board-omap3logic.c
··· 204 204 } 205 205 206 206 MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") 207 - .boot_params = 0x80000100, 207 + .atag_offset = 0x100, 208 208 .map_io = omap3_map_io, 209 209 .init_early = omap35xx_init_early, 210 210 .init_irq = omap3_init_irq, ··· 213 213 MACHINE_END 214 214 215 215 MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") 216 - .boot_params = 0x80000100, 216 + .atag_offset = 0x100, 217 217 .map_io = omap3_map_io, 218 218 .init_early = omap35xx_init_early, 219 219 .init_irq = omap3_init_irq,
+1 -1
arch/arm/mach-omap2/board-omap3pandora.c
··· 601 601 } 602 602 603 603 MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") 604 - .boot_params = 0x80000100, 604 + .atag_offset = 0x100, 605 605 .reserve = omap_reserve, 606 606 .map_io = omap3_map_io, 607 607 .init_early = omap35xx_init_early,
+1 -1
arch/arm/mach-omap2/board-omap3stalker.c
··· 484 484 485 485 MACHINE_START(SBC3530, "OMAP3 STALKER") 486 486 /* Maintainer: Jason Lam -lzg@ema-tech.com */ 487 - .boot_params = 0x80000100, 487 + .atag_offset = 0x100, 488 488 .map_io = omap3_map_io, 489 489 .init_early = omap35xx_init_early, 490 490 .init_irq = omap3_init_irq,
+1 -1
arch/arm/mach-omap2/board-omap3touchbook.c
··· 394 394 395 395 MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") 396 396 /* Maintainer: Gregoire Gentil - http://www.alwaysinnovating.com */ 397 - .boot_params = 0x80000100, 397 + .atag_offset = 0x100, 398 398 .reserve = omap_reserve, 399 399 .map_io = omap3_map_io, 400 400 .init_early = omap3430_init_early,
+1 -1
arch/arm/mach-omap2/board-omap4panda.c
··· 572 572 573 573 MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") 574 574 /* Maintainer: David Anders - Texas Instruments Inc */ 575 - .boot_params = 0x80000100, 575 + .atag_offset = 0x100, 576 576 .reserve = omap_reserve, 577 577 .map_io = omap4_map_io, 578 578 .init_early = omap4430_init_early,
+1 -1
arch/arm/mach-omap2/board-overo.c
··· 556 556 } 557 557 558 558 MACHINE_START(OVERO, "Gumstix Overo") 559 - .boot_params = 0x80000100, 559 + .atag_offset = 0x100, 560 560 .reserve = omap_reserve, 561 561 .map_io = omap3_map_io, 562 562 .init_early = omap35xx_init_early,
+1 -1
arch/arm/mach-omap2/board-rm680.c
··· 144 144 } 145 145 146 146 MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") 147 - .boot_params = 0x80000100, 147 + .atag_offset = 0x100, 148 148 .reserve = omap_reserve, 149 149 .map_io = omap3_map_io, 150 150 .init_early = omap3630_init_early,
+1 -1
arch/arm/mach-omap2/board-rx51.c
··· 147 147 148 148 MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") 149 149 /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ 150 - .boot_params = 0x80000100, 150 + .atag_offset = 0x100, 151 151 .reserve = rx51_reserve, 152 152 .map_io = omap3_map_io, 153 153 .init_early = omap3430_init_early,
+1 -1
arch/arm/mach-omap2/board-ti8168evm.c
··· 42 42 43 43 MACHINE_START(TI8168EVM, "ti8168evm") 44 44 /* Maintainer: Texas Instruments */ 45 - .boot_params = 0x80000100, 45 + .atag_offset = 0x100, 46 46 .map_io = ti8168_evm_map_io, 47 47 .init_early = ti816x_init_early, 48 48 .init_irq = ti816x_init_irq,
+2 -2
arch/arm/mach-omap2/board-zoom.c
··· 130 130 } 131 131 132 132 MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") 133 - .boot_params = 0x80000100, 133 + .atag_offset = 0x100, 134 134 .reserve = omap_reserve, 135 135 .map_io = omap3_map_io, 136 136 .init_early = omap3430_init_early, ··· 140 140 MACHINE_END 141 141 142 142 MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") 143 - .boot_params = 0x80000100, 143 + .atag_offset = 0x100, 144 144 .reserve = omap_reserve, 145 145 .map_io = omap3_map_io, 146 146 .init_early = omap3630_init_early,
+36 -45
arch/arm/mach-omap2/include/mach/debug-macro.S
··· 13 13 14 14 #include <linux/serial_reg.h> 15 15 16 - #include <asm/memory.h> 17 - 18 16 #include <plat/serial.h> 19 17 20 18 #define UART_OFFSET(addr) ((addr) & 0x00ffffff) 21 - 22 - #define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) 23 - #define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) 24 19 25 20 .pushsection .data 26 21 omap_uart_phys: .word 0 ··· 29 34 * the desired UART phys and virt addresses temporarily into 30 35 * the omap_uart_phys and omap_uart_virt above. 31 36 */ 32 - .macro addruart, rp, rv 37 + .macro addruart, rp, rv, tmp 33 38 34 39 /* Use omap_uart_phys/virt if already configured */ 35 - 10: mrc p15, 0, \rp, c1, c0 36 - tst \rp, #1 @ MMU enabled? 37 - ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled 38 - ldrne \rp, =omap_uart_phys @ MMU enabled 39 - add \rv, \rp, #4 @ omap_uart_virt 40 - ldr \rp, [\rp, #0] 41 - ldr \rv, [\rv, #0] 40 + 10: adr \rp, 99f @ get effective addr of 99f 41 + ldr \rv, [\rp] @ get absolute addr of 99f 42 + sub \rv, \rv, \rp @ offset between the two 43 + ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys 44 + sub \tmp, \rp, \rv @ make it effective 45 + ldr \rp, [\tmp, #0] @ omap_uart_phys 46 + ldr \rv, [\tmp, #4] @ omap_uart_virt 42 47 cmp \rp, #0 @ is port configured? 43 48 cmpne \rv, #0 44 - bne 99f @ already configured 49 + bne 100f @ already configured 45 50 46 51 /* Check the debug UART configuration set in uncompress.h */ 47 - mrc p15, 0, \rp, c1, c0 48 - tst \rp, #1 @ MMU enabled? 49 - ldreq \rp, =OMAP_UART_INFO @ MMU not enabled 50 - ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled 51 - ldr \rp, [\rp, #0] 52 + mov \rp, pc 53 + ldr \rv, =OMAP_UART_INFO_OFS 54 + and \rp, \rp, #0xff000000 55 + ldr \rp, [\rp, \rv] 52 56 53 57 /* Select the UART to use based on the UART1 scratchpad value */ 54 58 cmp \rp, #0 @ no port configured? ··· 100 106 b 98f 101 107 83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) 102 108 b 98f 109 + 103 110 95: ldr \rp, =ZOOM_UART_BASE 104 - mrc p15, 0, \rv, c1, c0 105 - tst \rv, #1 @ MMU enabled? 106 - ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled 107 - ldrne \rv, =omap_uart_phys @ MMU enabled 108 - str \rp, [\rv, #0] 111 + str \rp, [\tmp, #0] @ omap_uart_phys 109 112 ldr \rp, =ZOOM_UART_VIRT 110 - add \rv, \rv, #4 @ omap_uart_virt 111 - str \rp, [\rv, #0] 113 + str \rp, [\tmp, #4] @ omap_uart_virt 112 114 mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) 113 - add \rv, \rv, #4 @ omap_uart_lsr 114 - str \rp, [\rv, #0] 115 + str \rp, [\tmp, #8] @ omap_uart_lsr 115 116 b 10b 116 117 117 118 /* Store both phys and virt address for the uart */ 118 119 98: add \rp, \rp, #0x48000000 @ phys base 119 - mrc p15, 0, \rv, c1, c0 120 - tst \rv, #1 @ MMU enabled? 121 - ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled 122 - ldrne \rv, =omap_uart_phys @ MMU enabled 123 - str \rp, [\rv, #0] 120 + str \rp, [\tmp, #0] @ omap_uart_phys 124 121 sub \rp, \rp, #0x48000000 @ phys base 125 122 add \rp, \rp, #0xfa000000 @ virt base 126 - add \rv, \rv, #4 @ omap_uart_virt 127 - str \rp, [\rv, #0] 123 + str \rp, [\tmp, #4] @ omap_uart_virt 128 124 mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) 129 - add \rv, \rv, #4 @ omap_uart_lsr 130 - str \rp, [\rv, #0] 125 + str \rp, [\tmp, #8] @ omap_uart_lsr 131 126 132 127 b 10b 133 - 99: 128 + 129 + .align 130 + 99: .word . 131 + .word omap_uart_phys 132 + .ltorg 133 + 134 + 100: /* Pass the UART_LSR reg address */ 135 + ldr \tmp, [\tmp, #8] @ omap_uart_lsr 136 + add \rp, \rp, \tmp 137 + add \rv, \rv, \tmp 134 138 .endm 135 139 136 140 .macro senduart,rd,rx 137 - strb \rd, [\rx] 141 + orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset 142 + bic \rx, \rx, #0xff @ get base (THR) reg address 143 + strb \rd, [\rx] @ send lower byte of rd 144 + orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR) 145 + bic \rd, \rd, #(0xff << 24) @ restore original rd 138 146 .endm 139 147 140 148 .macro busyuart,rd,rx 141 - 1001: mrc p15, 0, \rd, c1, c0 142 - tst \rd, #1 @ MMU enabled? 143 - ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled 144 - ldrne \rd, =omap_uart_lsr @ MMU enabled 145 - ldr \rd, [\rd, #0] 146 - ldrb \rd, [\rx, \rd] 149 + 1001: ldrb \rd, [\rx] @ rx contains UART_LSR address 147 150 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 148 151 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) 149 152 bne 1001b
-5
arch/arm/mach-omap2/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-omap2/include/mach/memory.h 3 - */ 4 - 5 - #include <plat/memory.h>
+1 -1
arch/arm/mach-omap2/io.c
··· 16 16 * it under the terms of the GNU General Public License version 2 as 17 17 * published by the Free Software Foundation. 18 18 */ 19 - 20 19 #include <linux/module.h> 21 20 #include <linux/kernel.h> 22 21 #include <linux/init.h> ··· 323 324 { 324 325 omap2_check_revision(); 325 326 omap_ioremap_init(); 327 + omap_init_consistent_dma_size(); 326 328 } 327 329 328 330 static void __init omap_hwmod_init_postsetup(void)
+2 -2
arch/arm/mach-orion5x/d2net-setup.c
··· 336 336 337 337 #ifdef CONFIG_MACH_D2NET 338 338 MACHINE_START(D2NET, "LaCie d2 Network") 339 - .boot_params = 0x00000100, 339 + .atag_offset = 0x100, 340 340 .init_machine = d2net_init, 341 341 .map_io = orion5x_map_io, 342 342 .init_early = orion5x_init_early, ··· 348 348 349 349 #ifdef CONFIG_MACH_BIGDISK 350 350 MACHINE_START(BIGDISK, "LaCie Big Disk Network") 351 - .boot_params = 0x00000100, 351 + .atag_offset = 0x100, 352 352 .init_machine = d2net_init, 353 353 .map_io = orion5x_map_io, 354 354 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/db88f5281-setup.c
··· 359 359 360 360 MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") 361 361 /* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */ 362 - .boot_params = 0x00000100, 362 + .atag_offset = 0x100, 363 363 .init_machine = db88f5281_init, 364 364 .map_io = orion5x_map_io, 365 365 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/dns323-setup.c
··· 730 730 /* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */ 731 731 MACHINE_START(DNS323, "D-Link DNS-323") 732 732 /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */ 733 - .boot_params = 0x00000100, 733 + .atag_offset = 0x100, 734 734 .init_machine = dns323_init, 735 735 .map_io = orion5x_map_io, 736 736 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/edmini_v2-setup.c
··· 251 251 /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ 252 252 MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2") 253 253 /* Maintainer: Christopher Moore <moore@free.fr> */ 254 - .boot_params = 0x00000100, 254 + .atag_offset = 0x100, 255 255 .init_machine = edmini_v2_init, 256 256 .map_io = orion5x_map_io, 257 257 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/include/mach/debug-macro.S
··· 10 10 11 11 #include <mach/orion5x.h> 12 12 13 - .macro addruart, rp, rv 13 + .macro addruart, rp, rv, tmp 14 14 ldr \rp, =ORION5X_REGS_PHYS_BASE 15 15 ldr \rv, =ORION5X_REGS_VIRT_BASE 16 16 orr \rp, \rp, #0x00012000
-12
arch/arm/mach-orion5x/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-orion5x/include/mach/memory.h 3 - * 4 - * Marvell Orion memory definitions 5 - */ 6 - 7 - #ifndef __ASM_ARCH_MEMORY_H 8 - #define __ASM_ARCH_MEMORY_H 9 - 10 - #define PLAT_PHYS_OFFSET UL(0x00000000) 11 - 12 - #endif
+2 -2
arch/arm/mach-orion5x/kurobox_pro-setup.c
··· 380 380 #ifdef CONFIG_MACH_KUROBOX_PRO 381 381 MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro") 382 382 /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ 383 - .boot_params = 0x00000100, 383 + .atag_offset = 0x100, 384 384 .init_machine = kurobox_pro_init, 385 385 .map_io = orion5x_map_io, 386 386 .init_early = orion5x_init_early, ··· 393 393 #ifdef CONFIG_MACH_LINKSTATION_PRO 394 394 MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live") 395 395 /* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */ 396 - .boot_params = 0x00000100, 396 + .atag_offset = 0x100, 397 397 .init_machine = kurobox_pro_init, 398 398 .map_io = orion5x_map_io, 399 399 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/ls-chl-setup.c
··· 318 318 319 319 MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)") 320 320 /* Maintainer: Ash Hughes <ashley.hughes@blueyonder.co.uk> */ 321 - .boot_params = 0x00000100, 321 + .atag_offset = 0x100, 322 322 .init_machine = lschl_init, 323 323 .map_io = orion5x_map_io, 324 324 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/ls_hgl-setup.c
··· 265 265 266 266 MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL") 267 267 /* Maintainer: Zhu Qingsen <zhuqs@cn.fujistu.com> */ 268 - .boot_params = 0x00000100, 268 + .atag_offset = 0x100, 269 269 .init_machine = ls_hgl_init, 270 270 .map_io = orion5x_map_io, 271 271 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/lsmini-setup.c
··· 267 267 #ifdef CONFIG_MACH_LINKSTATION_MINI 268 268 MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini") 269 269 /* Maintainer: Alexey Kopytko <alexey@kopytko.ru> */ 270 - .boot_params = 0x00000100, 270 + .atag_offset = 0x100, 271 271 .init_machine = lsmini_init, 272 272 .map_io = orion5x_map_io, 273 273 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/mss2-setup.c
··· 261 261 262 262 MACHINE_START(MSS2, "Maxtor Shared Storage II") 263 263 /* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */ 264 - .boot_params = 0x00000100, 264 + .atag_offset = 0x100, 265 265 .init_machine = mss2_init, 266 266 .map_io = orion5x_map_io, 267 267 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/mv2120-setup.c
··· 229 229 /* Warning: HP uses a wrong mach-type (=526) in their bootloader */ 230 230 MACHINE_START(MV2120, "HP Media Vault mv2120") 231 231 /* Maintainer: Martin Michlmayr <tbm@cyrius.com> */ 232 - .boot_params = 0x00000100, 232 + .atag_offset = 0x100, 233 233 .init_machine = mv2120_init, 234 234 .map_io = orion5x_map_io, 235 235 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/net2big-setup.c
··· 419 419 420 420 /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ 421 421 MACHINE_START(NET2BIG, "LaCie 2Big Network") 422 - .boot_params = 0x00000100, 422 + .atag_offset = 0x100, 423 423 .init_machine = net2big_init, 424 424 .map_io = orion5x_map_io, 425 425 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
··· 169 169 170 170 MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design") 171 171 /* Maintainer: Nicolas Pitre <nico@marvell.com> */ 172 - .boot_params = 0x00000100, 172 + .atag_offset = 0x100, 173 173 .init_machine = rd88f5181l_fxo_init, 174 174 .map_io = orion5x_map_io, 175 175 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
··· 181 181 182 182 MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design") 183 183 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ 184 - .boot_params = 0x00000100, 184 + .atag_offset = 0x100, 185 185 .init_machine = rd88f5181l_ge_init, 186 186 .map_io = orion5x_map_io, 187 187 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/rd88f5182-setup.c
··· 306 306 307 307 MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") 308 308 /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ 309 - .boot_params = 0x00000100, 309 + .atag_offset = 0x100, 310 310 .init_machine = rd88f5182_init, 311 311 .map_io = orion5x_map_io, 312 312 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
··· 122 122 123 123 MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") 124 124 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ 125 - .boot_params = 0x00000100, 125 + .atag_offset = 0x100, 126 126 .init_machine = rd88f6183ap_ge_init, 127 127 .map_io = orion5x_map_io, 128 128 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/terastation_pro2-setup.c
··· 358 358 359 359 MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live") 360 360 /* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */ 361 - .boot_params = 0x00000100, 361 + .atag_offset = 0x100, 362 362 .init_machine = tsp2_init, 363 363 .map_io = orion5x_map_io, 364 364 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/ts209-setup.c
··· 323 323 324 324 MACHINE_START(TS209, "QNAP TS-109/TS-209") 325 325 /* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */ 326 - .boot_params = 0x00000100, 326 + .atag_offset = 0x100, 327 327 .init_machine = qnap_ts209_init, 328 328 .map_io = orion5x_map_io, 329 329 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/ts409-setup.c
··· 312 312 313 313 MACHINE_START(TS409, "QNAP TS-409") 314 314 /* Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com> */ 315 - .boot_params = 0x00000100, 315 + .atag_offset = 0x100, 316 316 .init_machine = qnap_ts409_init, 317 317 .map_io = orion5x_map_io, 318 318 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/ts78xx-setup.c
··· 621 621 622 622 MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") 623 623 /* Maintainer: Alexander Clouter <alex@digriz.org.uk> */ 624 - .boot_params = 0x00000100, 624 + .atag_offset = 0x100, 625 625 .init_machine = ts78xx_init, 626 626 .map_io = ts78xx_map_io, 627 627 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/wnr854t-setup.c
··· 173 173 174 174 MACHINE_START(WNR854T, "Netgear WNR854T") 175 175 /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ 176 - .boot_params = 0x00000100, 176 + .atag_offset = 0x100, 177 177 .init_machine = wnr854t_init, 178 178 .map_io = orion5x_map_io, 179 179 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-orion5x/wrt350n-v2-setup.c
··· 261 261 262 262 MACHINE_START(WRT350N_V2, "Linksys WRT350N v2") 263 263 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ 264 - .boot_params = 0x00000100, 264 + .atag_offset = 0x100, 265 265 .init_machine = wrt350n_v2_init, 266 266 .map_io = orion5x_map_io, 267 267 .init_early = orion5x_init_early,
+1 -1
arch/arm/mach-pnx4008/core.c
··· 264 264 265 265 MACHINE_START(PNX4008, "Philips PNX4008") 266 266 /* Maintainer: MontaVista Software Inc. */ 267 - .boot_params = 0x80000100, 267 + .atag_offset = 0x100, 268 268 .map_io = pnx4008_map_io, 269 269 .init_irq = pnx4008_init_irq, 270 270 .init_machine = pnx4008_init,
+1 -1
arch/arm/mach-pnx4008/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0x00090000 16 16 add \rv, \rp, #0xf4000000 @ virtual 17 17 add \rp, \rp, #0x40000000 @ physical
-21
arch/arm/mach-pnx4008/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-pnx4008/include/mach/memory.h 3 - * 4 - * Copyright (c) 2005 Philips Semiconductors 5 - * Copyright (c) 2005 MontaVista Software, Inc. 6 - * 7 - * This program is free software; you can redistribute it and/or modify it 8 - * under the terms of the GNU General Public License as published by the 9 - * Free Software Foundation; either version 2 of the License, or (at your 10 - * option) any later version. 11 - */ 12 - 13 - #ifndef __ASM_ARCH_MEMORY_H 14 - #define __ASM_ARCH_MEMORY_H 15 - 16 - /* 17 - * Physical DRAM offset. 18 - */ 19 - #define PLAT_PHYS_OFFSET UL(0x80000000) 20 - 21 - #endif
+1 -1
arch/arm/mach-prima2/include/mach/debug-macro.S
··· 9 9 #include <mach/hardware.h> 10 10 #include <mach/uart.h> 11 11 12 - .macro addruart, rp, rv 12 + .macro addruart, rp, rv, tmp 13 13 ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical 14 14 ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual 15 15 .endm
-21
arch/arm/mach-prima2/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-prima2/include/mach/memory.h 3 - * 4 - * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company. 5 - * 6 - * Licensed under GPLv2 or later. 7 - */ 8 - 9 - #ifndef __ASM_ARCH_MEMORY_H 10 - #define __ASM_ARCH_MEMORY_H 11 - 12 - #define PLAT_PHYS_OFFSET UL(0x00000000) 13 - 14 - /* 15 - * Restrict DMA-able region to workaround silicon limitation. 16 - * The limitation restricts buffers available for DMA to SD/MMC 17 - * hardware to be below 256MB 18 - */ 19 - #define ARM_DMA_ZONE_SIZE (SZ_256M) 20 - 21 - #endif
+2 -3
arch/arm/mach-prima2/l2x0.c
··· 13 13 #include <linux/of.h> 14 14 #include <linux/of_address.h> 15 15 #include <asm/hardware/cache-l2x0.h> 16 - #include <mach/memory.h> 17 16 18 17 #define L2X0_ADDR_FILTERING_START 0xC00 19 18 #define L2X0_ADDR_FILTERING_END 0xC04 ··· 40 41 /* 41 42 * set the physical memory windows L2 cache will cover 42 43 */ 43 - writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024, 44 + writel_relaxed(PHYS_OFFSET + 1024 * 1024 * 1024, 44 45 sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END); 45 - writel_relaxed(PLAT_PHYS_OFFSET | 0x1, 46 + writel_relaxed(PHYS_OFFSET | 0x1, 46 47 sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START); 47 48 48 49 writel_relaxed(0,
+2 -1
arch/arm/mach-prima2/prima2.c
··· 31 31 32 32 MACHINE_START(PRIMA2_EVB, "prima2cb") 33 33 /* Maintainer: Barry Song <baohua.song@csr.com> */ 34 - .boot_params = 0x00000100, 34 + .atag_offset = 0x100, 35 35 .init_early = sirfsoc_of_clk_init, 36 36 .map_io = sirfsoc_map_lluart, 37 37 .init_irq = sirfsoc_of_irq_init, 38 38 .timer = &sirfsoc_timer, 39 + .dma_zone_size = SZ_256M, 39 40 .init_machine = sirfsoc_mach_init, 40 41 .dt_compat = prima2cb_dt_match, 41 42 MACHINE_END
+1 -1
arch/arm/mach-pxa/balloon3.c
··· 828 828 .handle_irq = pxa27x_handle_irq, 829 829 .timer = &pxa_timer, 830 830 .init_machine = balloon3_init, 831 - .boot_params = PLAT_PHYS_OFFSET + 0x100, 831 + .atag_offset = 0x100, 832 832 MACHINE_END
+1 -1
arch/arm/mach-pxa/capc7117.c
··· 148 148 149 149 MACHINE_START(CAPC7117, 150 150 "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM") 151 - .boot_params = 0xa0000100, 151 + .atag_offset = 0x100, 152 152 .map_io = pxa3xx_map_io, 153 153 .init_irq = pxa3xx_init_irq, 154 154 .handle_irq = pxa3xx_handle_irq,
+1 -1
arch/arm/mach-pxa/cm-x2xx.c
··· 513 513 #endif 514 514 515 515 MACHINE_START(ARMCORE, "Compulab CM-X2XX") 516 - .boot_params = 0xa0000100, 516 + .atag_offset = 0x100, 517 517 .map_io = cmx2xx_map_io, 518 518 .nr_irqs = CMX2XX_NR_IRQS, 519 519 .init_irq = cmx2xx_init_irq,
+1 -1
arch/arm/mach-pxa/cm-x300.c
··· 852 852 } 853 853 854 854 MACHINE_START(CM_X300, "CM-X300 module") 855 - .boot_params = 0xa0000100, 855 + .atag_offset = 0x100, 856 856 .map_io = pxa3xx_map_io, 857 857 .init_irq = pxa3xx_init_irq, 858 858 .handle_irq = pxa3xx_handle_irq,
+2 -2
arch/arm/mach-pxa/colibri-pxa270.c
··· 306 306 } 307 307 308 308 MACHINE_START(COLIBRI, "Toradex Colibri PXA270") 309 - .boot_params = COLIBRI_SDRAM_BASE + 0x100, 309 + .atag_offset = 0x100, 310 310 .init_machine = colibri_pxa270_init, 311 311 .map_io = pxa27x_map_io, 312 312 .init_irq = pxa27x_init_irq, ··· 315 315 MACHINE_END 316 316 317 317 MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") 318 - .boot_params = 0xa0000100, 318 + .atag_offset = 0x100, 319 319 .init_machine = colibri_pxa270_income_init, 320 320 .map_io = pxa27x_map_io, 321 321 .init_irq = pxa27x_init_irq,
+1 -1
arch/arm/mach-pxa/colibri-pxa300.c
··· 183 183 } 184 184 185 185 MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") 186 - .boot_params = COLIBRI_SDRAM_BASE + 0x100, 186 + .atag_offset = 0x100, 187 187 .init_machine = colibri_pxa300_init, 188 188 .map_io = pxa3xx_map_io, 189 189 .init_irq = pxa3xx_init_irq,
+1 -1
arch/arm/mach-pxa/colibri-pxa320.c
··· 253 253 } 254 254 255 255 MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") 256 - .boot_params = COLIBRI_SDRAM_BASE + 0x100, 256 + .atag_offset = 0x100, 257 257 .init_machine = colibri_pxa320_init, 258 258 .map_io = pxa3xx_map_io, 259 259 .init_irq = pxa3xx_init_irq,
+1 -1
arch/arm/mach-pxa/csb726.c
··· 272 272 } 273 273 274 274 MACHINE_START(CSB726, "Cogent CSB726") 275 - .boot_params = 0xa0000100, 275 + .atag_offset = 0x100, 276 276 .map_io = pxa27x_map_io, 277 277 .init_irq = pxa27x_init_irq, 278 278 .handle_irq = pxa27x_handle_irq,
+2 -2
arch/arm/mach-pxa/em-x270.c
··· 1299 1299 } 1300 1300 1301 1301 MACHINE_START(EM_X270, "Compulab EM-X270") 1302 - .boot_params = 0xa0000100, 1302 + .atag_offset = 0x100, 1303 1303 .map_io = pxa27x_map_io, 1304 1304 .init_irq = pxa27x_init_irq, 1305 1305 .handle_irq = pxa27x_handle_irq, ··· 1308 1308 MACHINE_END 1309 1309 1310 1310 MACHINE_START(EXEDA, "Compulab eXeda") 1311 - .boot_params = 0xa0000100, 1311 + .atag_offset = 0x100, 1312 1312 .map_io = pxa27x_map_io, 1313 1313 .init_irq = pxa27x_init_irq, 1314 1314 .handle_irq = pxa27x_handle_irq,
+6 -6
arch/arm/mach-pxa/eseries.c
··· 189 189 190 190 MACHINE_START(E330, "Toshiba e330") 191 191 /* Maintainer: Ian Molton (spyro@f2s.com) */ 192 - .boot_params = 0xa0000100, 192 + .atag_offset = 0x100, 193 193 .map_io = pxa25x_map_io, 194 194 .nr_irqs = ESERIES_NR_IRQS, 195 195 .init_irq = pxa25x_init_irq, ··· 239 239 240 240 MACHINE_START(E350, "Toshiba e350") 241 241 /* Maintainer: Ian Molton (spyro@f2s.com) */ 242 - .boot_params = 0xa0000100, 242 + .atag_offset = 0x100, 243 243 .map_io = pxa25x_map_io, 244 244 .nr_irqs = ESERIES_NR_IRQS, 245 245 .init_irq = pxa25x_init_irq, ··· 362 362 363 363 MACHINE_START(E400, "Toshiba e400") 364 364 /* Maintainer: Ian Molton (spyro@f2s.com) */ 365 - .boot_params = 0xa0000100, 365 + .atag_offset = 0x100, 366 366 .map_io = pxa25x_map_io, 367 367 .nr_irqs = ESERIES_NR_IRQS, 368 368 .init_irq = pxa25x_init_irq, ··· 551 551 552 552 MACHINE_START(E740, "Toshiba e740") 553 553 /* Maintainer: Ian Molton (spyro@f2s.com) */ 554 - .boot_params = 0xa0000100, 554 + .atag_offset = 0x100, 555 555 .map_io = pxa25x_map_io, 556 556 .nr_irqs = ESERIES_NR_IRQS, 557 557 .init_irq = pxa25x_init_irq, ··· 743 743 744 744 MACHINE_START(E750, "Toshiba e750") 745 745 /* Maintainer: Ian Molton (spyro@f2s.com) */ 746 - .boot_params = 0xa0000100, 746 + .atag_offset = 0x100, 747 747 .map_io = pxa25x_map_io, 748 748 .nr_irqs = ESERIES_NR_IRQS, 749 749 .init_irq = pxa25x_init_irq, ··· 948 948 949 949 MACHINE_START(E800, "Toshiba e800") 950 950 /* Maintainer: Ian Molton (spyro@f2s.com) */ 951 - .boot_params = 0xa0000100, 951 + .atag_offset = 0x100, 952 952 .map_io = pxa25x_map_io, 953 953 .nr_irqs = ESERIES_NR_IRQS, 954 954 .init_irq = pxa25x_init_irq,
+6 -6
arch/arm/mach-pxa/ezx.c
··· 797 797 } 798 798 799 799 MACHINE_START(EZX_A780, "Motorola EZX A780") 800 - .boot_params = 0xa0000100, 800 + .atag_offset = 0x100, 801 801 .map_io = pxa27x_map_io, 802 802 .nr_irqs = EZX_NR_IRQS, 803 803 .init_irq = pxa27x_init_irq, ··· 863 863 } 864 864 865 865 MACHINE_START(EZX_E680, "Motorola EZX E680") 866 - .boot_params = 0xa0000100, 866 + .atag_offset = 0x100, 867 867 .map_io = pxa27x_map_io, 868 868 .nr_irqs = EZX_NR_IRQS, 869 869 .init_irq = pxa27x_init_irq, ··· 929 929 } 930 930 931 931 MACHINE_START(EZX_A1200, "Motorola EZX A1200") 932 - .boot_params = 0xa0000100, 932 + .atag_offset = 0x100, 933 933 .map_io = pxa27x_map_io, 934 934 .nr_irqs = EZX_NR_IRQS, 935 935 .init_irq = pxa27x_init_irq, ··· 1120 1120 } 1121 1121 1122 1122 MACHINE_START(EZX_A910, "Motorola EZX A910") 1123 - .boot_params = 0xa0000100, 1123 + .atag_offset = 0x100, 1124 1124 .map_io = pxa27x_map_io, 1125 1125 .nr_irqs = EZX_NR_IRQS, 1126 1126 .init_irq = pxa27x_init_irq, ··· 1186 1186 } 1187 1187 1188 1188 MACHINE_START(EZX_E6, "Motorola EZX E6") 1189 - .boot_params = 0xa0000100, 1189 + .atag_offset = 0x100, 1190 1190 .map_io = pxa27x_map_io, 1191 1191 .nr_irqs = EZX_NR_IRQS, 1192 1192 .init_irq = pxa27x_init_irq, ··· 1226 1226 } 1227 1227 1228 1228 MACHINE_START(EZX_E2, "Motorola EZX E2") 1229 - .boot_params = 0xa0000100, 1229 + .atag_offset = 0x100, 1230 1230 .map_io = pxa27x_map_io, 1231 1231 .nr_irqs = EZX_NR_IRQS, 1232 1232 .init_irq = pxa27x_init_irq,
+1 -1
arch/arm/mach-pxa/gumstix.c
··· 233 233 } 234 234 235 235 MACHINE_START(GUMSTIX, "Gumstix") 236 - .boot_params = 0xa0000100, /* match u-boot bi_boot_params */ 236 + .atag_offset = 0x100, /* match u-boot bi_boot_params */ 237 237 .map_io = pxa25x_map_io, 238 238 .init_irq = pxa25x_init_irq, 239 239 .handle_irq = pxa25x_handle_irq,
+1 -1
arch/arm/mach-pxa/h5000.c
··· 203 203 } 204 204 205 205 MACHINE_START(H5400, "HP iPAQ H5000") 206 - .boot_params = 0xa0000100, 206 + .atag_offset = 0x100, 207 207 .map_io = pxa25x_map_io, 208 208 .init_irq = pxa25x_init_irq, 209 209 .handle_irq = pxa25x_handle_irq,
+1 -1
arch/arm/mach-pxa/himalaya.c
··· 158 158 159 159 160 160 MACHINE_START(HIMALAYA, "HTC Himalaya") 161 - .boot_params = 0xa0000100, 161 + .atag_offset = 0x100, 162 162 .map_io = pxa25x_map_io, 163 163 .init_irq = pxa25x_init_irq, 164 164 .handle_irq = pxa25x_handle_irq,
+1 -1
arch/arm/mach-pxa/hx4700.c
··· 838 838 } 839 839 840 840 MACHINE_START(H4700, "HP iPAQ HX4700") 841 - .boot_params = 0xa0000100, 841 + .atag_offset = 0x100, 842 842 .map_io = pxa27x_map_io, 843 843 .nr_irqs = HX4700_NR_IRQS, 844 844 .init_irq = pxa27x_init_irq,
+1 -1
arch/arm/mach-pxa/icontrol.c
··· 191 191 } 192 192 193 193 MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") 194 - .boot_params = 0xa0000100, 194 + .atag_offset = 0x100, 195 195 .map_io = pxa3xx_map_io, 196 196 .init_irq = pxa3xx_init_irq, 197 197 .handle_irq = pxa3xx_handle_irq,
+1 -1
arch/arm/mach-pxa/include/mach/debug-macro.S
··· 13 13 14 14 #include "hardware.h" 15 15 16 - .macro addruart, rp, rv 16 + .macro addruart, rp, rv, tmp 17 17 mov \rp, #0x00100000 18 18 orr \rv, \rp, #io_p2v(0x40000000) @ virtual 19 19 orr \rp, \rp, #0x40000000 @ physical
-20
arch/arm/mach-pxa/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-pxa/include/mach/memory.h 3 - * 4 - * Author: Nicolas Pitre 5 - * Copyright: (C) 2001 MontaVista Software Inc. 6 - * 7 - * This program is free software; you can redistribute it and/or modify 8 - * it under the terms of the GNU General Public License version 2 as 9 - * published by the Free Software Foundation. 10 - */ 11 - 12 - #ifndef __ASM_ARCH_MEMORY_H 13 - #define __ASM_ARCH_MEMORY_H 14 - 15 - /* 16 - * Physical DRAM offset. 17 - */ 18 - #define PLAT_PHYS_OFFSET UL(0xa0000000) 19 - 20 - #endif
+1 -1
arch/arm/mach-pxa/littleton.c
··· 437 437 } 438 438 439 439 MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)") 440 - .boot_params = 0xa0000100, 440 + .atag_offset = 0x100, 441 441 .map_io = pxa3xx_map_io, 442 442 .nr_irqs = LITTLETON_NR_IRQS, 443 443 .init_irq = pxa3xx_init_irq,
+1 -1
arch/arm/mach-pxa/lpd270.c
··· 499 499 500 500 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") 501 501 /* Maintainer: Peter Barada */ 502 - .boot_params = 0xa0000100, 502 + .atag_offset = 0x100, 503 503 .map_io = lpd270_map_io, 504 504 .nr_irqs = LPD270_NR_IRQS, 505 505 .init_irq = lpd270_init_irq,
+1 -1
arch/arm/mach-pxa/magician.c
··· 753 753 754 754 755 755 MACHINE_START(MAGICIAN, "HTC Magician") 756 - .boot_params = 0xa0000100, 756 + .atag_offset = 0x100, 757 757 .map_io = pxa27x_map_io, 758 758 .nr_irqs = MAGICIAN_NR_IRQS, 759 759 .init_irq = pxa27x_init_irq,
+1 -1
arch/arm/mach-pxa/mainstone.c
··· 616 616 617 617 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") 618 618 /* Maintainer: MontaVista Software Inc. */ 619 - .boot_params = 0xa0000100, /* BLOB boot parameter setting */ 619 + .atag_offset = 0x100, /* BLOB boot parameter setting */ 620 620 .map_io = mainstone_map_io, 621 621 .nr_irqs = MAINSTONE_NR_IRQS, 622 622 .init_irq = mainstone_init_irq,
+1 -1
arch/arm/mach-pxa/mioa701.c
··· 751 751 } 752 752 753 753 MACHINE_START(MIOA701, "MIO A701") 754 - .boot_params = 0xa0000100, 754 + .atag_offset = 0x100, 755 755 .map_io = &pxa27x_map_io, 756 756 .init_irq = &pxa27x_init_irq, 757 757 .handle_irq = &pxa27x_handle_irq,
+1 -1
arch/arm/mach-pxa/mp900.c
··· 92 92 93 93 /* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */ 94 94 MACHINE_START(NEC_MP900, "MobilePro900/C") 95 - .boot_params = 0xa0220100, 95 + .atag_offset = 0x220100, 96 96 .timer = &pxa_timer, 97 97 .map_io = pxa25x_map_io, 98 98 .init_irq = pxa25x_init_irq,
+1 -1
arch/arm/mach-pxa/palmld.c
··· 342 342 } 343 343 344 344 MACHINE_START(PALMLD, "Palm LifeDrive") 345 - .boot_params = 0xa0000100, 345 + .atag_offset = 0x100, 346 346 .map_io = palmld_map_io, 347 347 .init_irq = pxa27x_init_irq, 348 348 .handle_irq = pxa27x_handle_irq,
+1 -1
arch/arm/mach-pxa/palmt5.c
··· 202 202 } 203 203 204 204 MACHINE_START(PALMT5, "Palm Tungsten|T5") 205 - .boot_params = 0xa0000100, 205 + .atag_offset = 0x100, 206 206 .map_io = pxa27x_map_io, 207 207 .reserve = palmt5_reserve, 208 208 .init_irq = pxa27x_init_irq,
+1 -1
arch/arm/mach-pxa/palmtc.c
··· 537 537 }; 538 538 539 539 MACHINE_START(PALMTC, "Palm Tungsten|C") 540 - .boot_params = 0xa0000100, 540 + .atag_offset = 0x100, 541 541 .map_io = pxa25x_map_io, 542 542 .init_irq = pxa25x_init_irq, 543 543 .handle_irq = pxa25x_handle_irq,
+1 -1
arch/arm/mach-pxa/palmte2.c
··· 356 356 } 357 357 358 358 MACHINE_START(PALMTE2, "Palm Tungsten|E2") 359 - .boot_params = 0xa0000100, 359 + .atag_offset = 0x100, 360 360 .map_io = pxa25x_map_io, 361 361 .init_irq = pxa25x_init_irq, 362 362 .handle_irq = pxa25x_handle_irq,
+2 -2
arch/arm/mach-pxa/palmtreo.c
··· 440 440 } 441 441 442 442 MACHINE_START(TREO680, "Palm Treo 680") 443 - .boot_params = 0xa0000100, 443 + .atag_offset = 0x100, 444 444 .map_io = pxa27x_map_io, 445 445 .reserve = treo_reserve, 446 446 .init_irq = pxa27x_init_irq, ··· 450 450 MACHINE_END 451 451 452 452 MACHINE_START(CENTRO, "Palm Centro 685") 453 - .boot_params = 0xa0000100, 453 + .atag_offset = 0x100, 454 454 .map_io = pxa27x_map_io, 455 455 .reserve = treo_reserve, 456 456 .init_irq = pxa27x_init_irq,
+1 -1
arch/arm/mach-pxa/palmtx.c
··· 364 364 } 365 365 366 366 MACHINE_START(PALMTX, "Palm T|X") 367 - .boot_params = 0xa0000100, 367 + .atag_offset = 0x100, 368 368 .map_io = palmtx_map_io, 369 369 .init_irq = pxa27x_init_irq, 370 370 .handle_irq = pxa27x_handle_irq,
+1 -1
arch/arm/mach-pxa/palmz72.c
··· 399 399 } 400 400 401 401 MACHINE_START(PALMZ72, "Palm Zire72") 402 - .boot_params = 0xa0000100, 402 + .atag_offset = 0x100, 403 403 .map_io = pxa27x_map_io, 404 404 .init_irq = pxa27x_init_irq, 405 405 .handle_irq = pxa27x_handle_irq,
+1 -1
arch/arm/mach-pxa/pcm027.c
··· 258 258 259 259 MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") 260 260 /* Maintainer: Pengutronix */ 261 - .boot_params = 0xa0000100, 261 + .atag_offset = 0x100, 262 262 .map_io = pcm027_map_io, 263 263 .nr_irqs = PCM027_NR_IRQS, 264 264 .init_irq = pxa27x_init_irq,
+3 -3
arch/arm/mach-pxa/raumfeld.c
··· 1086 1086 1087 1087 #ifdef CONFIG_MACH_RAUMFELD_RC 1088 1088 MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") 1089 - .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1089 + .atag_offset = 0x100, 1090 1090 .init_machine = raumfeld_controller_init, 1091 1091 .map_io = pxa3xx_map_io, 1092 1092 .init_irq = pxa3xx_init_irq, ··· 1097 1097 1098 1098 #ifdef CONFIG_MACH_RAUMFELD_CONNECTOR 1099 1099 MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") 1100 - .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1100 + .atag_offset = 0x100, 1101 1101 .init_machine = raumfeld_connector_init, 1102 1102 .map_io = pxa3xx_map_io, 1103 1103 .init_irq = pxa3xx_init_irq, ··· 1108 1108 1109 1109 #ifdef CONFIG_MACH_RAUMFELD_SPEAKER 1110 1110 MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") 1111 - .boot_params = RAUMFELD_SDRAM_BASE + 0x100, 1111 + .atag_offset = 0x100, 1112 1112 .init_machine = raumfeld_speaker_init, 1113 1113 .map_io = pxa3xx_map_io, 1114 1114 .init_irq = pxa3xx_init_irq,
+1 -1
arch/arm/mach-pxa/saar.c
··· 596 596 597 597 MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") 598 598 /* Maintainer: Eric Miao <eric.miao@marvell.com> */ 599 - .boot_params = 0xa0000100, 599 + .atag_offset = 0x100, 600 600 .map_io = pxa3xx_map_io, 601 601 .init_irq = pxa3xx_init_irq, 602 602 .handle_irq = pxa3xx_handle_irq,
+1 -1
arch/arm/mach-pxa/saarb.c
··· 103 103 } 104 104 105 105 MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") 106 - .boot_params = 0xa0000100, 106 + .atag_offset = 0x100, 107 107 .map_io = pxa3xx_map_io, 108 108 .nr_irqs = SAARB_NR_IRQS, 109 109 .init_irq = pxa95x_init_irq,
+2 -2
arch/arm/mach-pxa/stargate2.c
··· 1004 1004 .handle_irq = pxa27x_handle_irq, 1005 1005 .timer = &pxa_timer, 1006 1006 .init_machine = imote2_init, 1007 - .boot_params = 0xA0000100, 1007 + .atag_offset = 0x100, 1008 1008 MACHINE_END 1009 1009 #endif 1010 1010 ··· 1016 1016 .handle_irq = pxa27x_handle_irq, 1017 1017 .timer = &pxa_timer, 1018 1018 .init_machine = stargate2_init, 1019 - .boot_params = 0xA0000100, 1019 + .atag_offset = 0x100, 1020 1020 MACHINE_END 1021 1021 #endif
+1 -1
arch/arm/mach-pxa/tavorevb.c
··· 489 489 490 490 MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") 491 491 /* Maintainer: Eric Miao <eric.miao@marvell.com> */ 492 - .boot_params = 0xa0000100, 492 + .atag_offset = 0x100, 493 493 .map_io = pxa3xx_map_io, 494 494 .init_irq = pxa3xx_init_irq, 495 495 .handle_irq = pxa3xx_handle_irq,
+1 -1
arch/arm/mach-pxa/tavorevb3.c
··· 125 125 } 126 126 127 127 MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") 128 - .boot_params = 0xa0000100, 128 + .atag_offset = 0x100, 129 129 .map_io = pxa3xx_map_io, 130 130 .nr_irqs = TAVOREVB3_NR_IRQS, 131 131 .init_irq = pxa3xx_init_irq,
+2 -2
arch/arm/mach-pxa/trizeps4.c
··· 554 554 555 555 MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") 556 556 /* MAINTAINER("Jürgen Schindele") */ 557 - .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, 557 + .atag_offset = 0x100, 558 558 .init_machine = trizeps4_init, 559 559 .map_io = trizeps4_map_io, 560 560 .init_irq = pxa27x_init_irq, ··· 564 564 565 565 MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") 566 566 /* MAINTAINER("Jürgen Schindele") */ 567 - .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, 567 + .atag_offset = 0x100, 568 568 .init_machine = trizeps4_init, 569 569 .map_io = trizeps4_map_io, 570 570 .init_irq = pxa27x_init_irq,
+1 -1
arch/arm/mach-pxa/viper.c
··· 992 992 993 993 MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") 994 994 /* Maintainer: Marc Zyngier <maz@misterjones.org> */ 995 - .boot_params = 0xa0000100, 995 + .atag_offset = 0x100, 996 996 .map_io = viper_map_io, 997 997 .init_irq = viper_init_irq, 998 998 .handle_irq = pxa25x_handle_irq,
+1 -1
arch/arm/mach-pxa/vpac270.c
··· 716 716 } 717 717 718 718 MACHINE_START(VPAC270, "Voipac PXA270") 719 - .boot_params = 0xa0000100, 719 + .atag_offset = 0x100, 720 720 .map_io = pxa27x_map_io, 721 721 .init_irq = pxa27x_init_irq, 722 722 .handle_irq = pxa27x_handle_irq,
+1 -1
arch/arm/mach-pxa/xcep.c
··· 180 180 } 181 181 182 182 MACHINE_START(XCEP, "Iskratel XCEP") 183 - .boot_params = 0xa0000100, 183 + .atag_offset = 0x100, 184 184 .init_machine = xcep_init, 185 185 .map_io = pxa25x_map_io, 186 186 .init_irq = pxa25x_init_irq,
+2 -2
arch/arm/mach-pxa/z2.c
··· 686 686 */ 687 687 PSPR = 0x0; 688 688 local_irq_disable(); 689 - pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); 689 + pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PHYS_OFFSET - PAGE_OFFSET); 690 690 } 691 691 #else 692 692 #define z2_power_off NULL ··· 718 718 } 719 719 720 720 MACHINE_START(ZIPIT2, "Zipit Z2") 721 - .boot_params = 0xa0000100, 721 + .atag_offset = 0x100, 722 722 .map_io = pxa27x_map_io, 723 723 .init_irq = pxa27x_init_irq, 724 724 .handle_irq = pxa27x_handle_irq,
+1 -1
arch/arm/mach-pxa/zeus.c
··· 904 904 905 905 MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") 906 906 /* Maintainer: Marc Zyngier <maz@misterjones.org> */ 907 - .boot_params = 0xa0000100, 907 + .atag_offset = 0x100, 908 908 .map_io = zeus_map_io, 909 909 .nr_irqs = ZEUS_NR_IRQS, 910 910 .init_irq = zeus_init_irq,
+1 -1
arch/arm/mach-pxa/zylonite.c
··· 422 422 } 423 423 424 424 MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") 425 - .boot_params = 0xa0000100, 425 + .atag_offset = 0x100, 426 426 .map_io = pxa3xx_map_io, 427 427 .nr_irqs = ZYLONITE_NR_IRQS, 428 428 .init_irq = pxa3xx_init_irq,
+1 -1
arch/arm/mach-realview/include/mach/debug-macro.S
··· 33 33 #error "Unknown RealView platform" 34 34 #endif 35 35 36 - .macro addruart, rp, rv 36 + .macro addruart, rp, rv, tmp 37 37 mov \rp, #DEBUG_LL_UART_OFFSET 38 38 orr \rv, \rp, #0xfb000000 @ virtual base 39 39 orr \rp, \rp, #0x10000000 @ physical base
+1 -1
arch/arm/mach-realview/realview_eb.c
··· 463 463 464 464 MACHINE_START(REALVIEW_EB, "ARM-RealView EB") 465 465 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 466 - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 466 + .atag_offset = 0x100, 467 467 .fixup = realview_fixup, 468 468 .map_io = realview_eb_map_io, 469 469 .init_early = realview_init_early,
+1 -1
arch/arm/mach-realview/realview_pb1176.c
··· 358 358 359 359 MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") 360 360 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 361 - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 361 + .atag_offset = 0x100, 362 362 .fixup = realview_pb1176_fixup, 363 363 .map_io = realview_pb1176_map_io, 364 364 .init_early = realview_init_early,
+1 -1
arch/arm/mach-realview/realview_pb11mp.c
··· 360 360 361 361 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") 362 362 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 363 - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 363 + .atag_offset = 0x100, 364 364 .fixup = realview_fixup, 365 365 .map_io = realview_pb11mp_map_io, 366 366 .init_early = realview_init_early,
+1 -1
arch/arm/mach-realview/realview_pba8.c
··· 310 310 311 311 MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") 312 312 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 313 - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 313 + .atag_offset = 0x100, 314 314 .fixup = realview_fixup, 315 315 .map_io = realview_pba8_map_io, 316 316 .init_early = realview_init_early,
+1 -1
arch/arm/mach-realview/realview_pbx.c
··· 393 393 394 394 MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") 395 395 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 396 - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 396 + .atag_offset = 0x100, 397 397 .fixup = realview_pbx_fixup, 398 398 .map_io = realview_pbx_map_io, 399 399 .init_early = realview_init_early,
+1 -1
arch/arm/mach-rpc/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0x00010000 16 16 orr \rp, \rp, #0x00000fe0 17 17 orr \rv, \rp, #0xe0000000 @ virtual
+1 -1
arch/arm/mach-rpc/riscpc.c
··· 218 218 219 219 MACHINE_START(RISCPC, "Acorn-RiscPC") 220 220 /* Maintainer: Russell King */ 221 - .boot_params = 0x10000100, 221 + .atag_offset = 0x100, 222 222 .reserve_lp0 = 1, 223 223 .reserve_lp1 = 1, 224 224 .map_io = rpc_map_io,
-20
arch/arm/mach-s3c2400/include/mach/memory.h
··· 1 - /* arch/arm/mach-s3c2400/include/mach/memory.h 2 - * from arch/arm/mach-rpc/include/mach/memory.h 3 - * 4 - * Copyright 2007 Simtec Electronics 5 - * http://armlinux.simtec.co.uk/ 6 - * Ben Dooks <ben@simtec.co.uk> 7 - * 8 - * Copyright (C) 1996,1997,1998 Russell King. 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License version 2 as 12 - * published by the Free Software Foundation. 13 - */ 14 - 15 - #ifndef __ASM_ARCH_MEMORY_H 16 - #define __ASM_ARCH_MEMORY_H 17 - 18 - #define PLAT_PHYS_OFFSET UL(0x0C000000) 19 - 20 - #endif
+1 -1
arch/arm/mach-s3c2410/include/mach/debug-macro.S
··· 19 19 #define S3C2410_UART1_OFF (0x4000) 20 20 #define SHIFT_2440TXF (14-9) 21 21 22 - .macro addruart, rp, rv 22 + .macro addruart, rp, rv, tmp 23 23 ldr \rp, = S3C24XX_PA_UART 24 24 ldr \rv, = S3C24XX_VA_UART 25 25 #if CONFIG_DEBUG_S3C_UART != 0
-16
arch/arm/mach-s3c2410/include/mach/memory.h
··· 1 - /* arch/arm/mach-s3c2410/include/mach/memory.h 2 - * from arch/arm/mach-rpc/include/mach/memory.h 3 - * 4 - * Copyright (C) 1996,1997,1998 Russell King. 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License version 2 as 8 - * published by the Free Software Foundation. 9 - */ 10 - 11 - #ifndef __ASM_ARCH_MEMORY_H 12 - #define __ASM_ARCH_MEMORY_H 13 - 14 - #define PLAT_PHYS_OFFSET UL(0x30000000) 15 - 16 - #endif
+1 -1
arch/arm/mach-s3c2410/mach-amlm5900.c
··· 236 236 } 237 237 238 238 MACHINE_START(AML_M5900, "AML_M5900") 239 - .boot_params = S3C2410_SDRAM_PA + 0x100, 239 + .atag_offset = 0x100, 240 240 .map_io = amlm5900_map_io, 241 241 .init_irq = s3c24xx_init_irq, 242 242 .init_machine = amlm5900_init,
+1 -1
arch/arm/mach-s3c2410/mach-bast.c
··· 657 657 658 658 MACHINE_START(BAST, "Simtec-BAST") 659 659 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ 660 - .boot_params = S3C2410_SDRAM_PA + 0x100, 660 + .atag_offset = 0x100, 661 661 .map_io = bast_map_io, 662 662 .init_irq = s3c24xx_init_irq, 663 663 .init_machine = bast_init,
+1 -1
arch/arm/mach-s3c2410/mach-h1940.c
··· 744 744 745 745 MACHINE_START(H1940, "IPAQ-H1940") 746 746 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 747 - .boot_params = S3C2410_SDRAM_PA + 0x100, 747 + .atag_offset = 0x100, 748 748 .map_io = h1940_map_io, 749 749 .reserve = h1940_reserve, 750 750 .init_irq = h1940_init_irq,
+2 -2
arch/arm/mach-s3c2410/mach-n30.c
··· 586 586 /* Maintainer: Christer Weinigel <christer@weinigel.se>, 587 587 Ben Dooks <ben-linux@fluff.org> 588 588 */ 589 - .boot_params = S3C2410_SDRAM_PA + 0x100, 589 + .atag_offset = 0x100, 590 590 .timer = &s3c24xx_timer, 591 591 .init_machine = n30_init, 592 592 .init_irq = s3c24xx_init_irq, ··· 596 596 MACHINE_START(N35, "Acer-N35") 597 597 /* Maintainer: Christer Weinigel <christer@weinigel.se> 598 598 */ 599 - .boot_params = S3C2410_SDRAM_PA + 0x100, 599 + .atag_offset = 0x100, 600 600 .timer = &s3c24xx_timer, 601 601 .init_machine = n30_init, 602 602 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2410/mach-otom.c
··· 116 116 117 117 MACHINE_START(OTOM, "Nex Vision - Otom 1.1") 118 118 /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */ 119 - .boot_params = S3C2410_SDRAM_PA + 0x100, 119 + .atag_offset = 0x100, 120 120 .map_io = otom11_map_io, 121 121 .init_machine = otom11_init, 122 122 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2410/mach-qt2410.c
··· 345 345 } 346 346 347 347 MACHINE_START(QT2410, "QT2410") 348 - .boot_params = S3C2410_SDRAM_PA + 0x100, 348 + .atag_offset = 0x100, 349 349 .map_io = qt2410_map_io, 350 350 .init_irq = s3c24xx_init_irq, 351 351 .init_machine = qt2410_machine_init,
+1 -1
arch/arm/mach-s3c2410/mach-smdk2410.c
··· 111 111 MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch 112 112 * to SMDK2410 */ 113 113 /* Maintainer: Jonas Dietsche */ 114 - .boot_params = S3C2410_SDRAM_PA + 0x100, 114 + .atag_offset = 0x100, 115 115 .map_io = smdk2410_map_io, 116 116 .init_irq = s3c24xx_init_irq, 117 117 .init_machine = smdk2410_init,
+1 -1
arch/arm/mach-s3c2410/mach-tct_hammer.c
··· 146 146 } 147 147 148 148 MACHINE_START(TCT_HAMMER, "TCT_HAMMER") 149 - .boot_params = S3C2410_SDRAM_PA + 0x100, 149 + .atag_offset = 0x100, 150 150 .map_io = tct_hammer_map_io, 151 151 .init_irq = s3c24xx_init_irq, 152 152 .init_machine = tct_hammer_init,
+1 -1
arch/arm/mach-s3c2410/mach-vr1000.c
··· 400 400 401 401 MACHINE_START(VR1000, "Thorcom-VR1000") 402 402 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ 403 - .boot_params = S3C2410_SDRAM_PA + 0x100, 403 + .atag_offset = 0x100, 404 404 .map_io = vr1000_map_io, 405 405 .init_machine = vr1000_init, 406 406 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2412/mach-jive.c
··· 655 655 656 656 MACHINE_START(JIVE, "JIVE") 657 657 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 658 - .boot_params = S3C2410_SDRAM_PA + 0x100, 658 + .atag_offset = 0x100, 659 659 660 660 .init_irq = s3c24xx_init_irq, 661 661 .map_io = jive_map_io,
+3 -3
arch/arm/mach-s3c2412/mach-smdk2413.c
··· 128 128 129 129 MACHINE_START(S3C2413, "S3C2413") 130 130 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 131 - .boot_params = S3C2410_SDRAM_PA + 0x100, 131 + .atag_offset = 0x100, 132 132 133 133 .fixup = smdk2413_fixup, 134 134 .init_irq = s3c24xx_init_irq, ··· 139 139 140 140 MACHINE_START(SMDK2412, "SMDK2412") 141 141 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 142 - .boot_params = S3C2410_SDRAM_PA + 0x100, 142 + .atag_offset = 0x100, 143 143 144 144 .fixup = smdk2413_fixup, 145 145 .init_irq = s3c24xx_init_irq, ··· 150 150 151 151 MACHINE_START(SMDK2413, "SMDK2413") 152 152 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 153 - .boot_params = S3C2410_SDRAM_PA + 0x100, 153 + .atag_offset = 0x100, 154 154 155 155 .fixup = smdk2413_fixup, 156 156 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2412/mach-vstms.c
··· 156 156 } 157 157 158 158 MACHINE_START(VSTMS, "VSTMS") 159 - .boot_params = S3C2410_SDRAM_PA + 0x100, 159 + .atag_offset = 0x100, 160 160 161 161 .fixup = vstms_fixup, 162 162 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2416/mach-smdk2416.c
··· 245 245 246 246 MACHINE_START(SMDK2416, "SMDK2416") 247 247 /* Maintainer: Yauhen Kharuzhy <jekhor@gmail.com> */ 248 - .boot_params = S3C2410_SDRAM_PA + 0x100, 248 + .atag_offset = 0x100, 249 249 250 250 .init_irq = s3c24xx_init_irq, 251 251 .map_io = smdk2416_map_io,
+1 -1
arch/arm/mach-s3c2440/mach-anubis.c
··· 498 498 499 499 MACHINE_START(ANUBIS, "Simtec-Anubis") 500 500 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ 501 - .boot_params = S3C2410_SDRAM_PA + 0x100, 501 + .atag_offset = 0x100, 502 502 .map_io = anubis_map_io, 503 503 .init_machine = anubis_init, 504 504 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2440/mach-at2440evb.c
··· 233 233 234 234 235 235 MACHINE_START(AT2440EVB, "AT2440EVB") 236 - .boot_params = S3C2410_SDRAM_PA + 0x100, 236 + .atag_offset = 0x100, 237 237 .map_io = at2440evb_map_io, 238 238 .init_machine = at2440evb_init, 239 239 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2440/mach-gta02.c
··· 595 595 596 596 MACHINE_START(NEO1973_GTA02, "GTA02") 597 597 /* Maintainer: Nelson Castillo <arhuaco@freaks-unidos.net> */ 598 - .boot_params = S3C2410_SDRAM_PA + 0x100, 598 + .atag_offset = 0x100, 599 599 .map_io = gta02_map_io, 600 600 .init_irq = s3c24xx_init_irq, 601 601 .init_machine = gta02_machine_init,
+1 -1
arch/arm/mach-s3c2440/mach-mini2440.c
··· 676 676 677 677 MACHINE_START(MINI2440, "MINI2440") 678 678 /* Maintainer: Michel Pollet <buserror@gmail.com> */ 679 - .boot_params = S3C2410_SDRAM_PA + 0x100, 679 + .atag_offset = 0x100, 680 680 .map_io = mini2440_map_io, 681 681 .init_machine = mini2440_init, 682 682 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2440/mach-nexcoder.c
··· 151 151 152 152 MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") 153 153 /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */ 154 - .boot_params = S3C2410_SDRAM_PA + 0x100, 154 + .atag_offset = 0x100, 155 155 .map_io = nexcoder_map_io, 156 156 .init_machine = nexcoder_init, 157 157 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2440/mach-osiris.c
··· 447 447 448 448 MACHINE_START(OSIRIS, "Simtec-OSIRIS") 449 449 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ 450 - .boot_params = S3C2410_SDRAM_PA + 0x100, 450 + .atag_offset = 0x100, 451 451 .map_io = osiris_map_io, 452 452 .init_irq = s3c24xx_init_irq, 453 453 .init_machine = osiris_init,
+1 -1
arch/arm/mach-s3c2440/mach-rx1950.c
··· 826 826 827 827 MACHINE_START(RX1950, "HP iPAQ RX1950") 828 828 /* Maintainers: Vasily Khoruzhick */ 829 - .boot_params = S3C2410_SDRAM_PA + 0x100, 829 + .atag_offset = 0x100, 830 830 .map_io = rx1950_map_io, 831 831 .reserve = rx1950_reserve, 832 832 .init_irq = s3c24xx_init_irq,
+1 -1
arch/arm/mach-s3c2440/mach-rx3715.c
··· 218 218 219 219 MACHINE_START(RX3715, "IPAQ-RX3715") 220 220 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 221 - .boot_params = S3C2410_SDRAM_PA + 0x100, 221 + .atag_offset = 0x100, 222 222 .map_io = rx3715_map_io, 223 223 .reserve = rx3715_reserve, 224 224 .init_irq = rx3715_init_irq,
+1 -1
arch/arm/mach-s3c2440/mach-smdk2440.c
··· 175 175 176 176 MACHINE_START(S3C2440, "SMDK2440") 177 177 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 178 - .boot_params = S3C2410_SDRAM_PA + 0x100, 178 + .atag_offset = 0x100, 179 179 180 180 .init_irq = s3c24xx_init_irq, 181 181 .map_io = smdk2440_map_io,
+1 -1
arch/arm/mach-s3c2443/mach-smdk2443.c
··· 139 139 140 140 MACHINE_START(SMDK2443, "SMDK2443") 141 141 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 142 - .boot_params = S3C2410_SDRAM_PA + 0x100, 142 + .atag_offset = 0x100, 143 143 144 144 .init_irq = s3c24xx_init_irq, 145 145 .map_io = smdk2443_map_io,
+2
arch/arm/mach-s3c64xx/cpu.c
··· 20 20 #include <linux/serial_core.h> 21 21 #include <linux/platform_device.h> 22 22 #include <linux/io.h> 23 + #include <linux/dma-mapping.h> 23 24 24 25 #include <mach/hardware.h> 25 26 #include <mach/map.h> ··· 144 143 /* initialise the io descriptors we need for initialisation */ 145 144 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); 146 145 iotable_init(mach_desc, size); 146 + init_consistent_dma_size(SZ_8M); 147 147 148 148 /* detect cpu id */ 149 149 s3c64xx_init_cpu();
+1 -1
arch/arm/mach-s3c64xx/include/mach/debug-macro.S
··· 21 21 * aligned and add in the offset when we load the value here. 22 22 */ 23 23 24 - .macro addruart, rp, rv 24 + .macro addruart, rp, rv, tmp 25 25 ldr \rp, = S3C_PA_UART 26 26 ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) 27 27 #if CONFIG_DEBUG_S3C_UART != 0
-20
arch/arm/mach-s3c64xx/include/mach/memory.h
··· 1 - /* arch/arm/mach-s3c6400/include/mach/memory.h 2 - * 3 - * Copyright 2008 Openmoko, Inc. 4 - * Copyright 2008 Simtec Electronics 5 - * Ben Dooks <ben@simtec.co.uk> 6 - * http://armlinux.simtec.co.uk/ 7 - * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License version 2 as 10 - * published by the Free Software Foundation. 11 - */ 12 - 13 - #ifndef __ASM_ARCH_MEMORY_H 14 - #define __ASM_ARCH_MEMORY_H 15 - 16 - #define PLAT_PHYS_OFFSET UL(0x50000000) 17 - 18 - #define CONSISTENT_DMA_SIZE SZ_8M 19 - 20 - #endif
+1 -1
arch/arm/mach-s3c64xx/mach-anw6410.c
··· 233 233 234 234 MACHINE_START(ANW6410, "A&W6410") 235 235 /* Maintainer: Kwangwoo Lee <kwangwoo.lee@gmail.com> */ 236 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 236 + .atag_offset = 0x100, 237 237 238 238 .init_irq = s3c6410_init_irq, 239 239 .map_io = anw6410_map_io,
+1 -1
arch/arm/mach-s3c64xx/mach-crag6410.c
··· 709 709 710 710 MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410") 711 711 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ 712 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 712 + .atag_offset = 0x100, 713 713 .init_irq = s3c6410_init_irq, 714 714 .map_io = crag6410_map_io, 715 715 .init_machine = crag6410_machine_init,
+1 -1
arch/arm/mach-s3c64xx/mach-hmt.c
··· 265 265 266 266 MACHINE_START(HMT, "Airgoo-HMT") 267 267 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ 268 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 268 + .atag_offset = 0x100, 269 269 .init_irq = s3c6410_init_irq, 270 270 .map_io = hmt_map_io, 271 271 .init_machine = hmt_machine_init,
+1 -1
arch/arm/mach-s3c64xx/mach-mini6410.c
··· 343 343 344 344 MACHINE_START(MINI6410, "MINI6410") 345 345 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ 346 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 346 + .atag_offset = 0x100, 347 347 .init_irq = s3c6410_init_irq, 348 348 .map_io = mini6410_map_io, 349 349 .init_machine = mini6410_machine_init,
+1 -1
arch/arm/mach-s3c64xx/mach-ncp.c
··· 97 97 98 98 MACHINE_START(NCP, "NCP") 99 99 /* Maintainer: Samsung Electronics */ 100 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 100 + .atag_offset = 0x100, 101 101 .init_irq = s3c6410_init_irq, 102 102 .map_io = ncp_map_io, 103 103 .init_machine = ncp_machine_init,
+1 -1
arch/arm/mach-s3c64xx/mach-real6410.c
··· 323 323 324 324 MACHINE_START(REAL6410, "REAL6410") 325 325 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ 326 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 326 + .atag_offset = 0x100, 327 327 328 328 .init_irq = s3c6410_init_irq, 329 329 .map_io = real6410_map_io,
+1 -1
arch/arm/mach-s3c64xx/mach-smartq5.c
··· 146 146 147 147 MACHINE_START(SMARTQ5, "SmartQ 5") 148 148 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 149 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 149 + .atag_offset = 0x100, 150 150 .init_irq = s3c6410_init_irq, 151 151 .map_io = smartq_map_io, 152 152 .init_machine = smartq5_machine_init,
+1 -1
arch/arm/mach-s3c64xx/mach-smartq7.c
··· 162 162 163 163 MACHINE_START(SMARTQ7, "SmartQ 7") 164 164 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 165 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 165 + .atag_offset = 0x100, 166 166 .init_irq = s3c6410_init_irq, 167 167 .map_io = smartq_map_io, 168 168 .init_machine = smartq7_machine_init,
+1 -1
arch/arm/mach-s3c64xx/mach-smdk6400.c
··· 85 85 86 86 MACHINE_START(SMDK6400, "SMDK6400") 87 87 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 88 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 88 + .atag_offset = 0x100, 89 89 90 90 .init_irq = s3c6400_init_irq, 91 91 .map_io = smdk6400_map_io,
+1 -1
arch/arm/mach-s3c64xx/mach-smdk6410.c
··· 697 697 698 698 MACHINE_START(SMDK6410, "SMDK6410") 699 699 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ 700 - .boot_params = S3C64XX_PA_SDRAM + 0x100, 700 + .atag_offset = 0x100, 701 701 702 702 .init_irq = s3c6410_init_irq, 703 703 .map_io = smdk6410_map_io,
+3
arch/arm/mach-s5p64x0/cpu.c
··· 20 20 #include <linux/serial_core.h> 21 21 #include <linux/platform_device.h> 22 22 #include <linux/sched.h> 23 + #include <linux/dma-mapping.h> 23 24 24 25 #include <asm/mach/arch.h> 25 26 #include <asm/mach/map.h> ··· 114 113 115 114 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); 116 115 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); 116 + init_consistent_dma_size(SZ_8M); 117 117 } 118 118 119 119 void __init s5p6450_map_io(void) ··· 125 123 126 124 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); 127 125 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); 126 + init_consistent_dma_size(SZ_8M); 128 127 } 129 128 130 129 /*
+1 -1
arch/arm/mach-s5p64x0/include/mach/debug-macro.S
··· 15 15 16 16 #include <plat/regs-serial.h> 17 17 18 - .macro addruart, rp, rv 18 + .macro addruart, rp, rv, tmp 19 19 mov \rp, #0xE0000000 20 20 orr \rp, \rp, #0x00100000 21 21 ldr \rp, [\rp, #0x118 ]
-19
arch/arm/mach-s5p64x0/include/mach/memory.h
··· 1 - /* linux/arch/arm/mach-s5p64x0/include/mach/memory.h 2 - * 3 - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. 4 - * http://www.samsung.com 5 - * 6 - * S5P64X0 - Memory definitions 7 - * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License version 2 as 10 - * published by the Free Software Foundation. 11 - */ 12 - 13 - #ifndef __ASM_ARCH_MEMORY_H 14 - #define __ASM_ARCH_MEMORY_H __FILE__ 15 - 16 - #define PLAT_PHYS_OFFSET UL(0x20000000) 17 - #define CONSISTENT_DMA_SIZE SZ_8M 18 - 19 - #endif /* __ASM_ARCH_MEMORY_H */
+1 -1
arch/arm/mach-s5p64x0/mach-smdk6440.c
··· 239 239 240 240 MACHINE_START(SMDK6440, "SMDK6440") 241 241 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 242 - .boot_params = S5P64X0_PA_SDRAM + 0x100, 242 + .atag_offset = 0x100, 243 243 244 244 .init_irq = s5p6440_init_irq, 245 245 .map_io = smdk6440_map_io,
+1 -1
arch/arm/mach-s5p64x0/mach-smdk6450.c
··· 259 259 260 260 MACHINE_START(SMDK6450, "SMDK6450") 261 261 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 262 - .boot_params = S5P64X0_PA_SDRAM + 0x100, 262 + .atag_offset = 0x100, 263 263 264 264 .init_irq = s5p6450_init_irq, 265 265 .map_io = smdk6450_map_io,
+1 -1
arch/arm/mach-s5pc100/include/mach/debug-macro.S
··· 22 22 * aligned and add in the offset when we load the value here. 23 23 */ 24 24 25 - .macro addruart, rp, rv 25 + .macro addruart, rp, rv, tmp 26 26 ldr \rp, = S3C_PA_UART 27 27 ldr \rv, = S3C_VA_UART 28 28 #if CONFIG_DEBUG_S3C_UART != 0
-18
arch/arm/mach-s5pc100/include/mach/memory.h
··· 1 - /* arch/arm/mach-s5pc100/include/mach/memory.h 2 - * 3 - * Copyright 2008 Samsung Electronics Co. 4 - * Byungho Min <bhmin@samsung.com> 5 - * 6 - * Based on mach-s3c6400/include/mach/memory.h 7 - * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License version 2 as 10 - * published by the Free Software Foundation. 11 - */ 12 - 13 - #ifndef __ASM_ARCH_MEMORY_H 14 - #define __ASM_ARCH_MEMORY_H 15 - 16 - #define PLAT_PHYS_OFFSET UL(0x20000000) 17 - 18 - #endif
+1 -1
arch/arm/mach-s5pc100/mach-smdkc100.c
··· 248 248 249 249 MACHINE_START(SMDKC100, "SMDKC100") 250 250 /* Maintainer: Byungho Min <bhmin@samsung.com> */ 251 - .boot_params = S5P_PA_SDRAM + 0x100, 251 + .atag_offset = 0x100, 252 252 .init_irq = s5pc100_init_irq, 253 253 .map_io = smdkc100_map_io, 254 254 .init_machine = smdkc100_machine_init,
+2
arch/arm/mach-s5pv210/cpu.c
··· 20 20 #include <linux/sysdev.h> 21 21 #include <linux/platform_device.h> 22 22 #include <linux/sched.h> 23 + #include <linux/dma-mapping.h> 23 24 24 25 #include <asm/mach/arch.h> 25 26 #include <asm/mach/map.h> ··· 121 120 void __init s5pv210_map_io(void) 122 121 { 123 122 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); 123 + init_consistent_dma_size(14 << 20); 124 124 125 125 /* initialise device information early */ 126 126 s5pv210_default_sdhci0();
+1 -1
arch/arm/mach-s5pv210/include/mach/debug-macro.S
··· 21 21 * aligned and add in the offset when we load the value here. 22 22 */ 23 23 24 - .macro addruart, rp, rv 24 + .macro addruart, rp, rv, tmp 25 25 ldr \rp, = S3C_PA_UART 26 26 ldr \rv, = S3C_VA_UART 27 27 #if CONFIG_DEBUG_S3C_UART != 0
-1
arch/arm/mach-s5pv210/include/mach/memory.h
··· 14 14 #define __ASM_ARCH_MEMORY_H 15 15 16 16 #define PLAT_PHYS_OFFSET UL(0x20000000) 17 - #define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) 18 17 19 18 /* 20 19 * Sparsemem support
+1 -1
arch/arm/mach-s5pv210/mach-aquila.c
··· 678 678 /* Maintainers: 679 679 Marek Szyprowski <m.szyprowski@samsung.com> 680 680 Kyungmin Park <kyungmin.park@samsung.com> */ 681 - .boot_params = S5P_PA_SDRAM + 0x100, 681 + .atag_offset = 0x100, 682 682 .init_irq = s5pv210_init_irq, 683 683 .map_io = aquila_map_io, 684 684 .init_machine = aquila_machine_init,
+1 -1
arch/arm/mach-s5pv210/mach-goni.c
··· 954 954 955 955 MACHINE_START(GONI, "GONI") 956 956 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ 957 - .boot_params = S5P_PA_SDRAM + 0x100, 957 + .atag_offset = 0x100, 958 958 .init_irq = s5pv210_init_irq, 959 959 .map_io = goni_map_io, 960 960 .init_machine = goni_machine_init,
+1 -1
arch/arm/mach-s5pv210/mach-smdkc110.c
··· 136 136 137 137 MACHINE_START(SMDKC110, "SMDKC110") 138 138 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 139 - .boot_params = S5P_PA_SDRAM + 0x100, 139 + .atag_offset = 0x100, 140 140 .init_irq = s5pv210_init_irq, 141 141 .map_io = smdkc110_map_io, 142 142 .init_machine = smdkc110_machine_init,
+1 -1
arch/arm/mach-s5pv210/mach-smdkv210.c
··· 313 313 314 314 MACHINE_START(SMDKV210, "SMDKV210") 315 315 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 316 - .boot_params = S5P_PA_SDRAM + 0x100, 316 + .atag_offset = 0x100, 317 317 .init_irq = s5pv210_init_irq, 318 318 .map_io = smdkv210_map_io, 319 319 .init_machine = smdkv210_machine_init,
+1 -1
arch/arm/mach-s5pv210/mach-torbreck.c
··· 125 125 126 126 MACHINE_START(TORBRECK, "TORBRECK") 127 127 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ 128 - .boot_params = S5P_PA_SDRAM + 0x100, 128 + .atag_offset = 0x100, 129 129 .init_irq = s5pv210_init_irq, 130 130 .map_io = torbreck_map_io, 131 131 .init_machine = torbreck_machine_init,
+1 -1
arch/arm/mach-sa1100/assabet.c
··· 447 447 448 448 449 449 MACHINE_START(ASSABET, "Intel-Assabet") 450 - .boot_params = 0xc0000100, 450 + .atag_offset = 0x100, 451 451 .fixup = fixup_assabet, 452 452 .map_io = assabet_map_io, 453 453 .init_irq = sa1100_init_irq,
+1 -1
arch/arm/mach-sa1100/badge4.c
··· 302 302 } 303 303 304 304 MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4") 305 - .boot_params = 0xc0000100, 305 + .atag_offset = 0x100, 306 306 .map_io = badge4_map_io, 307 307 .init_irq = sa1100_init_irq, 308 308 .timer = &sa1100_timer,
+1 -1
arch/arm/mach-sa1100/h3100.c
··· 84 84 } 85 85 86 86 MACHINE_START(H3100, "Compaq iPAQ H3100") 87 - .boot_params = 0xc0000100, 87 + .atag_offset = 0x100, 88 88 .map_io = h3100_map_io, 89 89 .init_irq = sa1100_init_irq, 90 90 .timer = &sa1100_timer,
+1 -1
arch/arm/mach-sa1100/h3600.c
··· 125 125 } 126 126 127 127 MACHINE_START(H3600, "Compaq iPAQ H3600") 128 - .boot_params = 0xc0000100, 128 + .atag_offset = 0x100, 129 129 .map_io = h3600_map_io, 130 130 .init_irq = sa1100_init_irq, 131 131 .timer = &sa1100_timer,
+1 -1
arch/arm/mach-sa1100/hackkit.c
··· 195 195 */ 196 196 197 197 MACHINE_START(HACKKIT, "HackKit Cpu Board") 198 - .boot_params = 0xc0000100, 198 + .atag_offset = 0x100, 199 199 .map_io = hackkit_map_io, 200 200 .init_irq = sa1100_init_irq, 201 201 .timer = &sa1100_timer,
+1 -1
arch/arm/mach-sa1100/include/mach/debug-macro.S
··· 12 12 */ 13 13 #include <mach/hardware.h> 14 14 15 - .macro addruart, rp, rv 15 + .macro addruart, rp, rv, tmp 16 16 mrc p15, 0, \rp, c1, c0 17 17 tst \rp, #1 @ MMU enabled? 18 18 moveq \rp, #0x80000000 @ physical base address
+1 -1
arch/arm/mach-sa1100/jornada720.c
··· 364 364 365 365 MACHINE_START(JORNADA720, "HP Jornada 720") 366 366 /* Maintainer: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> */ 367 - .boot_params = 0xc0000100, 367 + .atag_offset = 0x100, 368 368 .map_io = jornada720_map_io, 369 369 .init_irq = sa1100_init_irq, 370 370 .timer = &sa1100_timer,
+1 -1
arch/arm/mach-sa1100/lart.c
··· 61 61 } 62 62 63 63 MACHINE_START(LART, "LART") 64 - .boot_params = 0xc0000100, 64 + .atag_offset = 0x100, 65 65 .map_io = lart_map_io, 66 66 .init_irq = sa1100_init_irq, 67 67 .init_machine = lart_init,
+1 -1
arch/arm/mach-sa1100/nanoengine.c
··· 111 111 } 112 112 113 113 MACHINE_START(NANOENGINE, "BSE nanoEngine") 114 - .boot_params = 0xc0000000, 114 + .atag_offset = 0x100, 115 115 .map_io = nanoengine_map_io, 116 116 .init_irq = sa1100_init_irq, 117 117 .timer = &sa1100_timer,
+1 -1
arch/arm/mach-sa1100/shannon.c
··· 82 82 } 83 83 84 84 MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)") 85 - .boot_params = 0xc0000100, 85 + .atag_offset = 0x100, 86 86 .map_io = shannon_map_io, 87 87 .init_irq = sa1100_init_irq, 88 88 .timer = &sa1100_timer,
+1 -1
arch/arm/mach-sa1100/simpad.c
··· 229 229 230 230 MACHINE_START(SIMPAD, "Simpad") 231 231 /* Maintainer: Holger Freyther */ 232 - .boot_params = 0xc0000100, 232 + .atag_offset = 0x100, 233 233 .map_io = simpad_map_io, 234 234 .init_irq = sa1100_init_irq, 235 235 .timer = &sa1100_timer,
+1 -1
arch/arm/mach-shark/core.c
··· 152 152 153 153 MACHINE_START(SHARK, "Shark") 154 154 /* Maintainer: Alexander Schulz */ 155 - .boot_params = 0x08003000, 155 + .atag_offset = 0x3000, 156 156 .map_io = shark_map_io, 157 157 .init_irq = shark_init_irq, 158 158 .timer = &shark_timer,
+1 -1
arch/arm/mach-shark/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0xe0000000 16 16 orr \rp, \rp, #0x000003f8 17 17 mov \rv, \rp
+3
arch/arm/mach-shmobile/board-ag5evm.c
··· 37 37 #include <linux/mmc/sh_mobile_sdhi.h> 38 38 #include <linux/mfd/tmio.h> 39 39 #include <linux/sh_clk.h> 40 + #include <linux/dma-mapping.h> 40 41 #include <video/sh_mobile_lcdc.h> 41 42 #include <video/sh_mipi_dsi.h> 42 43 #include <sound/sh_fsi.h> ··· 448 447 static void __init ag5evm_map_io(void) 449 448 { 450 449 iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc)); 450 + /* DMA memory at 0xf6000000 - 0xffdfffff */ 451 + init_consistent_dma_size(158 << 20); 451 452 452 453 /* setup early devices and console here as well */ 453 454 sh73a0_add_early_devices();
+3
arch/arm/mach-shmobile/board-ap4evb.c
··· 42 42 #include <linux/leds.h> 43 43 #include <linux/input/sh_keysc.h> 44 44 #include <linux/usb/r8a66597.h> 45 + #include <linux/dma-mapping.h> 45 46 46 47 #include <media/sh_mobile_ceu.h> 47 48 #include <media/sh_mobile_csi2.h> ··· 1171 1170 static void __init ap4evb_map_io(void) 1172 1171 { 1173 1172 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc)); 1173 + /* DMA memory at 0xf6000000 - 0xffdfffff */ 1174 + init_consistent_dma_size(158 << 20); 1174 1175 1175 1176 /* setup early devices and console here as well */ 1176 1177 sh7372_add_early_devices();
+3
arch/arm/mach-shmobile/board-g3evm.c
··· 32 32 #include <linux/gpio.h> 33 33 #include <linux/input.h> 34 34 #include <linux/input/sh_keysc.h> 35 + #include <linux/dma-mapping.h> 35 36 #include <mach/sh7367.h> 36 37 #include <mach/common.h> 37 38 #include <asm/mach-types.h> ··· 261 260 static void __init g3evm_map_io(void) 262 261 { 263 262 iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc)); 263 + /* DMA memory at 0xf6000000 - 0xffdfffff */ 264 + init_consistent_dma_size(158 << 20); 264 265 265 266 /* setup early devices and console here as well */ 266 267 sh7367_add_early_devices();
+3
arch/arm/mach-shmobile/board-g4evm.c
··· 33 33 #include <linux/mmc/host.h> 34 34 #include <linux/mmc/sh_mobile_sdhi.h> 35 35 #include <linux/gpio.h> 36 + #include <linux/dma-mapping.h> 36 37 #include <mach/sh7377.h> 37 38 #include <mach/common.h> 38 39 #include <asm/mach-types.h> ··· 275 274 static void __init g4evm_map_io(void) 276 275 { 277 276 iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc)); 277 + /* DMA memory at 0xf6000000 - 0xffdfffff */ 278 + init_consistent_dma_size(158 << 20); 278 279 279 280 /* setup early devices and console here as well */ 280 281 sh7377_add_early_devices();
+3
arch/arm/mach-shmobile/board-mackerel.c
··· 45 45 #include <linux/tca6416_keypad.h> 46 46 #include <linux/usb/r8a66597.h> 47 47 #include <linux/usb/renesas_usbhs.h> 48 + #include <linux/dma-mapping.h> 48 49 49 50 #include <video/sh_mobile_hdmi.h> 50 51 #include <video/sh_mobile_lcdc.h> ··· 1382 1381 static void __init mackerel_map_io(void) 1383 1382 { 1384 1383 iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc)); 1384 + /* DMA memory at 0xf6000000 - 0xffdfffff */ 1385 + init_consistent_dma_size(158 << 20); 1385 1386 1386 1387 /* setup early devices and console here as well */ 1387 1388 sh7372_add_early_devices();
-3
arch/arm/mach-shmobile/include/mach/memory.h
··· 4 4 #define PLAT_PHYS_OFFSET UL(CONFIG_MEMORY_START) 5 5 #define MEM_SIZE UL(CONFIG_MEMORY_SIZE) 6 6 7 - /* DMA memory at 0xf6000000 - 0xffdfffff */ 8 - #define CONSISTENT_DMA_SIZE (158 << 20) 9 - 10 7 #endif /* __ASM_MACH_MEMORY_H */
-19
arch/arm/mach-spear3xx/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-spear3xx/include/mach/memory.h 3 - * 4 - * Memory map for SPEAr3xx machine family 5 - * 6 - * Copyright (C) 2009 ST Microelectronics 7 - * Viresh Kumar<viresh.kumar@st.com> 8 - * 9 - * This file is licensed under the terms of the GNU General Public 10 - * License version 2. This program is licensed "as is" without any 11 - * warranty of any kind, whether express or implied. 12 - */ 13 - 14 - #ifndef __MACH_MEMORY_H 15 - #define __MACH_MEMORY_H 16 - 17 - #include <plat/memory.h> 18 - 19 - #endif /* __MACH_MEMORY_H */
+1 -1
arch/arm/mach-spear3xx/spear300_evb.c
··· 64 64 } 65 65 66 66 MACHINE_START(SPEAR300, "ST-SPEAR300-EVB") 67 - .boot_params = 0x00000100, 67 + .atag_offset = 0x100, 68 68 .map_io = spear3xx_map_io, 69 69 .init_irq = spear3xx_init_irq, 70 70 .timer = &spear3xx_timer,
+1 -1
arch/arm/mach-spear3xx/spear310_evb.c
··· 70 70 } 71 71 72 72 MACHINE_START(SPEAR310, "ST-SPEAR310-EVB") 73 - .boot_params = 0x00000100, 73 + .atag_offset = 0x100, 74 74 .map_io = spear3xx_map_io, 75 75 .init_irq = spear3xx_init_irq, 76 76 .timer = &spear3xx_timer,
+1 -1
arch/arm/mach-spear3xx/spear320_evb.c
··· 68 68 } 69 69 70 70 MACHINE_START(SPEAR320, "ST-SPEAR320-EVB") 71 - .boot_params = 0x00000100, 71 + .atag_offset = 0x100, 72 72 .map_io = spear3xx_map_io, 73 73 .init_irq = spear3xx_init_irq, 74 74 .timer = &spear3xx_timer,
-19
arch/arm/mach-spear6xx/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-spear6xx/include/mach/memory.h 3 - * 4 - * Memory map for SPEAr6xx machine family 5 - * 6 - * Copyright (C) 2009 ST Microelectronics 7 - * Rajeev Kumar<rajeev-dlh.kumar@st.com> 8 - * 9 - * This file is licensed under the terms of the GNU General Public 10 - * License version 2. This program is licensed "as is" without any 11 - * warranty of any kind, whether express or implied. 12 - */ 13 - 14 - #ifndef __MACH_MEMORY_H 15 - #define __MACH_MEMORY_H 16 - 17 - #include <plat/memory.h> 18 - 19 - #endif /* __MACH_MEMORY_H */
+1 -1
arch/arm/mach-spear6xx/spear600_evb.c
··· 43 43 } 44 44 45 45 MACHINE_START(SPEAR600, "ST-SPEAR600-EVB") 46 - .boot_params = 0x00000100, 46 + .atag_offset = 0x100, 47 47 .map_io = spear6xx_map_io, 48 48 .init_irq = spear6xx_init_irq, 49 49 .timer = &spear6xx_timer,
+1 -1
arch/arm/mach-tcc8k/board-tcc8000-sdk.c
··· 73 73 } 74 74 75 75 MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board") 76 - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 76 + .atag_offset = 0x100, 77 77 .map_io = tcc8k_map_io, 78 78 .init_irq = tcc8k_init_irq, 79 79 .init_machine = tcc8k_init,
+1 -1
arch/arm/mach-tegra/board-harmony.c
··· 179 179 } 180 180 181 181 MACHINE_START(HARMONY, "harmony") 182 - .boot_params = 0x00000100, 182 + .atag_offset = 0x100, 183 183 .fixup = tegra_harmony_fixup, 184 184 .map_io = tegra_map_common_io, 185 185 .init_early = tegra_init_early,
+1 -1
arch/arm/mach-tegra/board-paz00.c
··· 127 127 } 128 128 129 129 MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ") 130 - .boot_params = 0x00000100, 130 + .atag_offset = 0x100, 131 131 .fixup = tegra_paz00_fixup, 132 132 .map_io = tegra_map_common_io, 133 133 .init_early = tegra_init_early,
+3 -3
arch/arm/mach-tegra/board-seaboard.c
··· 201 201 202 202 203 203 MACHINE_START(SEABOARD, "seaboard") 204 - .boot_params = 0x00000100, 204 + .atag_offset = 0x100, 205 205 .map_io = tegra_map_common_io, 206 206 .init_early = tegra_init_early, 207 207 .init_irq = tegra_init_irq, ··· 210 210 MACHINE_END 211 211 212 212 MACHINE_START(KAEN, "kaen") 213 - .boot_params = 0x00000100, 213 + .atag_offset = 0x100, 214 214 .map_io = tegra_map_common_io, 215 215 .init_early = tegra_init_early, 216 216 .init_irq = tegra_init_irq, ··· 219 219 MACHINE_END 220 220 221 221 MACHINE_START(WARIO, "wario") 222 - .boot_params = 0x00000100, 222 + .atag_offset = 0x100, 223 223 .map_io = tegra_map_common_io, 224 224 .init_early = tegra_init_early, 225 225 .init_irq = tegra_init_irq,
+1 -1
arch/arm/mach-tegra/board-trimslice.c
··· 171 171 } 172 172 173 173 MACHINE_START(TRIMSLICE, "trimslice") 174 - .boot_params = 0x00000100, 174 + .atag_offset = 0x100, 175 175 .fixup = tegra_trimslice_fixup, 176 176 .map_io = tegra_map_common_io, 177 177 .init_early = tegra_init_early,
+1 -1
arch/arm/mach-tegra/include/mach/debug-macro.S
··· 21 21 #include <mach/io.h> 22 22 #include <mach/iomap.h> 23 23 24 - .macro addruart, rp, rv 24 + .macro addruart, rp, rv, tmp 25 25 ldr \rp, =IO_APB_PHYS @ physical 26 26 ldr \rv, =IO_APB_VIRT @ virtual 27 27 orr \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF)
-28
arch/arm/mach-tegra/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-tegra/include/mach/memory.h 3 - * 4 - * Copyright (C) 2010 Google, Inc. 5 - * 6 - * Author: 7 - * Colin Cross <ccross@google.com> 8 - * Erik Gilling <konkers@google.com> 9 - * 10 - * This software is licensed under the terms of the GNU General Public 11 - * License version 2, as published by the Free Software Foundation, and 12 - * may be copied, distributed, and modified under those terms. 13 - * 14 - * This program is distributed in the hope that it will be useful, 15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 - * GNU General Public License for more details. 18 - * 19 - */ 20 - 21 - #ifndef __MACH_TEGRA_MEMORY_H 22 - #define __MACH_TEGRA_MEMORY_H 23 - 24 - /* physical offset of RAM */ 25 - #define PLAT_PHYS_OFFSET UL(0) 26 - 27 - #endif 28 -
+3
arch/arm/mach-u300/core.c
··· 25 25 #include <linux/err.h> 26 26 #include <linux/mtd/nand.h> 27 27 #include <linux/mtd/fsmc.h> 28 + #include <linux/dma-mapping.h> 28 29 29 30 #include <asm/types.h> 30 31 #include <asm/setup.h> ··· 93 92 void __init u300_map_io(void) 94 93 { 95 94 iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc)); 95 + /* We enable a real big DMA buffer if need be. */ 96 + init_consistent_dma_size(SZ_4M); 96 97 } 97 98 98 99 /*
+1 -1
arch/arm/mach-u300/include/mach/debug-macro.S
··· 10 10 */ 11 11 #include <mach/hardware.h> 12 12 13 - .macro addruart, rp, rv 13 + .macro addruart, rp, rv, tmp 14 14 /* If we move the address using MMU, use this. */ 15 15 ldr \rp, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address 16 16 ldr \rv, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address
+4 -9
arch/arm/mach-u300/include/mach/memory.h
··· 16 16 #ifdef CONFIG_MACH_U300_DUAL_RAM 17 17 18 18 #define PLAT_PHYS_OFFSET UL(0x48000000) 19 - #define BOOT_PARAMS_OFFSET (PHYS_OFFSET + 0x100) 19 + #define BOOT_PARAMS_OFFSET 0x100 20 20 21 21 #else 22 22 ··· 24 24 #define PLAT_PHYS_OFFSET (0x28000000 + \ 25 25 (CONFIG_MACH_U300_ACCESS_MEM_SIZE - \ 26 26 (CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024) 27 + #define BOOT_PARAMS_OFFSET (0x100 + \ 28 + (CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1)*1024*1024*2) 27 29 #else 28 30 #define PLAT_PHYS_OFFSET (0x28000000 + \ 29 31 (CONFIG_MACH_U300_ACCESS_MEM_SIZE + \ 30 32 (CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024) 33 + #define BOOT_PARAMS_OFFSET 0x100 31 34 #endif 32 - #define BOOT_PARAMS_OFFSET (0x28000000 + \ 33 - (CONFIG_MACH_U300_ACCESS_MEM_SIZE + \ 34 - (CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024 + 0x100) 35 35 #endif 36 - 37 - /* 38 - * We enable a real big DMA buffer if need be. 39 - */ 40 - #define CONSISTENT_DMA_SIZE SZ_4M 41 36 42 37 #endif
+1 -1
arch/arm/mach-u300/u300.c
··· 61 61 62 62 MACHINE_START(U300, MACH_U300_STRING) 63 63 /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ 64 - .boot_params = BOOT_PARAMS_OFFSET, 64 + .atag_offset = BOOT_PARAMS_OFFSET, 65 65 .map_io = u300_map_io, 66 66 .reserve = u300_reserve, 67 67 .init_irq = u300_init_irq,
+3 -3
arch/arm/mach-ux500/board-mop500.c
··· 645 645 646 646 MACHINE_START(U8500, "ST-Ericsson MOP500 platform") 647 647 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */ 648 - .boot_params = 0x100, 648 + .atag_offset = 0x100, 649 649 .map_io = u8500_map_io, 650 650 .init_irq = ux500_init_irq, 651 651 /* we re-use nomadik timer here */ ··· 654 654 MACHINE_END 655 655 656 656 MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+") 657 - .boot_params = 0x100, 657 + .atag_offset = 0x100, 658 658 .map_io = u8500_map_io, 659 659 .init_irq = ux500_init_irq, 660 660 .timer = &ux500_timer, ··· 662 662 MACHINE_END 663 663 664 664 MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") 665 - .boot_params = 0x100, 665 + .atag_offset = 0x100, 666 666 .map_io = u8500_map_io, 667 667 .init_irq = ux500_init_irq, 668 668 /* we re-use nomadik timer here */
+1 -1
arch/arm/mach-ux500/board-u5500.c
··· 118 118 } 119 119 120 120 MACHINE_START(U5500, "ST-Ericsson U5500 Platform") 121 - .boot_params = 0x00000100, 121 + .atag_offset = 0x100, 122 122 .map_io = u5500_map_io, 123 123 .init_irq = ux500_init_irq, 124 124 .timer = &ux500_timer,
+1 -1
arch/arm/mach-ux500/include/mach/debug-macro.S
··· 35 35 #define UX500_UART(n) __UX500_UART(n) 36 36 #define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) 37 37 38 - .macro addruart, rp, rv 38 + .macro addruart, rp, rv, tmp 39 39 ldr \rp, =UART_BASE @ no, physical address 40 40 ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address 41 41 .endm
-18
arch/arm/mach-ux500/include/mach/memory.h
··· 1 - /* 2 - * Copyright (C) 2009 ST-Ericsson 3 - * 4 - * This program is free software; you can redistribute it and/or modify 5 - * it under the terms of the GNU General Public License as published by 6 - * the Free Software Foundation; either version 2 of the License, or 7 - * (at your option) any later version. 8 - */ 9 - #ifndef __ASM_ARCH_MEMORY_H 10 - #define __ASM_ARCH_MEMORY_H 11 - 12 - /* 13 - * Physical DRAM offset. 14 - */ 15 - #define PLAT_PHYS_OFFSET UL(0x00000000) 16 - #define BUS_OFFSET UL(0x00000000) 17 - 18 - #endif
+1 -1
arch/arm/mach-versatile/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0x001F0000 16 16 orr \rp, \rp, #0x00001000 17 17 orr \rv, \rp, #0xf1000000 @ virtual base
-28
arch/arm/mach-versatile/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-versatile/include/mach/memory.h 3 - * 4 - * Copyright (C) 2003 ARM Limited 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - * 16 - * You should have received a copy of the GNU General Public License 17 - * along with this program; if not, write to the Free Software 18 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 - */ 20 - #ifndef __ASM_ARCH_MEMORY_H 21 - #define __ASM_ARCH_MEMORY_H 22 - 23 - /* 24 - * Physical DRAM offset. 25 - */ 26 - #define PLAT_PHYS_OFFSET UL(0x00000000) 27 - 28 - #endif
+1 -1
arch/arm/mach-versatile/versatile_ab.c
··· 35 35 36 36 MACHINE_START(VERSATILE_AB, "ARM-Versatile AB") 37 37 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 38 - .boot_params = 0x00000100, 38 + .atag_offset = 0x100, 39 39 .map_io = versatile_map_io, 40 40 .init_early = versatile_init_early, 41 41 .init_irq = versatile_init_irq,
+1 -1
arch/arm/mach-versatile/versatile_pb.c
··· 103 103 104 104 MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") 105 105 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 106 - .boot_params = 0x00000100, 106 + .atag_offset = 0x100, 107 107 .map_io = versatile_map_io, 108 108 .init_early = versatile_init_early, 109 109 .init_irq = versatile_init_irq,
+1 -1
arch/arm/mach-vexpress/include/mach/debug-macro.S
··· 12 12 13 13 #define DEBUG_LL_UART_OFFSET 0x00009000 14 14 15 - .macro addruart,rp,rv 15 + .macro addruart,rp,rv,tmp 16 16 mov \rp, #DEBUG_LL_UART_OFFSET 17 17 orr \rv, \rp, #0xf8000000 @ virtual base 18 18 orr \rp, \rp, #0x10000000 @ physical base
-25
arch/arm/mach-vexpress/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-vexpress/include/mach/memory.h 3 - * 4 - * Copyright (C) 2003 ARM Limited 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - * 16 - * You should have received a copy of the GNU General Public License 17 - * along with this program; if not, write to the Free Software 18 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 - */ 20 - #ifndef __ASM_ARCH_MEMORY_H 21 - #define __ASM_ARCH_MEMORY_H 22 - 23 - #define PLAT_PHYS_OFFSET UL(0x60000000) 24 - 25 - #endif
+1 -1
arch/arm/mach-vexpress/v2m.c
··· 443 443 } 444 444 445 445 MACHINE_START(VEXPRESS, "ARM-Versatile Express") 446 - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 446 + .atag_offset = 0x100, 447 447 .map_io = v2m_map_io, 448 448 .init_early = v2m_init_early, 449 449 .init_irq = v2m_init_irq,
+1 -1
arch/arm/mach-vt8500/bv07.c
··· 68 68 } 69 69 70 70 MACHINE_START(BV07, "Benign BV07 Mini Netbook") 71 - .boot_params = 0x00000100, 71 + .atag_offset = 0x100, 72 72 .reserve = vt8500_reserve_mem, 73 73 .map_io = vt8500_map_io, 74 74 .init_irq = vt8500_init_irq,
+1 -1
arch/arm/mach-vt8500/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rp, rv 14 + .macro addruart, rp, rv, tmp 15 15 mov \rp, #0x00200000 16 16 orr \rv, \rp, #0xf8000000 17 17 orr \rp, \rp, #0xd8000000
-28
arch/arm/mach-vt8500/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-vt8500/include/mach/memory.h 3 - * 4 - * Copyright (C) 2003 ARM Limited 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - * 16 - * You should have received a copy of the GNU General Public License 17 - * along with this program; if not, write to the Free Software 18 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 - */ 20 - #ifndef __ASM_ARCH_MEMORY_H 21 - #define __ASM_ARCH_MEMORY_H 22 - 23 - /* 24 - * Physical DRAM offset. 25 - */ 26 - #define PHYS_OFFSET UL(0x00000000) 27 - 28 - #endif
+1 -1
arch/arm/mach-vt8500/wm8505_7in.c
··· 68 68 } 69 69 70 70 MACHINE_START(WM8505_7IN_NETBOOK, "WM8505 7-inch generic netbook") 71 - .boot_params = 0x00000100, 71 + .atag_offset = 0x100, 72 72 .reserve = wm8505_reserve_mem, 73 73 .map_io = wm8505_map_io, 74 74 .init_irq = wm8505_init_irq,
-23
arch/arm/mach-w90x900/include/mach/memory.h
··· 1 - /* 2 - * arch/arm/mach-w90x900/include/mach/memory.h 3 - * 4 - * Copyright (c) 2008 Nuvoton technology corporation 5 - * All rights reserved. 6 - * 7 - * Wan ZongShun <mcuos.com@gmail.com> 8 - * 9 - * Based on arch/arm/mach-s3c2410/include/mach/memory.h 10 - * 11 - * This program is free software; you can redistribute it and/or modify 12 - * it under the terms of the GNU General Public License as published by 13 - * the Free Software Foundation; either version 2 of the License, or 14 - * (at your option) any later version. 15 - * 16 - */ 17 - 18 - #ifndef __ASM_ARCH_MEMORY_H 19 - #define __ASM_ARCH_MEMORY_H 20 - 21 - #define PLAT_PHYS_OFFSET UL(0x00000000) 22 - 23 - #endif
-1
arch/arm/mach-w90x900/mach-nuc910evb.c
··· 34 34 35 35 MACHINE_START(W90P910EVB, "W90P910EVB") 36 36 /* Maintainer: Wan ZongShun */ 37 - .boot_params = 0, 38 37 .map_io = nuc910evb_map_io, 39 38 .init_irq = nuc900_init_irq, 40 39 .init_machine = nuc910evb_init,
-1
arch/arm/mach-w90x900/mach-nuc950evb.c
··· 37 37 38 38 MACHINE_START(W90P950EVB, "W90P950EVB") 39 39 /* Maintainer: Wan ZongShun */ 40 - .boot_params = 0, 41 40 .map_io = nuc950evb_map_io, 42 41 .init_irq = nuc900_init_irq, 43 42 .init_machine = nuc950evb_init,
-1
arch/arm/mach-w90x900/mach-nuc960evb.c
··· 34 34 35 35 MACHINE_START(W90N960EVB, "W90N960EVB") 36 36 /* Maintainer: Wan ZongShun */ 37 - .boot_params = 0, 38 37 .map_io = nuc960evb_map_io, 39 38 .init_irq = nuc900_init_irq, 40 39 .init_machine = nuc960evb_init,
+1 -1
arch/arm/mach-zynq/include/mach/debug-macro.S
··· 17 17 #include <mach/zynq_soc.h> 18 18 #include <mach/uart.h> 19 19 20 - .macro addruart, rp, rv 20 + .macro addruart, rp, rv, tmp 21 21 ldr \rp, =LL_UART_PADDR @ physical 22 22 ldr \rv, =LL_UART_VADDR @ virtual 23 23 .endm
-22
arch/arm/mach-zynq/include/mach/memory.h
··· 1 - /* arch/arm/mach-zynq/include/mach/memory.h 2 - * 3 - * Copyright (C) 2011 Xilinx 4 - * 5 - * This software is licensed under the terms of the GNU General Public 6 - * License version 2, as published by the Free Software Foundation, and 7 - * may be copied, distributed, and modified under those terms. 8 - * 9 - * This program is distributed in the hope that it will be useful, 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 - * GNU General Public License for more details. 13 - */ 14 - 15 - #ifndef __MACH_MEMORY_H__ 16 - #define __MACH_MEMORY_H__ 17 - 18 - #include <asm/sizes.h> 19 - 20 - #define PLAT_PHYS_OFFSET UL(0x0) 21 - 22 - #endif
+34 -11
arch/arm/mm/dma-mapping.c
··· 18 18 #include <linux/device.h> 19 19 #include <linux/dma-mapping.h> 20 20 #include <linux/highmem.h> 21 + #include <linux/slab.h> 21 22 22 23 #include <asm/memory.h> 23 24 #include <asm/highmem.h> 24 25 #include <asm/cacheflush.h> 25 26 #include <asm/tlbflush.h> 26 27 #include <asm/sizes.h> 28 + #include <asm/mach/arch.h> 27 29 28 30 #include "mm.h" 29 31 ··· 119 117 } 120 118 121 119 #ifdef CONFIG_MMU 122 - /* Sanity check size */ 123 - #if (CONSISTENT_DMA_SIZE % SZ_2M) 124 - #error "CONSISTENT_DMA_SIZE must be multiple of 2MiB" 125 - #endif 126 120 127 - #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) 128 - #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT) 129 - #define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT) 121 + 122 + #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT) 123 + #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PGDIR_SHIFT) 130 124 131 125 /* 132 126 * These are the page tables (2MB each) covering uncached, DMA consistent allocations 133 127 */ 134 - static pte_t *consistent_pte[NUM_CONSISTENT_PTES]; 128 + static pte_t **consistent_pte; 129 + 130 + #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M 131 + 132 + unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE; 133 + 134 + void __init init_consistent_dma_size(unsigned long size) 135 + { 136 + unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M); 137 + 138 + BUG_ON(consistent_pte); /* Check we're called before DMA region init */ 139 + BUG_ON(base < VMALLOC_END); 140 + 141 + /* Grow region to accommodate specified size */ 142 + if (base < consistent_base) 143 + consistent_base = base; 144 + } 135 145 136 146 #include "vmregion.h" 137 147 138 148 static struct arm_vmregion_head consistent_head = { 139 149 .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock), 140 150 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), 141 - .vm_start = CONSISTENT_BASE, 142 151 .vm_end = CONSISTENT_END, 143 152 }; 144 153 ··· 168 155 pmd_t *pmd; 169 156 pte_t *pte; 170 157 int i = 0; 171 - u32 base = CONSISTENT_BASE; 158 + unsigned long base = consistent_base; 159 + unsigned long num_ptes = (CONSISTENT_END - base) >> PGDIR_SHIFT; 160 + 161 + consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL); 162 + if (!consistent_pte) { 163 + pr_err("%s: no memory\n", __func__); 164 + return -ENOMEM; 165 + } 166 + 167 + pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END); 168 + consistent_head.vm_start = base; 172 169 173 170 do { 174 171 pgd = pgd_offset(&init_mm, base); ··· 221 198 size_t align; 222 199 int bit; 223 200 224 - if (!consistent_pte[0]) { 201 + if (!consistent_pte) { 225 202 printk(KERN_ERR "%s: not initialised\n", __func__); 226 203 dump_stack(); 227 204 return NULL;
-9
arch/arm/mm/init.c
··· 653 653 " ITCM : 0x%08lx - 0x%08lx (%4ld kB)\n" 654 654 #endif 655 655 " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n" 656 - #ifdef CONFIG_MMU 657 - " DMA : 0x%08lx - 0x%08lx (%4ld MB)\n" 658 - #endif 659 656 " vmalloc : 0x%08lx - 0x%08lx (%4ld MB)\n" 660 657 " lowmem : 0x%08lx - 0x%08lx (%4ld MB)\n" 661 658 #ifdef CONFIG_HIGHMEM ··· 671 674 MLK(ITCM_OFFSET, (unsigned long) itcm_end), 672 675 #endif 673 676 MLK(FIXADDR_START, FIXADDR_TOP), 674 - #ifdef CONFIG_MMU 675 - MLM(CONSISTENT_BASE, CONSISTENT_END), 676 - #endif 677 677 MLM(VMALLOC_START, VMALLOC_END), 678 678 MLM(PAGE_OFFSET, (unsigned long)high_memory), 679 679 #ifdef CONFIG_HIGHMEM ··· 693 699 * be detected at build time already. 694 700 */ 695 701 #ifdef CONFIG_MMU 696 - BUILD_BUG_ON(VMALLOC_END > CONSISTENT_BASE); 697 - BUG_ON(VMALLOC_END > CONSISTENT_BASE); 698 - 699 702 BUILD_BUG_ON(TASK_SIZE > MODULES_VADDR); 700 703 BUG_ON(TASK_SIZE > MODULES_VADDR); 701 704 #endif
+1 -1
arch/arm/plat-mxc/include/mach/debug-macro.S
··· 54 54 55 55 #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) 56 56 57 - .macro addruart, rp, rv 57 + .macro addruart, rp, rv, tmp 58 58 ldr \rp, =UART_PADDR @ physical 59 59 ldr \rv, =UART_VADDR @ virtual 60 60 .endm
-58
arch/arm/plat-mxc/include/mach/memory.h
··· 1 - /* 2 - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 3 - */ 4 - 5 - /* 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License version 2 as 8 - * published by the Free Software Foundation. 9 - */ 10 - 11 - #ifndef __ASM_ARCH_MXC_MEMORY_H__ 12 - #define __ASM_ARCH_MXC_MEMORY_H__ 13 - 14 - #define MX1_PHYS_OFFSET UL(0x08000000) 15 - #define MX21_PHYS_OFFSET UL(0xc0000000) 16 - #define MX25_PHYS_OFFSET UL(0x80000000) 17 - #define MX27_PHYS_OFFSET UL(0xa0000000) 18 - #define MX3x_PHYS_OFFSET UL(0x80000000) 19 - #define MX50_PHYS_OFFSET UL(0x70000000) 20 - #define MX51_PHYS_OFFSET UL(0x90000000) 21 - #define MX53_PHYS_OFFSET UL(0x70000000) 22 - 23 - #if !defined(CONFIG_RUNTIME_PHYS_OFFSET) 24 - # if defined CONFIG_ARCH_MX1 25 - # define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET 26 - # elif defined CONFIG_MACH_MX21 27 - # define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET 28 - # elif defined CONFIG_ARCH_MX25 29 - # define PLAT_PHYS_OFFSET MX25_PHYS_OFFSET 30 - # elif defined CONFIG_MACH_MX27 31 - # define PLAT_PHYS_OFFSET MX27_PHYS_OFFSET 32 - # elif defined CONFIG_ARCH_MX3 33 - # define PLAT_PHYS_OFFSET MX3x_PHYS_OFFSET 34 - # elif defined CONFIG_ARCH_MX50 35 - # define PLAT_PHYS_OFFSET MX50_PHYS_OFFSET 36 - # elif defined CONFIG_ARCH_MX51 37 - # define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET 38 - # elif defined CONFIG_ARCH_MX53 39 - # define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET 40 - # endif 41 - #endif 42 - 43 - #if defined(CONFIG_MX3_VIDEO) 44 - /* 45 - * Increase size of DMA-consistent memory region. 46 - * This is required for mx3 camera driver to capture at least two QXGA frames. 47 - */ 48 - #define CONSISTENT_DMA_SIZE SZ_8M 49 - 50 - #elif defined(CONFIG_MX1_VIDEO) || defined(CONFIG_VIDEO_MX2_HOSTSUPPORT) 51 - /* 52 - * Increase size of DMA-consistent memory region. 53 - * This is required for i.MX camera driver to capture at least four VGA frames. 54 - */ 55 - #define CONSISTENT_DMA_SIZE SZ_4M 56 - #endif /* CONFIG_MX1_VIDEO || CONFIG_VIDEO_MX2_HOSTSUPPORT */ 57 - 58 - #endif /* __ASM_ARCH_MXC_MEMORY_H__ */
+1
arch/arm/plat-omap/Kconfig
··· 14 14 select CLKDEV_LOOKUP 15 15 select CLKSRC_MMIO 16 16 select GENERIC_IRQ_CHIP 17 + select NEED_MACH_MEMORY_H 17 18 help 18 19 "Systems based on omap7xx, omap15xx or omap16xx" 19 20
+2
arch/arm/plat-omap/include/plat/io.h
··· 334 334 void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type); 335 335 void omap_iounmap(volatile void __iomem *addr); 336 336 337 + extern void __init omap_init_consistent_dma_size(void); 338 + 337 339 #endif 338 340 339 341 #endif
-102
arch/arm/plat-omap/include/plat/memory.h
··· 1 - /* 2 - * arch/arm/plat-omap/include/mach/memory.h 3 - * 4 - * Memory map for OMAP-1510 and 1610 5 - * 6 - * Copyright (C) 2000 RidgeRun, Inc. 7 - * Author: Greg Lonnon <glonnon@ridgerun.com> 8 - * 9 - * This file was derived from arch/arm/mach-intergrator/include/mach/memory.h 10 - * Copyright (C) 1999 ARM Limited 11 - * 12 - * This program is free software; you can redistribute it and/or modify it 13 - * under the terms of the GNU General Public License as published by the 14 - * Free Software Foundation; either version 2 of the License, or (at your 15 - * option) any later version. 16 - * 17 - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 18 - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 20 - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23 - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 24 - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 - * 28 - * You should have received a copy of the GNU General Public License along 29 - * with this program; if not, write to the Free Software Foundation, Inc., 30 - * 675 Mass Ave, Cambridge, MA 02139, USA. 31 - */ 32 - 33 - #ifndef __ASM_ARCH_MEMORY_H 34 - #define __ASM_ARCH_MEMORY_H 35 - 36 - /* 37 - * Physical DRAM offset. 38 - */ 39 - #if defined(CONFIG_ARCH_OMAP1) 40 - #define PLAT_PHYS_OFFSET UL(0x10000000) 41 - #else 42 - #define PLAT_PHYS_OFFSET UL(0x80000000) 43 - #endif 44 - 45 - /* 46 - * Bus address is physical address, except for OMAP-1510 Local Bus. 47 - * OMAP-1510 bus address is translated into a Local Bus address if the 48 - * OMAP bus type is lbus. We do the address translation based on the 49 - * device overriding the defaults used in the dma-mapping API. 50 - * Note that the is_lbus_device() test is not very efficient on 1510 51 - * because of the strncmp(). 52 - */ 53 - #ifdef CONFIG_ARCH_OMAP15XX 54 - 55 - /* 56 - * OMAP-1510 Local Bus address offset 57 - */ 58 - #define OMAP1510_LB_OFFSET UL(0x30000000) 59 - 60 - #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) 61 - #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) 62 - #define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) 63 - 64 - #define __arch_pfn_to_dma(dev, pfn) \ 65 - ({ dma_addr_t __dma = __pfn_to_phys(pfn); \ 66 - if (is_lbus_device(dev)) \ 67 - __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ 68 - __dma; }) 69 - 70 - #define __arch_dma_to_pfn(dev, addr) \ 71 - ({ dma_addr_t __dma = addr; \ 72 - if (is_lbus_device(dev)) \ 73 - __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ 74 - __phys_to_pfn(__dma); \ 75 - }) 76 - 77 - #define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ 78 - lbus_to_virt(addr) : \ 79 - __phys_to_virt(addr)); }) 80 - 81 - #define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ 82 - (dma_addr_t) (is_lbus_device(dev) ? \ 83 - virt_to_lbus(__addr) : \ 84 - __virt_to_phys(__addr)); }) 85 - 86 - #endif /* CONFIG_ARCH_OMAP15XX */ 87 - 88 - /* Override the ARM default */ 89 - #ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE 90 - 91 - #if (CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE == 0) 92 - #undef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE 93 - #define CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE 2 94 - #endif 95 - 96 - #define CONSISTENT_DMA_SIZE \ 97 - (((CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE + 1) & ~1) * 1024 * 1024) 98 - 99 - #endif 100 - 101 - #endif 102 -
+3 -3
arch/arm/plat-omap/include/plat/serial.h
··· 16 16 #include <linux/init.h> 17 17 18 18 /* 19 - * Memory entry used for the DEBUG_LL UART configuration. See also 20 - * uncompress.h and debug-macro.S. 19 + * Memory entry used for the DEBUG_LL UART configuration, relative to 20 + * start of RAM. See also uncompress.h and debug-macro.S. 21 21 * 22 22 * Note that using a memory location for storing the UART configuration 23 23 * has at least two limitations: ··· 27 27 * 2. We assume printascii is called at least once before paging_init, 28 28 * and addruart has a chance to read OMAP_UART_INFO 29 29 */ 30 - #define OMAP_UART_INFO (PLAT_PHYS_OFFSET + 0x3ffc) 30 + #define OMAP_UART_INFO_OFS 0x3ffc 31 31 32 32 /* OMAP1 serial ports */ 33 33 #define OMAP1_UART1_BASE 0xfffb0000
+7 -1
arch/arm/plat-omap/include/plat/uncompress.h
··· 36 36 */ 37 37 static void set_omap_uart_info(unsigned char port) 38 38 { 39 - *(volatile u32 *)OMAP_UART_INFO = port; 39 + /* 40 + * Get address of some.bss variable and round it down 41 + * a la CONFIG_AUTO_ZRELADDR. 42 + */ 43 + u32 ram_start = (u32)&uart_shift & 0xf8000000; 44 + u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); 45 + *uart_info = port; 40 46 } 41 47 42 48 static void putc(int c)
+8
arch/arm/plat-omap/io.c
··· 12 12 #include <linux/module.h> 13 13 #include <linux/io.h> 14 14 #include <linux/mm.h> 15 + #include <linux/dma-mapping.h> 15 16 16 17 #include <plat/omap7xx.h> 17 18 #include <plat/omap1510.h> ··· 145 144 __iounmap(addr); 146 145 } 147 146 EXPORT_SYMBOL(omap_iounmap); 147 + 148 + void __init omap_init_consistent_dma_size(void) 149 + { 150 + #ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE 151 + init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20); 152 + #endif 153 + } 148 154 149 155 void __init omap_ioremap_init(void) 150 156 {
+1 -1
arch/arm/plat-spear/include/plat/debug-macro.S
··· 14 14 #include <linux/amba/serial.h> 15 15 #include <mach/hardware.h> 16 16 17 - .macro addruart, rp, rv 17 + .macro addruart, rp, rv, tmp 18 18 mov \rp, #SPEAR_DBG_UART_BASE @ Physical base 19 19 mov \rv, #VA_SPEAR_DBG_UART_BASE @ Virtual base 20 20 .endm
-20
arch/arm/plat-spear/include/plat/memory.h
··· 1 - /* 2 - * arch/arm/plat-spear/include/plat/memory.h 3 - * 4 - * Memory map for SPEAr platform 5 - * 6 - * Copyright (C) 2009 ST Microelectronics 7 - * Viresh Kumar<viresh.kumar@st.com> 8 - * 9 - * This file is licensed under the terms of the GNU General Public 10 - * License version 2. This program is licensed "as is" without any 11 - * warranty of any kind, whether express or implied. 12 - */ 13 - 14 - #ifndef __PLAT_MEMORY_H 15 - #define __PLAT_MEMORY_H 16 - 17 - /* Physical DRAM offset */ 18 - #define PLAT_PHYS_OFFSET UL(0x00000000) 19 - 20 - #endif /* __PLAT_MEMORY_H */
+1 -1
arch/arm/plat-tcc/include/mach/debug-macro.S
··· 9 9 * 10 10 */ 11 11 12 - .macro addruart, rp, rv 12 + .macro addruart, rp, rv, tmp 13 13 moveq \rp, #0x90000000 @ physical base address 14 14 movne \rv, #0xF1000000 @ virtual base 15 15 orr \rp, \rp, #0x00007000 @ UART0
-18
arch/arm/plat-tcc/include/mach/memory.h
··· 1 - /* 2 - * Copyright (C) 1999 ARM Limited 3 - * Copyright (C) 2000 RidgeRun, Inc. 4 - * Copyright (C) 2008-2009 Telechips 5 - * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de> 6 - * 7 - * Licensed under the terms of the GPL v2. 8 - */ 9 - 10 - #ifndef __ASM_ARCH_MEMORY_H 11 - #define __ASM_ARCH_MEMORY_H 12 - 13 - /* 14 - * Physical DRAM offset. 15 - */ 16 - #define PLAT_PHYS_OFFSET UL(0x20000000) 17 - 18 - #endif
-6
drivers/usb/musb/musb_debugfs.c
··· 41 41 #include <linux/debugfs.h> 42 42 #include <linux/seq_file.h> 43 43 44 - #ifdef CONFIG_ARM 45 - #include <mach/hardware.h> 46 - #include <mach/memory.h> 47 - #include <asm/mach-types.h> 48 - #endif 49 - 50 44 #include <asm/uaccess.h> 51 45 52 46 #include "musb_core.h"