tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'i2c/for-current-fixed' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:
"A set of driver fixes for the I2C subsystem"

* 'i2c/for-current-fixed' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: s3c2410: Mark expected switch fall-through
i2c: at91: fix clk_offset for sama5d2
i2c: at91: disable TXRDY interrupt after sending data
i2c: iproc: Fix i2c master read more than 63 bytes
eeprom: at24: make spd world-readable again

Linus Torvalds cf6c8aef 8b7fd679

+14 -10
unified split
+1 -1
drivers/i2c/busses/i2c-at91-core.c
··· 142 143 static struct at91_twi_pdata sama5d2_config = { 144 .clk_max_div = 7, 145 - .clk_offset = 4, 146 .has_unre_flag = true, 147 .has_alt_cmd = true, 148 .has_hold_field = true,
··· 142 143 static struct at91_twi_pdata sama5d2_config = { 144 .clk_max_div = 7, 145 + .clk_offset = 3, 146 .has_unre_flag = true, 147 .has_alt_cmd = true, 148 .has_hold_field = true,
+5 -4
drivers/i2c/busses/i2c-at91-master.c
··· 122 writeb_relaxed(*dev->buf, dev->base + AT91_TWI_THR); 123 124 /* send stop when last byte has been written */ 125 - if (--dev->buf_len == 0) 126 if (!dev->use_alt_cmd) 127 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP); 128 129 dev_dbg(dev->dev, "wrote 0x%x, to go %zu\n", *dev->buf, dev->buf_len); 130 ··· 544 } else { 545 at91_twi_write_next_byte(dev); 546 at91_twi_write(dev, AT91_TWI_IER, 547 - AT91_TWI_TXCOMP | 548 - AT91_TWI_NACK | 549 - AT91_TWI_TXRDY); 550 } 551 } 552
··· 122 writeb_relaxed(*dev->buf, dev->base + AT91_TWI_THR); 123 124 /* send stop when last byte has been written */ 125 + if (--dev->buf_len == 0) { 126 if (!dev->use_alt_cmd) 127 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP); 128 + at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_TXRDY); 129 + } 130 131 dev_dbg(dev->dev, "wrote 0x%x, to go %zu\n", *dev->buf, dev->buf_len); 132 ··· 542 } else { 543 at91_twi_write_next_byte(dev); 544 at91_twi_write(dev, AT91_TWI_IER, 545 + AT91_TWI_TXCOMP | AT91_TWI_NACK | 546 + (dev->buf_len ? AT91_TWI_TXRDY : 0)); 547 } 548 } 549
+6 -4
drivers/i2c/busses/i2c-bcm-iproc.c
··· 392 static void bcm_iproc_i2c_read_valid_bytes(struct bcm_iproc_i2c_dev *iproc_i2c) 393 { 394 struct i2c_msg *msg = iproc_i2c->msg; 395 396 /* Read valid data from RX FIFO */ 397 while (iproc_i2c->rx_bytes < msg->len) { 398 - if (!((iproc_i2c_rd_reg(iproc_i2c, M_FIFO_CTRL_OFFSET) >> M_FIFO_RX_CNT_SHIFT) 399 - & M_FIFO_RX_CNT_MASK)) 400 break; 401 402 msg->buf[iproc_i2c->rx_bytes] = 403 - (iproc_i2c_rd_reg(iproc_i2c, M_RX_OFFSET) >> 404 - M_RX_DATA_SHIFT) & M_RX_DATA_MASK; 405 iproc_i2c->rx_bytes++; 406 } 407 }
··· 392 static void bcm_iproc_i2c_read_valid_bytes(struct bcm_iproc_i2c_dev *iproc_i2c) 393 { 394 struct i2c_msg *msg = iproc_i2c->msg; 395 + uint32_t val; 396 397 /* Read valid data from RX FIFO */ 398 while (iproc_i2c->rx_bytes < msg->len) { 399 + val = iproc_i2c_rd_reg(iproc_i2c, M_RX_OFFSET); 400 + 401 + /* rx fifo empty */ 402 + if (!((val >> M_RX_STATUS_SHIFT) & M_RX_STATUS_MASK)) 403 break; 404 405 msg->buf[iproc_i2c->rx_bytes] = 406 + (val >> M_RX_DATA_SHIFT) & M_RX_DATA_MASK; 407 iproc_i2c->rx_bytes++; 408 } 409 }
+1
drivers/i2c/busses/i2c-s3c2410.c
··· 435 * fall through to the write state, as we will need to 436 * send a byte as well 437 */ 438 439 case STATE_WRITE: 440 /*
··· 435 * fall through to the write state, as we will need to 436 * send a byte as well 437 */ 438 + /* Fall through */ 439 440 case STATE_WRITE: 441 /*
+1 -1
drivers/misc/eeprom/at24.c
··· 685 nvmem_config.name = dev_name(dev); 686 nvmem_config.dev = dev; 687 nvmem_config.read_only = !writable; 688 - nvmem_config.root_only = true; 689 nvmem_config.owner = THIS_MODULE; 690 nvmem_config.compat = true; 691 nvmem_config.base_dev = dev;
··· 685 nvmem_config.name = dev_name(dev); 686 nvmem_config.dev = dev; 687 nvmem_config.read_only = !writable; 688 + nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO); 689 nvmem_config.owner = THIS_MODULE; 690 nvmem_config.compat = true; 691 nvmem_config.base_dev = dev;