tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

pinctrl: sunxi: add missed lvds pins for a100/a133

lvds, lcd, dsi all shares the same GPIO D bank and lvds0
data 3 lines and lvds1 pins are missed, add them.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Link: https://lore.kernel.org/20241227-a133-display-support-v1-10-13b52f71fb14@linumiz.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Parthiban Nallathambi and committed by
Linus Walleij cef4f1b5 0e18b099

+12
+12
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
··· 256 256 SUNXI_FUNCTION(0x0, "gpio_in"), 257 257 SUNXI_FUNCTION(0x1, "gpio_out"), 258 258 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ 259 + SUNXI_FUNCTION(0x3, "lvds0"), /* D3P */ 259 260 SUNXI_FUNCTION(0x4, "dsi0"), /* DP3 */ 260 261 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), 261 262 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), 262 263 SUNXI_FUNCTION(0x0, "gpio_in"), 263 264 SUNXI_FUNCTION(0x1, "gpio_out"), 264 265 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ 266 + SUNXI_FUNCTION(0x3, "lvds0"), /* D3N */ 265 267 SUNXI_FUNCTION(0x4, "dsi0"), /* DM3 */ 266 268 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), 267 269 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), 268 270 SUNXI_FUNCTION(0x0, "gpio_in"), 269 271 SUNXI_FUNCTION(0x1, "gpio_out"), 270 272 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ 273 + SUNXI_FUNCTION(0x3, "lvds1"), /* D0P */ 271 274 SUNXI_FUNCTION(0x4, "spi1"), /* CS */ 272 275 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), 273 276 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), 274 277 SUNXI_FUNCTION(0x0, "gpio_in"), 275 278 SUNXI_FUNCTION(0x1, "gpio_out"), 276 279 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ 280 + SUNXI_FUNCTION(0x3, "lvds1"), /* D0N */ 277 281 SUNXI_FUNCTION(0x4, "spi1"), /* CLK */ 278 282 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), 279 283 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), 280 284 SUNXI_FUNCTION(0x0, "gpio_in"), 281 285 SUNXI_FUNCTION(0x1, "gpio_out"), 282 286 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ 287 + SUNXI_FUNCTION(0x3, "lvds1"), /* D1P */ 283 288 SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */ 284 289 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), 285 290 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), 286 291 SUNXI_FUNCTION(0x0, "gpio_in"), 287 292 SUNXI_FUNCTION(0x1, "gpio_out"), 288 293 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ 294 + SUNXI_FUNCTION(0x3, "lvds1"), /* D1N */ 289 295 SUNXI_FUNCTION(0x4, "spi1"), /* MISO */ 290 296 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), 291 297 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), 292 298 SUNXI_FUNCTION(0x0, "gpio_in"), 293 299 SUNXI_FUNCTION(0x1, "gpio_out"), 294 300 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ 301 + SUNXI_FUNCTION(0x3, "lvds1"), /* D2P */ 295 302 SUNXI_FUNCTION(0x4, "uart3"), /* TX */ 296 303 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), 297 304 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), 298 305 SUNXI_FUNCTION(0x0, "gpio_in"), 299 306 SUNXI_FUNCTION(0x1, "gpio_out"), 300 307 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ 308 + SUNXI_FUNCTION(0x3, "lvds1"), /* D2N */ 301 309 SUNXI_FUNCTION(0x4, "uart3"), /* RX */ 302 310 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)), 303 311 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), 304 312 SUNXI_FUNCTION(0x0, "gpio_in"), 305 313 SUNXI_FUNCTION(0x1, "gpio_out"), 306 314 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ 315 + SUNXI_FUNCTION(0x3, "lvds1"), /* CKP */ 307 316 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ 308 317 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)), 309 318 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), 310 319 SUNXI_FUNCTION(0x0, "gpio_in"), 311 320 SUNXI_FUNCTION(0x1, "gpio_out"), 312 321 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ 322 + SUNXI_FUNCTION(0x3, "lvds1"), /* CKN */ 313 323 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ 314 324 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)), 315 325 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), 316 326 SUNXI_FUNCTION(0x0, "gpio_in"), 317 327 SUNXI_FUNCTION(0x1, "gpio_out"), 318 328 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ 329 + SUNXI_FUNCTION(0x3, "lvds1"), /* D3P */ 319 330 SUNXI_FUNCTION(0x4, "uart4"), /* TX */ 320 331 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)), 321 332 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), 322 333 SUNXI_FUNCTION(0x0, "gpio_in"), 323 334 SUNXI_FUNCTION(0x1, "gpio_out"), 324 335 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ 336 + SUNXI_FUNCTION(0x3, "lvds1"), /* D3N */ 325 337 SUNXI_FUNCTION(0x4, "uart4"), /* RX */ 326 338 SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)), 327 339 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),