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ASoC: dt-bindings: mediatek,mt8365-afe: Add audio afe document
Add MT8365 audio front-end bindings
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://patch.msgid.link/20240226-audio-i350-v7-1-6518d953a141@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Alexandre Mergnat
and committed by
Mark Brown
ceb3ca28
dc70fd02
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Documentation/devicetree/bindings/sound/mediatek,mt8365-afe.yaml
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Documentation/devicetree/bindings/sound/mediatek,mt8365-afe.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mediatek,mt8365-afe.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek Audio Front End PCM controller for MT8365
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maintainers:
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- Alexandre Mergnat <amergnat@baylibre.com>
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properties:
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compatible:
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const: mediatek,mt8365-afe-pcm
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reg:
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maxItems: 1
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"#sound-dai-cells":
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const: 0
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clocks:
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items:
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- description: 26M clock
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- description: mux for audio clock
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- description: audio i2s0 mck
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- description: audio i2s1 mck
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- description: audio i2s2 mck
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- description: audio i2s3 mck
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- description: engen 1 clock
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- description: engen 2 clock
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- description: audio 1 clock
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- description: audio 2 clock
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- description: mux for i2s0
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- description: mux for i2s1
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- description: mux for i2s2
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- description: mux for i2s3
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clock-names:
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items:
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- const: top_clk26m_clk
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- const: top_audio_sel
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- const: audio_i2s0_m
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- const: audio_i2s1_m
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- const: audio_i2s2_m
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- const: audio_i2s3_m
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- const: engen1
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- const: engen2
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- const: aud1
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- const: aud2
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- const: i2s0_m_sel
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- const: i2s1_m_sel
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- const: i2s2_m_sel
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- const: i2s3_m_sel
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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mediatek,dmic-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Indicates how many data pins are used to transmit two channels of PDM
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signal. 1 means two wires, 0 means one wire. Default value is 0.
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enum:
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- 0 # one wire
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- 1 # two wires
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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- power-domains
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mediatek,mt8365-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/mediatek,mt8365-power.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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audio-controller@11220000 {
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compatible = "mediatek,mt8365-afe-pcm";
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reg = <0 0x11220000 0 0x1000>;
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#sound-dai-cells = <0>;
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clocks = <&clk26m>,
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<&topckgen CLK_TOP_AUDIO_SEL>,
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<&topckgen CLK_TOP_AUD_I2S0_M>,
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<&topckgen CLK_TOP_AUD_I2S1_M>,
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<&topckgen CLK_TOP_AUD_I2S2_M>,
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<&topckgen CLK_TOP_AUD_I2S3_M>,
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<&topckgen CLK_TOP_AUD_ENGEN1_SEL>,
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<&topckgen CLK_TOP_AUD_ENGEN2_SEL>,
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<&topckgen CLK_TOP_AUD_1_SEL>,
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<&topckgen CLK_TOP_AUD_2_SEL>,
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<&topckgen CLK_TOP_APLL_I2S0_SEL>,
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<&topckgen CLK_TOP_APLL_I2S1_SEL>,
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<&topckgen CLK_TOP_APLL_I2S2_SEL>,
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<&topckgen CLK_TOP_APLL_I2S3_SEL>;
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clock-names = "top_clk26m_clk",
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"top_audio_sel",
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"audio_i2s0_m",
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"audio_i2s1_m",
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"audio_i2s2_m",
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"audio_i2s3_m",
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"engen1",
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"engen2",
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"aud1",
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"aud2",
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"i2s0_m_sel",
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"i2s1_m_sel",
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"i2s2_m_sel",
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"i2s3_m_sel";
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&spm MT8365_POWER_DOMAIN_AUDIO>;
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mediatek,dmic-mode = <1>;
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};
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};
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...