Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'pwm/for-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
"This release cycle's updates are mostly cleanup and some minor fixes"

* tag 'pwm/for-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
dt-bindings: pwm: renesas,pwm-rcar: Add r8a7742 support
dt-bindings: pwm: renesas,tpu-pwm: Document r8a7742 support
pwm: Allow store 64-bit duty cycle from sysfs interface
pwm: img: Fix null pointer access in probe
pwm: pca9685: Disable unused alternative addresses
pwm: pca9685: Use BIT() macro instead of shift
pwm: pca9685: Make comments more consistent
pwm: sun4i: Simplify with dev_err_probe()
pwm: sprd: Simplify with dev_err_probe()
pwm: sifive: Simplify with dev_err_probe()
pwm: rockchip: Simplify with dev_err_probe()
pwm: jz4740: Simplify with dev_err_probe()
pwm: bcm2835: Simplify with dev_err_probe()
pwm: Convert to use DEFINE_SEQ_ATTRIBUTE macro
pwm: rockchip: Keep enabled PWMs running while probing
dt-bindings: pwm: renesas,pwm-rcar: Add r8a774e1 support

+67 -90
+2
Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml
··· 13 13 compatible: 14 14 items: 15 15 - enum: 16 + - renesas,pwm-r8a7742 # RZ/G1H 16 17 - renesas,pwm-r8a7743 # RZ/G1M 17 18 - renesas,pwm-r8a7744 # RZ/G1N 18 19 - renesas,pwm-r8a7745 # RZ/G1E ··· 21 20 - renesas,pwm-r8a774a1 # RZ/G2M 22 21 - renesas,pwm-r8a774b1 # RZ/G2N 23 22 - renesas,pwm-r8a774c0 # RZ/G2E 23 + - renesas,pwm-r8a774e1 # RZ/G2H 24 24 - renesas,pwm-r8a7778 # R-Car M1A 25 25 - renesas,pwm-r8a7779 # R-Car H1 26 26 - renesas,pwm-r8a7790 # R-Car H2
+1
Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml
··· 15 15 - enum: 16 16 - renesas,tpu-r8a73a4 # R-Mobile APE6 17 17 - renesas,tpu-r8a7740 # R-Mobile A1 18 + - renesas,tpu-r8a7742 # RZ/G1H 18 19 - renesas,tpu-r8a7743 # RZ/G1M 19 20 - renesas,tpu-r8a7744 # RZ/G1N 20 21 - renesas,tpu-r8a7745 # RZ/G1E
+3 -14
drivers/pwm/core.c
··· 1327 1327 return 0; 1328 1328 } 1329 1329 1330 - static const struct seq_operations pwm_seq_ops = { 1330 + static const struct seq_operations pwm_debugfs_sops = { 1331 1331 .start = pwm_seq_start, 1332 1332 .next = pwm_seq_next, 1333 1333 .stop = pwm_seq_stop, 1334 1334 .show = pwm_seq_show, 1335 1335 }; 1336 1336 1337 - static int pwm_seq_open(struct inode *inode, struct file *file) 1338 - { 1339 - return seq_open(file, &pwm_seq_ops); 1340 - } 1341 - 1342 - static const struct file_operations pwm_debugfs_ops = { 1343 - .owner = THIS_MODULE, 1344 - .open = pwm_seq_open, 1345 - .read = seq_read, 1346 - .llseek = seq_lseek, 1347 - .release = seq_release, 1348 - }; 1337 + DEFINE_SEQ_ATTRIBUTE(pwm_debugfs); 1349 1338 1350 1339 static int __init pwm_debugfs_init(void) 1351 1340 { 1352 1341 debugfs_create_file("pwm", S_IFREG | S_IRUGO, NULL, NULL, 1353 - &pwm_debugfs_ops); 1342 + &pwm_debugfs_fops); 1354 1343 1355 1344 return 0; 1356 1345 }
+3 -7
drivers/pwm/pwm-bcm2835.c
··· 152 152 return PTR_ERR(pc->base); 153 153 154 154 pc->clk = devm_clk_get(&pdev->dev, NULL); 155 - if (IS_ERR(pc->clk)) { 156 - ret = PTR_ERR(pc->clk); 157 - if (ret != -EPROBE_DEFER) 158 - dev_err(&pdev->dev, "clock not found: %d\n", ret); 159 - 160 - return ret; 161 - } 155 + if (IS_ERR(pc->clk)) 156 + return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk), 157 + "clock not found\n"); 162 158 163 159 ret = clk_prepare_enable(pc->clk); 164 160 if (ret)
+2 -1
drivers/pwm/pwm-img.c
··· 277 277 return PTR_ERR(pwm->pwm_clk); 278 278 } 279 279 280 + platform_set_drvdata(pdev, pwm); 281 + 280 282 pm_runtime_set_autosuspend_delay(&pdev->dev, IMG_PWM_PM_TIMEOUT); 281 283 pm_runtime_use_autosuspend(&pdev->dev); 282 284 pm_runtime_enable(&pdev->dev); ··· 315 313 goto err_suspend; 316 314 } 317 315 318 - platform_set_drvdata(pdev, pwm); 319 316 return 0; 320 317 321 318 err_suspend:
+3 -6
drivers/pwm/pwm-jz4740.c
··· 60 60 snprintf(name, sizeof(name), "timer%u", pwm->hwpwm); 61 61 62 62 clk = clk_get(chip->dev, name); 63 - if (IS_ERR(clk)) { 64 - if (PTR_ERR(clk) != -EPROBE_DEFER) 65 - dev_err(chip->dev, "Failed to get clock: %pe", clk); 66 - 67 - return PTR_ERR(clk); 68 - } 63 + if (IS_ERR(clk)) 64 + return dev_err_probe(chip->dev, PTR_ERR(clk), 65 + "Failed to get clock\n"); 69 66 70 67 err = clk_prepare_enable(clk); 71 68 if (err < 0) {
+27 -18
drivers/pwm/pwm-pca9685.c
··· 57 57 #define PCA9685_NUMREGS 0xFF 58 58 #define PCA9685_MAXCHAN 0x10 59 59 60 - #define LED_FULL (1 << 4) 61 - #define MODE1_SLEEP (1 << 4) 62 - #define MODE2_INVRT (1 << 4) 63 - #define MODE2_OUTDRV (1 << 2) 60 + #define LED_FULL BIT(4) 61 + #define MODE1_ALLCALL BIT(0) 62 + #define MODE1_SUB3 BIT(1) 63 + #define MODE1_SUB2 BIT(2) 64 + #define MODE1_SUB1 BIT(3) 65 + #define MODE1_SLEEP BIT(4) 66 + #define MODE2_INVRT BIT(4) 67 + #define MODE2_OUTDRV BIT(2) 64 68 65 69 #define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N))) 66 70 #define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N))) ··· 95 91 mutex_lock(&pca->lock); 96 92 if (pwm_idx >= PCA9685_MAXCHAN) { 97 93 /* 98 - * "all LEDs" channel: 94 + * "All LEDs" channel: 99 95 * pretend already in use if any of the PWMs are requested 100 96 */ 101 97 if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) { ··· 104 100 } 105 101 } else { 106 102 /* 107 - * regular channel: 103 + * Regular channel: 108 104 * pretend already in use if the "all LEDs" channel is requested 109 105 */ 110 106 if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) { ··· 261 257 if (prescale >= PCA9685_PRESCALE_MIN && 262 258 prescale <= PCA9685_PRESCALE_MAX) { 263 259 /* 264 - * putting the chip briefly into SLEEP mode 260 + * Putting the chip briefly into SLEEP mode 265 261 * at this point won't interfere with the 266 262 * pm_runtime framework, because the pm_runtime 267 263 * state is guaranteed active here. ··· 447 443 const struct i2c_device_id *id) 448 444 { 449 445 struct pca9685 *pca; 446 + unsigned int reg; 450 447 int ret; 451 - int mode2; 452 448 453 449 pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL); 454 450 if (!pca) ··· 465 461 466 462 i2c_set_clientdata(client, pca); 467 463 468 - regmap_read(pca->regmap, PCA9685_MODE2, &mode2); 464 + regmap_read(pca->regmap, PCA9685_MODE2, &reg); 469 465 470 466 if (device_property_read_bool(&client->dev, "invert")) 471 - mode2 |= MODE2_INVRT; 467 + reg |= MODE2_INVRT; 472 468 else 473 - mode2 &= ~MODE2_INVRT; 469 + reg &= ~MODE2_INVRT; 474 470 475 471 if (device_property_read_bool(&client->dev, "open-drain")) 476 - mode2 &= ~MODE2_OUTDRV; 472 + reg &= ~MODE2_OUTDRV; 477 473 else 478 - mode2 |= MODE2_OUTDRV; 474 + reg |= MODE2_OUTDRV; 479 475 480 - regmap_write(pca->regmap, PCA9685_MODE2, mode2); 476 + regmap_write(pca->regmap, PCA9685_MODE2, reg); 481 477 482 - /* clear all "full off" bits */ 478 + /* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */ 479 + regmap_read(pca->regmap, PCA9685_MODE1, &reg); 480 + reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3); 481 + regmap_write(pca->regmap, PCA9685_MODE1, reg); 482 + 483 + /* Clear all "full off" bits */ 483 484 regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_L, 0); 484 485 regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, 0); 485 486 486 487 pca->chip.ops = &pca9685_pwm_ops; 487 - /* add an extra channel for ALL_LED */ 488 + /* Add an extra channel for ALL_LED */ 488 489 pca->chip.npwm = PCA9685_MAXCHAN + 1; 489 490 490 491 pca->chip.dev = &client->dev; ··· 505 496 return ret; 506 497 } 507 498 508 - /* the chip comes out of power-up in the active state */ 499 + /* The chip comes out of power-up in the active state */ 509 500 pm_runtime_set_active(&client->dev); 510 501 /* 511 - * enable will put the chip into suspend, which is what we 502 + * Enable will put the chip into suspend, which is what we 512 503 * want as all outputs are disabled at this point 513 504 */ 514 505 pm_runtime_enable(&client->dev);
+7 -8
drivers/pwm/pwm-rockchip.c
··· 288 288 const struct of_device_id *id; 289 289 struct rockchip_pwm_chip *pc; 290 290 struct resource *r; 291 + u32 enable_conf, ctrl; 291 292 int ret, count; 292 293 293 294 id = of_match_device(rockchip_pwm_dt_ids, &pdev->dev); ··· 307 306 pc->clk = devm_clk_get(&pdev->dev, "pwm"); 308 307 if (IS_ERR(pc->clk)) { 309 308 pc->clk = devm_clk_get(&pdev->dev, NULL); 310 - if (IS_ERR(pc->clk)) { 311 - ret = PTR_ERR(pc->clk); 312 - if (ret != -EPROBE_DEFER) 313 - dev_err(&pdev->dev, "Can't get bus clk: %d\n", 314 - ret); 315 - return ret; 316 - } 309 + if (IS_ERR(pc->clk)) 310 + return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk), 311 + "Can't get bus clk\n"); 317 312 } 318 313 319 314 count = of_count_phandle_with_args(pdev->dev.of_node, ··· 359 362 } 360 363 361 364 /* Keep the PWM clk enabled if the PWM appears to be up and running. */ 362 - if (!pwm_is_enabled(pc->chip.pwms)) 365 + enable_conf = pc->data->enable_conf; 366 + ctrl = readl_relaxed(pc->base + pc->data->regs.ctrl); 367 + if ((ctrl & enable_conf) != enable_conf) 363 368 clk_disable(pc->clk); 364 369 365 370 return 0;
+3 -5
drivers/pwm/pwm-sifive.c
··· 254 254 return PTR_ERR(ddata->regs); 255 255 256 256 ddata->clk = devm_clk_get(dev, NULL); 257 - if (IS_ERR(ddata->clk)) { 258 - if (PTR_ERR(ddata->clk) != -EPROBE_DEFER) 259 - dev_err(dev, "Unable to find controller clock\n"); 260 - return PTR_ERR(ddata->clk); 261 - } 257 + if (IS_ERR(ddata->clk)) 258 + return dev_err_probe(dev, PTR_ERR(ddata->clk), 259 + "Unable to find controller clock\n"); 262 260 263 261 ret = clk_prepare_enable(ddata->clk); 264 262 if (ret) {
+2 -5
drivers/pwm/pwm-sprd.c
··· 228 228 if (ret == -ENOENT) 229 229 break; 230 230 231 - if (ret != -EPROBE_DEFER) 232 - dev_err(spc->dev, 233 - "failed to get channel clocks\n"); 234 - 235 - return ret; 231 + return dev_err_probe(spc->dev, ret, 232 + "failed to get channel clocks\n"); 236 233 } 237 234 238 235 clk_pwm = chn->clks[SPRD_PWM_CHN_OUTPUT_CLK].clk;
+12 -24
drivers/pwm/pwm-sun4i.c
··· 423 423 * back to the first clock of the PWM. 424 424 */ 425 425 pwm->clk = devm_clk_get_optional(&pdev->dev, "mod"); 426 - if (IS_ERR(pwm->clk)) { 427 - if (PTR_ERR(pwm->clk) != -EPROBE_DEFER) 428 - dev_err(&pdev->dev, "get mod clock failed %pe\n", 429 - pwm->clk); 430 - return PTR_ERR(pwm->clk); 431 - } 426 + if (IS_ERR(pwm->clk)) 427 + return dev_err_probe(&pdev->dev, PTR_ERR(pwm->clk), 428 + "get mod clock failed\n"); 432 429 433 430 if (!pwm->clk) { 434 431 pwm->clk = devm_clk_get(&pdev->dev, NULL); 435 - if (IS_ERR(pwm->clk)) { 436 - if (PTR_ERR(pwm->clk) != -EPROBE_DEFER) 437 - dev_err(&pdev->dev, "get unnamed clock failed %pe\n", 438 - pwm->clk); 439 - return PTR_ERR(pwm->clk); 440 - } 432 + if (IS_ERR(pwm->clk)) 433 + return dev_err_probe(&pdev->dev, PTR_ERR(pwm->clk), 434 + "get unnamed clock failed\n"); 441 435 } 442 436 443 437 pwm->bus_clk = devm_clk_get_optional(&pdev->dev, "bus"); 444 - if (IS_ERR(pwm->bus_clk)) { 445 - if (PTR_ERR(pwm->bus_clk) != -EPROBE_DEFER) 446 - dev_err(&pdev->dev, "get bus clock failed %pe\n", 447 - pwm->bus_clk); 448 - return PTR_ERR(pwm->bus_clk); 449 - } 438 + if (IS_ERR(pwm->bus_clk)) 439 + return dev_err_probe(&pdev->dev, PTR_ERR(pwm->bus_clk), 440 + "get bus clock failed\n"); 450 441 451 442 pwm->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL); 452 - if (IS_ERR(pwm->rst)) { 453 - if (PTR_ERR(pwm->rst) != -EPROBE_DEFER) 454 - dev_err(&pdev->dev, "get reset failed %pe\n", 455 - pwm->rst); 456 - return PTR_ERR(pwm->rst); 457 - } 443 + if (IS_ERR(pwm->rst)) 444 + return dev_err_probe(&pdev->dev, PTR_ERR(pwm->rst), 445 + "get reset failed\n"); 458 446 459 447 /* Deassert reset */ 460 448 ret = reset_control_deassert(pwm->rst);
+2 -2
drivers/pwm/sysfs.c
··· 87 87 struct pwm_export *export = child_to_pwm_export(child); 88 88 struct pwm_device *pwm = export->pwm; 89 89 struct pwm_state state; 90 - unsigned int val; 90 + u64 val; 91 91 int ret; 92 92 93 - ret = kstrtouint(buf, 0, &val); 93 + ret = kstrtou64(buf, 0, &val); 94 94 if (ret) 95 95 return ret; 96 96