Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

perf stat: Fix the ratio comments of miss-events

'perf stat' displays miss ratio of L1-dcache, L1-icache, dTLB cache,
iTLB cache and LL-cache. Take L1-dcache for example, miss ratio is
caculated as "L1-dcache-load-misses/L1-dcache-loads". So "of all
L1-dcache hits" is unsuitable to describe it, and "of all L1-dcache
accesses" seems better.

The comments of L1-icache, dTLB cache, iTLB cache and LL-cache are
fixed in the same way.

Signed-off-by: Qi Liu <liuqi115@huawei.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: linuxarm@huawei.com
Link: http://lore.kernel.org/lkml/1600253331-10535-1-git-send-email-liuqi115@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

authored by

Qi Liu and committed by
Arnaldo Carvalho de Melo
ce9c13f3 d26383dc

+10 -10
+10 -10
tools/perf/util/stat-shadow.c
··· 517 517 518 518 color = get_ratio_color(GRC_CACHE_MISSES, ratio); 519 519 520 - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all L1-dcache hits", ratio); 520 + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all L1-dcache accesses", ratio); 521 521 } 522 522 523 523 static void print_l1_icache_misses(struct perf_stat_config *config, ··· 538 538 ratio = avg / total * 100.0; 539 539 540 540 color = get_ratio_color(GRC_CACHE_MISSES, ratio); 541 - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all L1-icache hits", ratio); 541 + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all L1-icache accesses", ratio); 542 542 } 543 543 544 544 static void print_dtlb_cache_misses(struct perf_stat_config *config, ··· 558 558 ratio = avg / total * 100.0; 559 559 560 560 color = get_ratio_color(GRC_CACHE_MISSES, ratio); 561 - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all dTLB cache hits", ratio); 561 + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all dTLB cache accesses", ratio); 562 562 } 563 563 564 564 static void print_itlb_cache_misses(struct perf_stat_config *config, ··· 578 578 ratio = avg / total * 100.0; 579 579 580 580 color = get_ratio_color(GRC_CACHE_MISSES, ratio); 581 - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all iTLB cache hits", ratio); 581 + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all iTLB cache accesses", ratio); 582 582 } 583 583 584 584 static void print_ll_cache_misses(struct perf_stat_config *config, ··· 598 598 ratio = avg / total * 100.0; 599 599 600 600 color = get_ratio_color(GRC_CACHE_MISSES, ratio); 601 - out->print_metric(config, out->ctx, color, "%7.2f%%", "of all LL-cache hits", ratio); 601 + out->print_metric(config, out->ctx, color, "%7.2f%%", "of all LL-cache accesses", ratio); 602 602 } 603 603 604 604 /* ··· 920 920 if (runtime_stat_n(st, STAT_L1_DCACHE, ctx, cpu) != 0) 921 921 print_l1_dcache_misses(config, cpu, evsel, avg, out, st); 922 922 else 923 - print_metric(config, ctxp, NULL, NULL, "of all L1-dcache hits", 0); 923 + print_metric(config, ctxp, NULL, NULL, "of all L1-dcache accesses", 0); 924 924 } else if ( 925 925 evsel->core.attr.type == PERF_TYPE_HW_CACHE && 926 926 evsel->core.attr.config == ( PERF_COUNT_HW_CACHE_L1I | ··· 930 930 if (runtime_stat_n(st, STAT_L1_ICACHE, ctx, cpu) != 0) 931 931 print_l1_icache_misses(config, cpu, evsel, avg, out, st); 932 932 else 933 - print_metric(config, ctxp, NULL, NULL, "of all L1-icache hits", 0); 933 + print_metric(config, ctxp, NULL, NULL, "of all L1-icache accesses", 0); 934 934 } else if ( 935 935 evsel->core.attr.type == PERF_TYPE_HW_CACHE && 936 936 evsel->core.attr.config == ( PERF_COUNT_HW_CACHE_DTLB | ··· 940 940 if (runtime_stat_n(st, STAT_DTLB_CACHE, ctx, cpu) != 0) 941 941 print_dtlb_cache_misses(config, cpu, evsel, avg, out, st); 942 942 else 943 - print_metric(config, ctxp, NULL, NULL, "of all dTLB cache hits", 0); 943 + print_metric(config, ctxp, NULL, NULL, "of all dTLB cache accesses", 0); 944 944 } else if ( 945 945 evsel->core.attr.type == PERF_TYPE_HW_CACHE && 946 946 evsel->core.attr.config == ( PERF_COUNT_HW_CACHE_ITLB | ··· 950 950 if (runtime_stat_n(st, STAT_ITLB_CACHE, ctx, cpu) != 0) 951 951 print_itlb_cache_misses(config, cpu, evsel, avg, out, st); 952 952 else 953 - print_metric(config, ctxp, NULL, NULL, "of all iTLB cache hits", 0); 953 + print_metric(config, ctxp, NULL, NULL, "of all iTLB cache accesses", 0); 954 954 } else if ( 955 955 evsel->core.attr.type == PERF_TYPE_HW_CACHE && 956 956 evsel->core.attr.config == ( PERF_COUNT_HW_CACHE_LL | ··· 960 960 if (runtime_stat_n(st, STAT_LL_CACHE, ctx, cpu) != 0) 961 961 print_ll_cache_misses(config, cpu, evsel, avg, out, st); 962 962 else 963 - print_metric(config, ctxp, NULL, NULL, "of all LL-cache hits", 0); 963 + print_metric(config, ctxp, NULL, NULL, "of all LL-cache accesses", 0); 964 964 } else if (evsel__match(evsel, HARDWARE, HW_CACHE_MISSES)) { 965 965 total = runtime_stat_avg(st, STAT_CACHEREFS, ctx, cpu); 966 966