tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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[media] media: adv7180: define more registers

Replace hard-coded addresses with new register macro defines. No
functional changes.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>

authored by

Steve Longerbeam and committed by
Mauro Carvalho Chehab ce5d6290 c6e4b8c1

+49 -24
+49 -24
drivers/media/i2c/adv7180.c
··· 56 56 57 57 #define ADV7182_REG_INPUT_VIDSEL 0x0002 58 58 59 + #define ADV7180_REG_OUTPUT_CONTROL 0x0003 59 60 #define ADV7180_REG_EXTENDED_OUTPUT_CONTROL 0x0004 60 61 #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5 61 62 62 - #define ADV7180_REG_AUTODETECT_ENABLE 0x07 63 + #define ADV7180_REG_AUTODETECT_ENABLE 0x0007 63 64 #define ADV7180_AUTODETECT_DEFAULT 0x7f 64 65 /* Contrast */ 65 66 #define ADV7180_REG_CON 0x0008 /*Unsigned */ ··· 101 100 #define ADV7180_REG_IDENT 0x0011 102 101 #define ADV7180_ID_7180 0x18 103 102 103 + #define ADV7180_REG_STATUS3 0x0013 104 + #define ADV7180_REG_ANALOG_CLAMP_CTL 0x0014 105 + #define ADV7180_REG_SHAP_FILTER_CTL_1 0x0017 106 + #define ADV7180_REG_CTRL_2 0x001d 107 + #define ADV7180_REG_VSYNC_FIELD_CTL_1 0x0031 108 + #define ADV7180_REG_MANUAL_WIN_CTL_1 0x003d 109 + #define ADV7180_REG_MANUAL_WIN_CTL_2 0x003e 110 + #define ADV7180_REG_MANUAL_WIN_CTL_3 0x003f 111 + #define ADV7180_REG_LOCK_CNT 0x0051 112 + #define ADV7180_REG_CVBS_TRIM 0x0052 113 + #define ADV7180_REG_CLAMP_ADJ 0x005a 114 + #define ADV7180_REG_RES_CIR 0x005f 115 + #define ADV7180_REG_DIFF_MODE 0x0060 116 + 104 117 #define ADV7180_REG_ICONF1 0x2040 105 118 #define ADV7180_ICONF1_ACTIVE_LOW 0x01 106 119 #define ADV7180_ICONF1_PSYNC_ONLY 0x10 ··· 144 129 #define ADV7180_REG_VPP_SLAVE_ADDR 0xFD 145 130 #define ADV7180_REG_CSI_SLAVE_ADDR 0xFE 146 131 147 - #define ADV7180_REG_FLCONTROL 0x40e0 132 + #define ADV7180_REG_ACE_CTRL1 0x4080 133 + #define ADV7180_REG_ACE_CTRL5 0x4084 134 + #define ADV7180_REG_FLCONTROL 0x40e0 148 135 #define ADV7180_FLCONTROL_FL_ENABLE 0x1 136 + 137 + #define ADV7180_REG_RST_CLAMP 0x809c 138 + #define ADV7180_REG_AGC_ADJ1 0x80b6 139 + #define ADV7180_REG_AGC_ADJ2 0x80c0 149 140 150 141 #define ADV7180_CSI_REG_PWRDN 0x00 151 142 #define ADV7180_CSI_PWRDN 0x80 ··· 907 886 908 887 /* ADI required writes */ 909 888 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) { 910 - adv7180_write(state, 0x0003, 0x4e); 911 - adv7180_write(state, 0x0004, 0x57); 912 - adv7180_write(state, 0x001d, 0xc0); 889 + adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x4e); 890 + adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 0x57); 891 + adv7180_write(state, ADV7180_REG_CTRL_2, 0xc0); 913 892 } else { 914 893 if (state->chip_info->flags & ADV7180_FLAG_V2) 915 - adv7180_write(state, 0x0004, 0x17); 894 + adv7180_write(state, 895 + ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 896 + 0x17); 916 897 else 917 - adv7180_write(state, 0x0004, 0x07); 918 - adv7180_write(state, 0x0003, 0x0c); 919 - adv7180_write(state, 0x001d, 0x40); 898 + adv7180_write(state, 899 + ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 900 + 0x07); 901 + adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x0c); 902 + adv7180_write(state, ADV7180_REG_CTRL_2, 0x40); 920 903 } 921 904 922 905 adv7180_write(state, 0x0013, 0x00); ··· 997 972 return ret; 998 973 999 974 /* Reset clamp circuitry - ADI recommended writes */ 1000 - adv7180_write(state, 0x809c, 0x00); 1001 - adv7180_write(state, 0x809c, 0xff); 975 + adv7180_write(state, ADV7180_REG_RST_CLAMP, 0x00); 976 + adv7180_write(state, ADV7180_REG_RST_CLAMP, 0xff); 1002 977 1003 978 input_type = adv7182_get_input_type(input); 1004 979 ··· 1006 981 case ADV7182_INPUT_TYPE_CVBS: 1007 982 case ADV7182_INPUT_TYPE_DIFF_CVBS: 1008 983 /* ADI recommends to use the SH1 filter */ 1009 - adv7180_write(state, 0x0017, 0x41); 984 + adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x41); 1010 985 break; 1011 986 default: 1012 - adv7180_write(state, 0x0017, 0x01); 987 + adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x01); 1013 988 break; 1014 989 } 1015 990 ··· 1019 994 lbias = adv7182_lbias_settings[input_type]; 1020 995 1021 996 for (i = 0; i < ARRAY_SIZE(adv7182_lbias_settings[0]); i++) 1022 - adv7180_write(state, 0x0052 + i, lbias[i]); 997 + adv7180_write(state, ADV7180_REG_CVBS_TRIM + i, lbias[i]); 1023 998 1024 999 if (input_type == ADV7182_INPUT_TYPE_DIFF_CVBS) { 1025 1000 /* ADI required writes to make differential CVBS work */ 1026 - adv7180_write(state, 0x005f, 0xa8); 1027 - adv7180_write(state, 0x005a, 0x90); 1028 - adv7180_write(state, 0x0060, 0xb0); 1029 - adv7180_write(state, 0x80b6, 0x08); 1030 - adv7180_write(state, 0x80c0, 0xa0); 1001 + adv7180_write(state, ADV7180_REG_RES_CIR, 0xa8); 1002 + adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0x90); 1003 + adv7180_write(state, ADV7180_REG_DIFF_MODE, 0xb0); 1004 + adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x08); 1005 + adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0xa0); 1031 1006 } else { 1032 - adv7180_write(state, 0x005f, 0xf0); 1033 - adv7180_write(state, 0x005a, 0xd0); 1034 - adv7180_write(state, 0x0060, 0x10); 1035 - adv7180_write(state, 0x80b6, 0x9c); 1036 - adv7180_write(state, 0x80c0, 0x00); 1007 + adv7180_write(state, ADV7180_REG_RES_CIR, 0xf0); 1008 + adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0xd0); 1009 + adv7180_write(state, ADV7180_REG_DIFF_MODE, 0x10); 1010 + adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x9c); 1011 + adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0x00); 1037 1012 } 1038 1013 1039 1014 return 0;