···10761076# version.h and scripts_basic is processed / created.1077107710781078# Listed in dependency order10791079-PHONY += prepare archprepare macroprepare prepare0 prepare1 prepare2 prepare310791079+PHONY += prepare archprepare prepare0 prepare1 prepare2 prepare31080108010811081# prepare3 is used to check if we are building in a separate output directory,10821082# and if so do:···10991099prepare1: prepare2 $(version_h) $(autoksyms_h) include/generated/utsrelease.h11001100 $(cmd_crmodverdir)1101110111021102-macroprepare: prepare1 archmacros11031103-11041104-archprepare: archheaders archscripts macroprepare scripts_basic11021102+archprepare: archheaders archscripts prepare1 scripts_basic1105110311061104prepare0: archprepare gcc-plugins11071105 $(Q)$(MAKE) $(build)=.···1174117611751177PHONY += archscripts11761178archscripts:11771177-11781178-PHONY += archmacros11791179-archmacros:1180117911811180PHONY += __headers11821181__headers: $(version_h) scripts_basic uapi-asm-generic archheaders archscripts
+6-7
arch/sparc/kernel/setup_32.c
···310310311311 register_console(&prom_early_console);312312313313- printk("ARCH: ");314313 switch(sparc_cpu_model) {315314 case sun4m:316316- printk("SUN4M\n");315315+ pr_info("ARCH: SUN4M\n");317316 break;318317 case sun4d:319319- printk("SUN4D\n");318318+ pr_info("ARCH: SUN4D\n");320319 break;321320 case sun4e:322322- printk("SUN4E\n");321321+ pr_info("ARCH: SUN4E\n");323322 break;324323 case sun4u:325325- printk("SUN4U\n");324324+ pr_info("ARCH: SUN4U\n");326325 break;327326 case sparc_leon:328328- printk("LEON\n");327327+ pr_info("ARCH: LEON\n");329328 break;330329 default:331331- printk("UNKNOWN!\n");330330+ pr_info("ARCH: UNKNOWN!\n");332331 break;333332 }334333
···11-/* SPDX-License-Identifier: GPL-2.0 */22-33-/*44- * This file includes headers whose assembly part includes macros which are55- * commonly used. The macros are precompiled into assmebly file which is later66- * assembled together with each compiled file.77- */88-99-#include <linux/compiler.h>1010-#include <asm/refcount.h>1111-#include <asm/alternative-asm.h>1212-#include <asm/bug.h>1313-#include <asm/paravirt.h>1414-#include <asm/asm.h>1515-#include <asm/cpufeature.h>1616-#include <asm/jump_label.h>
+55-44
arch/x86/kernel/process_64.c
···339339 return base;340340}341341342342-void x86_fsbase_write_cpu(unsigned long fsbase)343343-{344344- /*345345- * Set the selector to 0 as a notion, that the segment base is346346- * overwritten, which will be checked for skipping the segment load347347- * during context switch.348348- */349349- loadseg(FS, 0);350350- wrmsrl(MSR_FS_BASE, fsbase);351351-}352352-353353-void x86_gsbase_write_cpu_inactive(unsigned long gsbase)354354-{355355- /* Set the selector to 0 for the same reason as %fs above. */356356- loadseg(GS, 0);357357- wrmsrl(MSR_KERNEL_GS_BASE, gsbase);358358-}359359-360342unsigned long x86_fsbase_read_task(struct task_struct *task)361343{362344 unsigned long fsbase;···367385 return gsbase;368386}369387370370-int x86_fsbase_write_task(struct task_struct *task, unsigned long fsbase)388388+void x86_fsbase_write_task(struct task_struct *task, unsigned long fsbase)371389{372372- /*373373- * Not strictly needed for %fs, but do it for symmetry374374- * with %gs375375- */376376- if (unlikely(fsbase >= TASK_SIZE_MAX))377377- return -EPERM;390390+ WARN_ON_ONCE(task == current);378391379379- preempt_disable();380392 task->thread.fsbase = fsbase;381381- if (task == current)382382- x86_fsbase_write_cpu(fsbase);383383- task->thread.fsindex = 0;384384- preempt_enable();385385-386386- return 0;387393}388394389389-int x86_gsbase_write_task(struct task_struct *task, unsigned long gsbase)395395+void x86_gsbase_write_task(struct task_struct *task, unsigned long gsbase)390396{391391- if (unlikely(gsbase >= TASK_SIZE_MAX))392392- return -EPERM;397397+ WARN_ON_ONCE(task == current);393398394394- preempt_disable();395399 task->thread.gsbase = gsbase;396396- if (task == current)397397- x86_gsbase_write_cpu_inactive(gsbase);398398- task->thread.gsindex = 0;399399- preempt_enable();400400-401401- return 0;402400}403401404402int copy_thread_tls(unsigned long clone_flags, unsigned long sp,···716754717755 switch (option) {718756 case ARCH_SET_GS: {719719- ret = x86_gsbase_write_task(task, arg2);757757+ if (unlikely(arg2 >= TASK_SIZE_MAX))758758+ return -EPERM;759759+760760+ preempt_disable();761761+ /*762762+ * ARCH_SET_GS has always overwritten the index763763+ * and the base. Zero is the most sensible value764764+ * to put in the index, and is the only value that765765+ * makes any sense if FSGSBASE is unavailable.766766+ */767767+ if (task == current) {768768+ loadseg(GS, 0);769769+ x86_gsbase_write_cpu_inactive(arg2);770770+771771+ /*772772+ * On non-FSGSBASE systems, save_base_legacy() expects773773+ * that we also fill in thread.gsbase.774774+ */775775+ task->thread.gsbase = arg2;776776+777777+ } else {778778+ task->thread.gsindex = 0;779779+ x86_gsbase_write_task(task, arg2);780780+ }781781+ preempt_enable();720782 break;721783 }722784 case ARCH_SET_FS: {723723- ret = x86_fsbase_write_task(task, arg2);785785+ /*786786+ * Not strictly needed for %fs, but do it for symmetry787787+ * with %gs788788+ */789789+ if (unlikely(arg2 >= TASK_SIZE_MAX))790790+ return -EPERM;791791+792792+ preempt_disable();793793+ /*794794+ * Set the selector to 0 for the same reason795795+ * as %gs above.796796+ */797797+ if (task == current) {798798+ loadseg(FS, 0);799799+ x86_fsbase_write_cpu(arg2);800800+801801+ /*802802+ * On non-FSGSBASE systems, save_base_legacy() expects803803+ * that we also fill in thread.fsbase.804804+ */805805+ task->thread.fsbase = arg2;806806+ } else {807807+ task->thread.fsindex = 0;808808+ x86_fsbase_write_task(task, arg2);809809+ }810810+ preempt_enable();724811 break;725812 }726813 case ARCH_GET_FS: {
+5-4
arch/x86/kernel/ptrace.c
···397397 if (value >= TASK_SIZE_MAX)398398 return -EIO;399399 /*400400- * When changing the FS base, use the same401401- * mechanism as for do_arch_prctl_64().400400+ * When changing the FS base, use do_arch_prctl_64()401401+ * to set the index to zero and to set the base402402+ * as requested.402403 */403404 if (child->thread.fsbase != value)404404- return x86_fsbase_write_task(child, value);405405+ return do_arch_prctl_64(child, ARCH_SET_FS, value);405406 return 0;406407 case offsetof(struct user_regs_struct,gs_base):407408 /*···411410 if (value >= TASK_SIZE_MAX)412411 return -EIO;413412 if (child->thread.gsbase != value)414414- return x86_gsbase_write_task(child, value);413413+ return do_arch_prctl_64(child, ARCH_SET_GS, value);415414 return 0;416415#endif417416 }
···5555enum address_markers_idx {5656 USER_SPACE_NR = 0,5757 KERNEL_SPACE_NR,5858- LOW_KERNEL_NR,5959-#if defined(CONFIG_MODIFY_LDT_SYSCALL) && defined(CONFIG_X86_5LEVEL)5858+#ifdef CONFIG_MODIFY_LDT_SYSCALL6059 LDT_NR,6160#endif6161+ LOW_KERNEL_NR,6262 VMALLOC_START_NR,6363 VMEMMAP_START_NR,6464#ifdef CONFIG_KASAN···6666 KASAN_SHADOW_END_NR,6767#endif6868 CPU_ENTRY_AREA_NR,6969-#if defined(CONFIG_MODIFY_LDT_SYSCALL) && !defined(CONFIG_X86_5LEVEL)7070- LDT_NR,7171-#endif7269#ifdef CONFIG_X86_ESPFIX647370 ESPFIX_START_NR,7471#endif···509512{510513#ifdef CONFIG_X86_64511514 /*512512- * ffff800000000000 - ffff87ffffffffff is reserved for513513- * the hypervisor.515515+ * A hole in the beginning of kernel address space reserved516516+ * for a hypervisor.514517 */515515- return (idx >= pgd_index(__PAGE_OFFSET) - 16) &&516516- (idx < pgd_index(__PAGE_OFFSET));518518+ return (idx >= pgd_index(GUARD_HOLE_BASE_ADDR)) &&519519+ (idx < pgd_index(GUARD_HOLE_END_ADDR));517520#else518521 return false;519522#endif
+16-8
arch/x86/mm/pageattr.c
···285285 on_each_cpu(__cpa_flush_all, (void *) cache, 1);286286}287287288288-static bool __cpa_flush_range(unsigned long start, int numpages, int cache)288288+static bool __inv_flush_all(int cache)289289{290290 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);291291-292292- WARN_ON(PAGE_ALIGN(start) != start);293291294292 if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {295293 cpa_flush_all(cache);296294 return true;297295 }298296299299- flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);300300-301301- return !cache;297297+ return false;302298}303299304300static void cpa_flush_range(unsigned long start, int numpages, int cache)···302306 unsigned int i, level;303307 unsigned long addr;304308305305- if (__cpa_flush_range(start, numpages, cache))309309+ WARN_ON(PAGE_ALIGN(start) != start);310310+311311+ if (__inv_flush_all(cache))312312+ return;313313+314314+ flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);315315+316316+ if (!cache)306317 return;307318308319 /*···335332{336333 unsigned int i, level;337334338338- if (__cpa_flush_range(baddr, numpages, cache))335335+ if (__inv_flush_all(cache))336336+ return;337337+338338+ flush_tlb_all();339339+340340+ if (!cache)339341 return;340342341343 /*
+11-2
arch/x86/mm/pat.c
···519519 * for a "decoy" virtual address (bit 63 clear) passed to520520 * set_memory_X(). __pa() on a "decoy" address results in a521521 * physical address with bit 63 set.522522+ *523523+ * Decoy addresses are not present for 32-bit builds, see524524+ * set_mce_nospec().522525 */523523- return address & __PHYSICAL_MASK;526526+ if (IS_ENABLED(CONFIG_X86_64))527527+ return address & __PHYSICAL_MASK;528528+ return address;524529}525530526531/*···551546552547 start = sanitize_phys(start);553548 end = sanitize_phys(end);554554- BUG_ON(start >= end); /* end is exclusive */549549+ if (start >= end) {550550+ WARN(1, "%s failed: [mem %#010Lx-%#010Lx], req %s\n", __func__,551551+ start, end - 1, cattr_name(req_type));552552+ return -EINVAL;553553+ }555554556555 if (!pat_enabled()) {557556 /* This is identical to page table setting without PAT */
+6-5
arch/x86/xen/mmu_pv.c
···648648 unsigned long limit)649649{650650 int i, nr, flush = 0;651651- unsigned hole_low, hole_high;651651+ unsigned hole_low = 0, hole_high = 0;652652653653 /* The limit is the last byte to be touched */654654 limit--;655655 BUG_ON(limit >= FIXADDR_TOP);656656657657+#ifdef CONFIG_X86_64657658 /*658659 * 64-bit has a great big hole in the middle of the address659659- * space, which contains the Xen mappings. On 32-bit these660660- * will end up making a zero-sized hole and so is a no-op.660660+ * space, which contains the Xen mappings.661661 */662662- hole_low = pgd_index(USER_LIMIT);663663- hole_high = pgd_index(PAGE_OFFSET);662662+ hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);663663+ hole_high = pgd_index(GUARD_HOLE_END_ADDR);664664+#endif664665665666 nr = pgd_index(limit) + 1;666667 for (i = 0; i < nr; i++) {
+3-9
drivers/gpio/gpio-max7301.c
···2525 struct spi_device *spi = to_spi_device(dev);2626 u16 word = ((reg & 0x7F) << 8) | (val & 0xFF);27272828- return spi_write(spi, (const u8 *)&word, sizeof(word));2828+ return spi_write_then_read(spi, &word, sizeof(word), NULL, 0);2929}30303131/* A read from the MAX7301 means two transfers; here, one message each */···3737 struct spi_device *spi = to_spi_device(dev);38383939 word = 0x8000 | (reg << 8);4040- ret = spi_write(spi, (const u8 *)&word, sizeof(word));4141- if (ret)4242- return ret;4343- /*4444- * This relies on the fact, that a transfer with NULL tx_buf shifts out4545- * zero bytes (=NOOP for MAX7301)4646- */4747- ret = spi_read(spi, (u8 *)&word, sizeof(word));4040+ ret = spi_write_then_read(spi, &word, sizeof(word), &word,4141+ sizeof(word));4842 if (ret)4943 return ret;5044 return word & 0xff;
+3-3
drivers/gpio/gpio-mvebu.c
···773773 "marvell,armada-370-gpio"))774774 return 0;775775776776- if (IS_ERR(mvchip->clk))777777- return PTR_ERR(mvchip->clk);778778-779776 /*780777 * There are only two sets of PWM configuration registers for781778 * all the GPIO lines on those SoCs which this driver reserves···782785 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm");783786 if (!res)784787 return 0;788788+789789+ if (IS_ERR(mvchip->clk))790790+ return PTR_ERR(mvchip->clk);785791786792 /*787793 * Use set A for lines of GPIO chip with id 0, B for GPIO chip
+5-59
drivers/gpio/gpio-omap.c
···3232#define OMAP4_GPIO_DEBOUNCINGTIME_MASK 0xFF33333434#define OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER BIT(2)3535-#define OMAP_GPIO_QUIRK_DEFERRED_WKUP_EN BIT(1)36353736struct gpio_regs {3837 u32 irqenable1;···378379 readl_relaxed(bank->base + bank->regs->fallingdetect);379380380381 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {381381- /* Defer wkup_en register update until we idle? */382382- if (bank->quirks & OMAP_GPIO_QUIRK_DEFERRED_WKUP_EN) {383383- if (trigger)384384- bank->context.wake_en |= gpio_bit;385385- else386386- bank->context.wake_en &= ~gpio_bit;387387- } else {388388- omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit,389389- trigger != 0);390390- bank->context.wake_en =391391- readl_relaxed(bank->base + bank->regs->wkup_en);392392- }382382+ omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0);383383+ bank->context.wake_en =384384+ readl_relaxed(bank->base + bank->regs->wkup_en);393385 }394386395387 /* This part needs to be executed always for OMAP{34xx, 44xx} */···932942 bank->base + bank->regs->risingdetect);933943}934944935935-/*936936- * On omap4 and later SoC variants a level interrupt with wkup_en937937- * enabled blocks the GPIO functional clock from idling until the GPIO938938- * instance has been reset. To avoid that, we must set wkup_en only for939939- * idle for level interrupts, and clear level registers for the duration940940- * of idle. The level interrupts will be still there on wakeup by their941941- * nature.942942- */943943-static void __maybe_unused944944-omap4_gpio_enable_level_quirk(struct gpio_bank *bank)945945-{946946- /* Update wake register for idle, edge bits might be already set */947947- writel_relaxed(bank->context.wake_en,948948- bank->base + bank->regs->wkup_en);949949-950950- /* Clear level registers for idle */951951- writel_relaxed(0, bank->base + bank->regs->leveldetect0);952952- writel_relaxed(0, bank->base + bank->regs->leveldetect1);953953-}954954-955955-static void __maybe_unused956956-omap4_gpio_disable_level_quirk(struct gpio_bank *bank)957957-{958958- /* Restore level registers after idle */959959- writel_relaxed(bank->context.leveldetect0,960960- bank->base + bank->regs->leveldetect0);961961- writel_relaxed(bank->context.leveldetect1,962962- bank->base + bank->regs->leveldetect1);963963-964964- /* Clear saved wkup_en for level, it will be set for next idle again */965965- bank->context.wake_en &= ~(bank->context.leveldetect0 |966966- bank->context.leveldetect1);967967-968968- /* Update wake with only edge configuration */969969- writel_relaxed(bank->context.wake_en,970970- bank->base + bank->regs->wkup_en);971971-}972972-973945/*---------------------------------------------------------------------*/974946975947static int omap_mpuio_suspend_noirq(struct device *dev)···13641412 omap_set_gpio_dataout_mask_multiple;13651413 }1366141413671367- if (bank->quirks & OMAP_GPIO_QUIRK_DEFERRED_WKUP_EN) {13681368- bank->funcs.idle_enable_level_quirk =13691369- omap4_gpio_enable_level_quirk;13701370- bank->funcs.idle_disable_level_quirk =13711371- omap4_gpio_disable_level_quirk;13721372- } else if (bank->quirks & OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER) {14151415+ if (bank->quirks & OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER) {13731416 bank->funcs.idle_enable_level_quirk =13741417 omap2_gpio_enable_level_quirk;13751418 bank->funcs.idle_disable_level_quirk =···17531806 .regs = &omap4_gpio_regs,17541807 .bank_width = 32,17551808 .dbck_flag = true,17561756- .quirks = OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER |17571757- OMAP_GPIO_QUIRK_DEFERRED_WKUP_EN,18091809+ .quirks = OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER,17581810};1759181117601812static const struct of_device_id omap_gpio_match[] = {
+94-70
drivers/gpio/gpiolib-acpi.c
···19192020#include "gpiolib.h"21212222+/**2323+ * struct acpi_gpio_event - ACPI GPIO event handler data2424+ *2525+ * @node: list-entry of the events list of the struct acpi_gpio_chip2626+ * @handle: handle of ACPI method to execute when the IRQ triggers2727+ * @handler: irq_handler to pass to request_irq when requesting the IRQ2828+ * @pin: GPIO pin number on the gpio_chip2929+ * @irq: Linux IRQ number for the event, for request_ / free_irq3030+ * @irqflags: flags to pass to request_irq when requesting the IRQ3131+ * @irq_is_wake: If the ACPI flags indicate the IRQ is a wakeup source3232+ * @is_requested: True if request_irq has been done3333+ * @desc: gpio_desc for the GPIO pin for this event3434+ */2235struct acpi_gpio_event {2336 struct list_head node;2437 acpi_handle handle;3838+ irq_handler_t handler;2539 unsigned int pin;2640 unsigned int irq;4141+ unsigned long irqflags;4242+ bool irq_is_wake;4343+ bool irq_requested;2744 struct gpio_desc *desc;2845};2946···66496750/*6851 * For gpiochips which call acpi_gpiochip_request_interrupts() before late_init6969- * (so builtin drivers) we register the ACPI GpioInt event handlers from a5252+ * (so builtin drivers) we register the ACPI GpioInt IRQ handlers from a7053 * late_initcall_sync handler, so that other builtin drivers can register their7154 * OpRegions before the event handlers can run. This list contains gpiochips7272- * for which the acpi_gpiochip_request_interrupts() has been deferred.5555+ * for which the acpi_gpiochip_request_irqs() call has been deferred.7356 */7457static DEFINE_MUTEX(acpi_gpio_deferred_req_irqs_lock);7558static LIST_HEAD(acpi_gpio_deferred_req_irqs_list);···150133}151134EXPORT_SYMBOL_GPL(acpi_gpio_get_irq_resource);152135153153-static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares,154154- void *context)136136+static void acpi_gpiochip_request_irq(struct acpi_gpio_chip *acpi_gpio,137137+ struct acpi_gpio_event *event)138138+{139139+ int ret, value;140140+141141+ ret = request_threaded_irq(event->irq, NULL, event->handler,142142+ event->irqflags, "ACPI:Event", event);143143+ if (ret) {144144+ dev_err(acpi_gpio->chip->parent,145145+ "Failed to setup interrupt handler for %d\n",146146+ event->irq);147147+ return;148148+ }149149+150150+ if (event->irq_is_wake)151151+ enable_irq_wake(event->irq);152152+153153+ event->irq_requested = true;154154+155155+ /* Make sure we trigger the initial state of edge-triggered IRQs */156156+ value = gpiod_get_raw_value_cansleep(event->desc);157157+ if (((event->irqflags & IRQF_TRIGGER_RISING) && value == 1) ||158158+ ((event->irqflags & IRQF_TRIGGER_FALLING) && value == 0))159159+ event->handler(event->irq, event);160160+}161161+162162+static void acpi_gpiochip_request_irqs(struct acpi_gpio_chip *acpi_gpio)163163+{164164+ struct acpi_gpio_event *event;165165+166166+ list_for_each_entry(event, &acpi_gpio->events, node)167167+ acpi_gpiochip_request_irq(acpi_gpio, event);168168+}169169+170170+static acpi_status acpi_gpiochip_alloc_event(struct acpi_resource *ares,171171+ void *context)155172{156173 struct acpi_gpio_chip *acpi_gpio = context;157174 struct gpio_chip *chip = acpi_gpio->chip;···194143 struct acpi_gpio_event *event;195144 irq_handler_t handler = NULL;196145 struct gpio_desc *desc;197197- unsigned long irqflags;198198- int ret, pin, irq, value;146146+ int ret, pin, irq;199147200148 if (!acpi_gpio_get_irq_resource(ares, &agpio))201149 return AE_OK;···225175226176 gpiod_direction_input(desc);227177228228- value = gpiod_get_value_cansleep(desc);229229-230178 ret = gpiochip_lock_as_irq(chip, pin);231179 if (ret) {232180 dev_err(chip->parent, "Failed to lock GPIO as interrupt\n");···237189 goto fail_unlock_irq;238190 }239191240240- irqflags = IRQF_ONESHOT;241241- if (agpio->triggering == ACPI_LEVEL_SENSITIVE) {242242- if (agpio->polarity == ACPI_ACTIVE_HIGH)243243- irqflags |= IRQF_TRIGGER_HIGH;244244- else245245- irqflags |= IRQF_TRIGGER_LOW;246246- } else {247247- switch (agpio->polarity) {248248- case ACPI_ACTIVE_HIGH:249249- irqflags |= IRQF_TRIGGER_RISING;250250- break;251251- case ACPI_ACTIVE_LOW:252252- irqflags |= IRQF_TRIGGER_FALLING;253253- break;254254- default:255255- irqflags |= IRQF_TRIGGER_RISING |256256- IRQF_TRIGGER_FALLING;257257- break;258258- }259259- }260260-261192 event = kzalloc(sizeof(*event), GFP_KERNEL);262193 if (!event)263194 goto fail_unlock_irq;264195196196+ event->irqflags = IRQF_ONESHOT;197197+ if (agpio->triggering == ACPI_LEVEL_SENSITIVE) {198198+ if (agpio->polarity == ACPI_ACTIVE_HIGH)199199+ event->irqflags |= IRQF_TRIGGER_HIGH;200200+ else201201+ event->irqflags |= IRQF_TRIGGER_LOW;202202+ } else {203203+ switch (agpio->polarity) {204204+ case ACPI_ACTIVE_HIGH:205205+ event->irqflags |= IRQF_TRIGGER_RISING;206206+ break;207207+ case ACPI_ACTIVE_LOW:208208+ event->irqflags |= IRQF_TRIGGER_FALLING;209209+ break;210210+ default:211211+ event->irqflags |= IRQF_TRIGGER_RISING |212212+ IRQF_TRIGGER_FALLING;213213+ break;214214+ }215215+ }216216+265217 event->handle = evt_handle;218218+ event->handler = handler;266219 event->irq = irq;220220+ event->irq_is_wake = agpio->wake_capable == ACPI_WAKE_CAPABLE;267221 event->pin = pin;268222 event->desc = desc;269223270270- ret = request_threaded_irq(event->irq, NULL, handler, irqflags,271271- "ACPI:Event", event);272272- if (ret) {273273- dev_err(chip->parent,274274- "Failed to setup interrupt handler for %d\n",275275- event->irq);276276- goto fail_free_event;277277- }278278-279279- if (agpio->wake_capable == ACPI_WAKE_CAPABLE)280280- enable_irq_wake(irq);281281-282224 list_add_tail(&event->node, &acpi_gpio->events);283283-284284- /*285285- * Make sure we trigger the initial state of the IRQ when using RISING286286- * or FALLING. Note we run the handlers on late_init, the AML code287287- * may refer to OperationRegions from other (builtin) drivers which288288- * may be probed after us.289289- */290290- if (((irqflags & IRQF_TRIGGER_RISING) && value == 1) ||291291- ((irqflags & IRQF_TRIGGER_FALLING) && value == 0))292292- handler(event->irq, event);293225294226 return AE_OK;295227296296-fail_free_event:297297- kfree(event);298228fail_unlock_irq:299229 gpiochip_unlock_as_irq(chip, pin);300230fail_free_desc:···309283 if (ACPI_FAILURE(status))310284 return;311285286286+ acpi_walk_resources(handle, "_AEI",287287+ acpi_gpiochip_alloc_event, acpi_gpio);288288+312289 mutex_lock(&acpi_gpio_deferred_req_irqs_lock);313290 defer = !acpi_gpio_deferred_req_irqs_done;314291 if (defer)···322293 if (defer)323294 return;324295325325- acpi_walk_resources(handle, "_AEI",326326- acpi_gpiochip_request_interrupt, acpi_gpio);296296+ acpi_gpiochip_request_irqs(acpi_gpio);327297}328298EXPORT_SYMBOL_GPL(acpi_gpiochip_request_interrupts);329299···359331 list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) {360332 struct gpio_desc *desc;361333362362- if (irqd_is_wakeup_set(irq_get_irq_data(event->irq)))363363- disable_irq_wake(event->irq);334334+ if (event->irq_requested) {335335+ if (event->irq_is_wake)336336+ disable_irq_wake(event->irq);364337365365- free_irq(event->irq, event);338338+ free_irq(event->irq, event);339339+ }340340+366341 desc = event->desc;367342 if (WARN_ON(IS_ERR(desc)))368343 continue;···12311200 return con_id == NULL;12321201}1233120212341234-/* Run deferred acpi_gpiochip_request_interrupts() */12351235-static int acpi_gpio_handle_deferred_request_interrupts(void)12031203+/* Run deferred acpi_gpiochip_request_irqs() */12041204+static int acpi_gpio_handle_deferred_request_irqs(void)12361205{12371206 struct acpi_gpio_chip *acpi_gpio, *tmp;1238120712391208 mutex_lock(&acpi_gpio_deferred_req_irqs_lock);12401209 list_for_each_entry_safe(acpi_gpio, tmp,12411210 &acpi_gpio_deferred_req_irqs_list,12421242- deferred_req_irqs_list_entry) {12431243- acpi_handle handle;12441244-12451245- handle = ACPI_HANDLE(acpi_gpio->chip->parent);12461246- acpi_walk_resources(handle, "_AEI",12471247- acpi_gpiochip_request_interrupt, acpi_gpio);12481248-12491249- list_del_init(&acpi_gpio->deferred_req_irqs_list_entry);12501250- }12111211+ deferred_req_irqs_list_entry)12121212+ acpi_gpiochip_request_irqs(acpi_gpio);1251121312521214 acpi_gpio_deferred_req_irqs_done = true;12531215 mutex_unlock(&acpi_gpio_deferred_req_irqs_lock);···12481224 return 0;12491225}12501226/* We must use _sync so that this runs after the first deferred_probe run */12511251-late_initcall_sync(acpi_gpio_handle_deferred_request_interrupts);12271227+late_initcall_sync(acpi_gpio_handle_deferred_request_irqs);
+8-2
drivers/gpu/drm/drm_ioctl.c
···37373838#include <linux/pci.h>3939#include <linux/export.h>4040+#include <linux/nospec.h>40414142/**4243 * DOC: getunique and setversion story···801800802801 if (is_driver_ioctl) {803802 /* driver ioctl */804804- if (nr - DRM_COMMAND_BASE >= dev->driver->num_ioctls)803803+ unsigned int index = nr - DRM_COMMAND_BASE;804804+805805+ if (index >= dev->driver->num_ioctls)805806 goto err_i1;806806- ioctl = &dev->driver->ioctls[nr - DRM_COMMAND_BASE];807807+ index = array_index_nospec(index, dev->driver->num_ioctls);808808+ ioctl = &dev->driver->ioctls[index];807809 } else {808810 /* core ioctl */809811 if (nr >= DRM_CORE_IOCTL_COUNT)810812 goto err_i1;813813+ nr = array_index_nospec(nr, DRM_CORE_IOCTL_COUNT);811814 ioctl = &drm_ioctls[nr];812815 }813816···893888894889 if (nr >= DRM_CORE_IOCTL_COUNT)895890 return false;891891+ nr = array_index_nospec(nr, DRM_CORE_IOCTL_COUNT);896892897893 *flags = drm_ioctls[nr].flags;898894 return true;
+1-1
drivers/i2c/busses/i2c-nvidia-gpu.c
···342342 pci_free_irq_vectors(pdev);343343}344344345345-static int gpu_i2c_resume(struct device *dev)345345+static __maybe_unused int gpu_i2c_resume(struct device *dev)346346{347347 struct gpu_i2c_dev *i2cd = dev_get_drvdata(dev);348348
···17671767module_param_named(elantech_smbus, elantech_smbus, int, 0644);17681768MODULE_PARM_DESC(elantech_smbus, "Use a secondary bus for the Elantech device.");1769176917701770+static const char * const i2c_blacklist_pnp_ids[] = {17711771+ /*17721772+ * These are known to not be working properly as bits are missing17731773+ * in elan_i2c.17741774+ */17751775+ "LEN2131", /* ThinkPad P52 w/ NFC */17761776+ "LEN2132", /* ThinkPad P52 */17771777+ "LEN2133", /* ThinkPad P72 w/ NFC */17781778+ "LEN2134", /* ThinkPad P72 */17791779+ NULL17801780+};17811781+17701782static int elantech_create_smbus(struct psmouse *psmouse,17711783 struct elantech_device_info *info,17721784 bool leave_breadcrumbs)···1814180218151803 if (elantech_smbus == ELANTECH_SMBUS_NOT_SET) {18161804 /*18171817- * New ICs are enabled by default.18051805+ * New ICs are enabled by default, unless mentioned in18061806+ * i2c_blacklist_pnp_ids.18181807 * Old ICs are up to the user to decide.18191808 */18201820- if (!ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version))18091809+ if (!ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version) ||18101810+ psmouse_matches_pnp_id(psmouse, i2c_blacklist_pnp_ids))18211811 return -ENXIO;18221812 }18231813
···1212 help1313 UBIFS is a file system for flash devices which works on top of UBI.14141515+if UBIFS_FS1616+1517config UBIFS_FS_ADVANCED_COMPR1618 bool "Advanced compression options"1717- depends on UBIFS_FS1819 help1920 This option allows to explicitly choose which compressions, if any,2021 are enabled in UBIFS. Removing compressors means inability to read···25242625config UBIFS_FS_LZO2726 bool "LZO compression support" if UBIFS_FS_ADVANCED_COMPR2828- depends on UBIFS_FS2927 default y3028 help3129 LZO compressor is generally faster than zlib but compresses worse.···32323333config UBIFS_FS_ZLIB3434 bool "ZLIB compression support" if UBIFS_FS_ADVANCED_COMPR3535- depends on UBIFS_FS3635 default y3736 help3837 Zlib compresses better than LZO but it is slower. Say 'Y' if unsure.39384039config UBIFS_ATIME_SUPPORT4141- bool "Access time support" if UBIFS_FS4242- depends on UBIFS_FS4040+ bool "Access time support"4341 default n4442 help4543 Originally UBIFS did not support atime, because it looked like a bad idea due···52545355config UBIFS_FS_XATTR5456 bool "UBIFS XATTR support"5555- depends on UBIFS_FS5657 default y5758 help5859 Saying Y here includes support for extended attributes (xattrs).···62656366config UBIFS_FS_ENCRYPTION6467 bool "UBIFS Encryption"6565- depends on UBIFS_FS && UBIFS_FS_XATTR && BLOCK6868+ depends on UBIFS_FS_XATTR && BLOCK6669 select FS_ENCRYPTION6770 default n6871 help···73767477config UBIFS_FS_SECURITY7578 bool "UBIFS Security Labels"7676- depends on UBIFS_FS && UBIFS_FS_XATTR7979+ depends on UBIFS_FS_XATTR7780 default y7881 help7982 Security labels provide an access control facility to support Linux···86898790config UBIFS_FS_AUTHENTICATION8891 bool "UBIFS authentication support"9292+ depends on KEYS8993 select CRYPTO_HMAC9094 help9195 Enable authentication support for UBIFS. This feature offers protection···9496 If you say yes here you should also select a hashing algorithm such as9597 sha256, these are not selected automatically since there are many9698 different options.9999+100100+endif # UBIFS_FS
···213213}214214215215/**216216+ * inode_still_linked - check whether inode in question will be re-linked.217217+ * @c: UBIFS file-system description object218218+ * @rino: replay entry to test219219+ *220220+ * O_TMPFILE files can be re-linked, this means link count goes from 0 to 1.221221+ * This case needs special care, otherwise all references to the inode will222222+ * be removed upon the first replay entry of an inode with link count 0223223+ * is found.224224+ */225225+static bool inode_still_linked(struct ubifs_info *c, struct replay_entry *rino)226226+{227227+ struct replay_entry *r;228228+229229+ ubifs_assert(c, rino->deletion);230230+ ubifs_assert(c, key_type(c, &rino->key) == UBIFS_INO_KEY);231231+232232+ /*233233+ * Find the most recent entry for the inode behind @rino and check234234+ * whether it is a deletion.235235+ */236236+ list_for_each_entry_reverse(r, &c->replay_list, list) {237237+ ubifs_assert(c, r->sqnum >= rino->sqnum);238238+ if (key_inum(c, &r->key) == key_inum(c, &rino->key))239239+ return r->deletion == 0;240240+241241+ }242242+243243+ ubifs_assert(c, 0);244244+ return false;245245+}246246+247247+/**216248 * apply_replay_entry - apply a replay entry to the TNC.217249 * @c: UBIFS file-system description object218250 * @r: replay entry to apply···270238 case UBIFS_INO_KEY:271239 {272240 ino_t inum = key_inum(c, &r->key);241241+242242+ if (inode_still_linked(c, r)) {243243+ err = 0;244244+ break;245245+ }273246274247 err = ubifs_tnc_remove_ino(c, inum);275248 break;···570533 return data == 0xFFFFFFFF;571534}572535536536+/* authenticate_sleb_hash and authenticate_sleb_hmac are split out for stack usage */537537+static int authenticate_sleb_hash(struct ubifs_info *c, struct shash_desc *log_hash, u8 *hash)538538+{539539+ SHASH_DESC_ON_STACK(hash_desc, c->hash_tfm);540540+541541+ hash_desc->tfm = c->hash_tfm;542542+ hash_desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;543543+544544+ ubifs_shash_copy_state(c, log_hash, hash_desc);545545+ return crypto_shash_final(hash_desc, hash);546546+}547547+548548+static int authenticate_sleb_hmac(struct ubifs_info *c, u8 *hash, u8 *hmac)549549+{550550+ SHASH_DESC_ON_STACK(hmac_desc, c->hmac_tfm);551551+552552+ hmac_desc->tfm = c->hmac_tfm;553553+ hmac_desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;554554+555555+ return crypto_shash_digest(hmac_desc, hash, c->hash_len, hmac);556556+}557557+573558/**574559 * authenticate_sleb - authenticate one scan LEB575560 * @c: UBIFS file-system description object···633574634575 if (snod->type == UBIFS_AUTH_NODE) {635576 struct ubifs_auth_node *auth = snod->node;636636- SHASH_DESC_ON_STACK(hash_desc, c->hash_tfm);637637- SHASH_DESC_ON_STACK(hmac_desc, c->hmac_tfm);638577639639- hash_desc->tfm = c->hash_tfm;640640- hash_desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;641641-642642- ubifs_shash_copy_state(c, log_hash, hash_desc);643643- err = crypto_shash_final(hash_desc, hash);578578+ err = authenticate_sleb_hash(c, log_hash, hash);644579 if (err)645580 goto out;646581647647- hmac_desc->tfm = c->hmac_tfm;648648- hmac_desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;649649- err = crypto_shash_digest(hmac_desc, hash, c->hash_len,650650- hmac);582582+ err = authenticate_sleb_hmac(c, hash, hmac);651583 if (err)652584 goto out;653585
+12-1
fs/ubifs/sb.c
···6363/* Default time granularity in nanoseconds */6464#define DEFAULT_TIME_GRAN 100000000065656666+static int get_default_compressor(struct ubifs_info *c)6767+{6868+ if (ubifs_compr_present(c, UBIFS_COMPR_LZO))6969+ return UBIFS_COMPR_LZO;7070+7171+ if (ubifs_compr_present(c, UBIFS_COMPR_ZLIB))7272+ return UBIFS_COMPR_ZLIB;7373+7474+ return UBIFS_COMPR_NONE;7575+}7676+6677/**6778 * create_default_filesystem - format empty UBI volume.6879 * @c: UBIFS file-system description object···218207 if (c->mount_opts.override_compr)219208 sup->default_compr = cpu_to_le16(c->mount_opts.compr_type);220209 else221221- sup->default_compr = cpu_to_le16(UBIFS_COMPR_LZO);210210+ sup->default_compr = cpu_to_le16(get_default_compressor(c));222211223212 generate_random_uuid(sup->uuid);224213
+4-4
include/asm-generic/bug.h
···1717#ifndef __ASSEMBLY__1818#include <linux/kernel.h>19192020-struct bug_entry {2020+#ifdef CONFIG_BUG2121+2122#ifdef CONFIG_GENERIC_BUG2323+struct bug_entry {2224#ifndef CONFIG_GENERIC_BUG_RELATIVE_POINTERS2325 unsigned long bug_addr;2426#else···3533 unsigned short line;3634#endif3735 unsigned short flags;3838-#endif /* CONFIG_GENERIC_BUG */3936};4040-4141-#ifdef CONFIG_BUG3737+#endif /* CONFIG_GENERIC_BUG */42384339/*4440 * Don't use BUG() or BUG_ON() unless there's really no way out; one
···11481148 return ret;11491149}1150115011511151+static int handle_exit_race(u32 __user *uaddr, u32 uval,11521152+ struct task_struct *tsk)11531153+{11541154+ u32 uval2;11551155+11561156+ /*11571157+ * If PF_EXITPIDONE is not yet set, then try again.11581158+ */11591159+ if (tsk && !(tsk->flags & PF_EXITPIDONE))11601160+ return -EAGAIN;11611161+11621162+ /*11631163+ * Reread the user space value to handle the following situation:11641164+ *11651165+ * CPU0 CPU111661166+ *11671167+ * sys_exit() sys_futex()11681168+ * do_exit() futex_lock_pi()11691169+ * futex_lock_pi_atomic()11701170+ * exit_signals(tsk) No waiters:11711171+ * tsk->flags |= PF_EXITING; *uaddr == 0x00000PID11721172+ * mm_release(tsk) Set waiter bit11731173+ * exit_robust_list(tsk) { *uaddr = 0x80000PID;11741174+ * Set owner died attach_to_pi_owner() {11751175+ * *uaddr = 0xC0000000; tsk = get_task(PID);11761176+ * } if (!tsk->flags & PF_EXITING) {11771177+ * ... attach();11781178+ * tsk->flags |= PF_EXITPIDONE; } else {11791179+ * if (!(tsk->flags & PF_EXITPIDONE))11801180+ * return -EAGAIN;11811181+ * return -ESRCH; <--- FAIL11821182+ * }11831183+ *11841184+ * Returning ESRCH unconditionally is wrong here because the11851185+ * user space value has been changed by the exiting task.11861186+ *11871187+ * The same logic applies to the case where the exiting task is11881188+ * already gone.11891189+ */11901190+ if (get_futex_value_locked(&uval2, uaddr))11911191+ return -EFAULT;11921192+11931193+ /* If the user space value has changed, try again. */11941194+ if (uval2 != uval)11951195+ return -EAGAIN;11961196+11971197+ /*11981198+ * The exiting task did not have a robust list, the robust list was11991199+ * corrupted or the user space value in *uaddr is simply bogus.12001200+ * Give up and tell user space.12011201+ */12021202+ return -ESRCH;12031203+}12041204+11511205/*11521206 * Lookup the task for the TID provided from user space and attach to11531207 * it after doing proper sanity checks.11541208 */11551155-static int attach_to_pi_owner(u32 uval, union futex_key *key,12091209+static int attach_to_pi_owner(u32 __user *uaddr, u32 uval, union futex_key *key,11561210 struct futex_pi_state **ps)11571211{11581212 pid_t pid = uval & FUTEX_TID_MASK;···12161162 /*12171163 * We are the first waiter - try to look up the real owner and attach12181164 * the new pi_state to it, but bail out when TID = 0 [1]11651165+ *11661166+ * The !pid check is paranoid. None of the call sites should end up11671167+ * with pid == 0, but better safe than sorry. Let the caller retry12191168 */12201169 if (!pid)12211221- return -ESRCH;11701170+ return -EAGAIN;12221171 p = find_get_task_by_vpid(pid);12231172 if (!p)12241224- return -ESRCH;11731173+ return handle_exit_race(uaddr, uval, NULL);1225117412261175 if (unlikely(p->flags & PF_KTHREAD)) {12271176 put_task_struct(p);···12441187 * set, we know that the task has finished the12451188 * cleanup:12461189 */12471247- int ret = (p->flags & PF_EXITPIDONE) ? -ESRCH : -EAGAIN;11901190+ int ret = handle_exit_race(uaddr, uval, p);1248119112491192 raw_spin_unlock_irq(&p->pi_lock);12501193 put_task_struct(p);···13011244 * We are the first waiter - try to look up the owner based on13021245 * @uval and attach to it.13031246 */13041304- return attach_to_pi_owner(uval, key, ps);12471247+ return attach_to_pi_owner(uaddr, uval, key, ps);13051248}1306124913071250static int lock_pi_update_atomic(u32 __user *uaddr, u32 uval, u32 newval)···14091352 * attach to the owner. If that fails, no harm done, we only14101353 * set the FUTEX_WAITERS bit in the user space variable.14111354 */14121412- return attach_to_pi_owner(uval, key, ps);13551355+ return attach_to_pi_owner(uaddr, newval, key, ps);14131356}1414135714151358/**
+1-4
kernel/time/posix-timers.c
···289289{290290 struct hrtimer *timer = &timr->it.real.timer;291291292292- if (!timr->it_interval)293293- return;294294-295292 timr->it_overrun += hrtimer_forward(timer, timer->base->get_time(),296293 timr->it_interval);297294 hrtimer_restart(timer);···314317 if (!timr)315318 return;316319317317- if (timr->it_requeue_pending == info->si_sys_private) {320320+ if (timr->it_interval && timr->it_requeue_pending == info->si_sys_private) {318321 timr->kclock->timer_rearm(timr);319322320323 timr->it_active = 1;
+3
net/core/skmsg.c
···9494 }95959696 while (len) {9797+ if (sk_msg_full(dst))9898+ return -ENOSPC;9999+97100 sge_len = sge->length - off;98101 sge_off = sge->offset + off;99102 if (sge_len > len)
+3-1
net/ipv4/inet_diag.c
···998998 if (!inet_diag_bc_sk(bc, sk))999999 goto next_normal;1000100010011001- sock_hold(sk);10011001+ if (!refcount_inc_not_zero(&sk->sk_refcnt))10021002+ goto next_normal;10031003+10021004 num_arr[accum] = num;10031005 sk_arr[accum] = sk;10041006 if (++accum == SKARR_SZ)
+1
net/ipv6/ip6_tunnel.c
···901901 goto drop;902902 if (!xfrm6_policy_check(NULL, XFRM_POLICY_IN, skb))903903 goto drop;904904+ ipv6h = ipv6_hdr(skb);904905 if (!ip6_tnl_rcv_ctl(t, &ipv6h->daddr, &ipv6h->saddr))905906 goto drop;906907 if (iptunnel_pull_header(skb, 0, tpi->proto, false))
···26272627 proto = saddr->sll_protocol;26282628 addr = saddr->sll_addr;26292629 dev = dev_get_by_index(sock_net(&po->sk), saddr->sll_ifindex);26302630+ if (addr && dev && saddr->sll_halen < dev->addr_len)26312631+ goto out;26302632 }2631263326322634 err = -ENXIO;···28272825 proto = saddr->sll_protocol;28282826 addr = saddr->sll_addr;28292827 dev = dev_get_by_index(sock_net(sk), saddr->sll_ifindex);28282828+ if (addr && dev && saddr->sll_halen < dev->addr_len)28292829+ goto out;28302830 }2831283128322832 err = -ENXIO;
+6-4
net/tls/tls_sw.c
···943943 tls_ctx->tx.overhead_size);944944 }945945946946- ret = sk_msg_memcopy_from_iter(sk, &msg->msg_iter, msg_pl,947947- try_to_copy);948948- if (ret < 0)949949- goto trim_sgl;946946+ if (try_to_copy) {947947+ ret = sk_msg_memcopy_from_iter(sk, &msg->msg_iter,948948+ msg_pl, try_to_copy);949949+ if (ret < 0)950950+ goto trim_sgl;951951+ }950952951953 /* Open records defined only if successfully copied, otherwise952954 * we would trim the sg but not reset the open record frags.
+1-3
scripts/Kbuild.include
···115115116116# Do not attempt to build with gcc plugins during cc-option tests.117117# (And this uses delayed resolution so the flags will be up to date.)118118-# In addition, do not include the asm macros which are built later.119119-CC_OPTION_FILTERED = $(GCC_PLUGINS_CFLAGS) $(ASM_MACRO_FLAGS)120120-CC_OPTION_CFLAGS = $(filter-out $(CC_OPTION_FILTERED),$(KBUILD_CFLAGS))118118+CC_OPTION_CFLAGS = $(filter-out $(GCC_PLUGINS_CFLAGS),$(KBUILD_CFLAGS))121119122120# cc-option123121# Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586)