usb: dwc3: core: Set force_gen1 bit for all applicable SuperSpeed ports

Currently if the maximum-speed is set to Super Speed for a 3.1 Gen2
capable controller, the FORCE_GEN1 bit of LLUCTL register is set only
for one SuperSpeed port (or the first port) present. Modify the logic
to set the FORCE_GEN1 bit for all ports if speed is being limited to
Gen-1.

Suggested-by: Thinh Nguyen <[e-mail]>
Signed-off-by: Krishna Kurapati <[e-mail]>
Acked-by: Thinh Nguyen <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]
Signed-off-by: Greg Kroah-Hartman <[e-mail]>

drivers/usb/dwc3/core.c

···
 	if (hw_mode != DWC3_GHWPARAMS0_MODE_GADGET &&
 	    (DWC3_IP_IS(DWC31)) &&
 	    dwc->maximum_speed == USB_SPEED_SUPER) {
-		reg = dwc3_readl(dwc->regs, DWC3_LLUCTL);
-		reg |= DWC3_LLUCTL_FORCE_GEN1;
-		dwc3_writel(dwc->regs, DWC3_LLUCTL, reg);
+		int i;
+
+		for (i = 0; i < dwc->num_usb3_ports; i++) {
+			reg = dwc3_readl(dwc->regs, DWC3_LLUCTL(i));
+			reg |= DWC3_LLUCTL_FORCE_GEN1;
+			dwc3_writel(dwc->regs, DWC3_LLUCTL(i), reg);
+		}
 	}
 
 	return 0;

drivers/usb/dwc3/core.h

···
 #define DWC3_OEVTEN		0xcc0C
 #define DWC3_OSTS		0xcc10
 
-#define DWC3_LLUCTL		0xd024
+#define DWC3_LLUCTL(n)		(0xd024 + ((n) * 0x80))
 
 /* Bit fields */