drm/i915: Enable RC6 on Ironlake.

RC6 allows the GPU to enter a lower power state when the GPU is idle.

Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
[anholt: Fixed the !renderctx error path to actually not enable RC6.]
Signed-off-by: Eric Anholt <eric@anholt.net>

authored by

Zou Nan hai and committed by
Eric Anholt
ce171780 8545423a

+6 -3
+6 -3
drivers/gpu/drm/i915/intel_display.c
··· 5753 ILK_DPFC_DIS2 | 5754 ILK_CLK_FBC); 5755 } 5756 - return; 5757 } else if (IS_G4X(dev)) { 5758 uint32_t dspclk_gate; 5759 I915_WRITE(RENCLK_GATE_D1, 0); ··· 5815 OUT_RING(MI_FLUSH); 5816 ADVANCE_LP_RING(); 5817 } 5818 - } else 5819 DRM_DEBUG_KMS("Failed to allocate render context." 5820 - "Disable RC6\n"); 5821 } 5822 5823 if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) {
··· 5753 ILK_DPFC_DIS2 | 5754 ILK_CLK_FBC); 5755 } 5756 + if (IS_GEN6(dev)) 5757 + return; 5758 } else if (IS_G4X(dev)) { 5759 uint32_t dspclk_gate; 5760 I915_WRITE(RENCLK_GATE_D1, 0); ··· 5814 OUT_RING(MI_FLUSH); 5815 ADVANCE_LP_RING(); 5816 } 5817 + } else { 5818 DRM_DEBUG_KMS("Failed to allocate render context." 5819 + "Disable RC6\n"); 5820 + return; 5821 + } 5822 } 5823 5824 if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) {