tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

pinctrl: sunxi: Disable strict mode for old pinctrl drivers

Old pinctrl drivers will need to disable strict mode for various reasons,
among which:
- Some DT will still have a pinctrl group for each GPIO used, which will
be rejected by pin_request. While we could remove those nodes, we still
have to deal with old DTs.
- Some GPIOs on these boards need to have their pin configuration changed
(for bias or current), and there's no clear migration path

Let's disable the strict mode on those SoCs so that there's no breakage.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Maxime Ripard and committed by
Linus Walleij cd70387f aae842a3

+13 -2
+1
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
··· 1289 1289 .npins = ARRAY_SIZE(sun4i_a10_pins), 1290 1290 .irq_banks = 1, 1291 1291 .irq_read_needs_mux = true, 1292 + .disable_strict_mode = true, 1292 1293 }; 1293 1294 1294 1295 static int sun4i_a10_pinctrl_probe(struct platform_device *pdev)
+1
drivers/pinctrl/sunxi/pinctrl-sun5i.c
··· 713 713 .pins = sun5i_pins, 714 714 .npins = ARRAY_SIZE(sun5i_pins), 715 715 .irq_banks = 1, 716 + .disable_strict_mode = true, 716 717 }; 717 718 718 719 static int sun5i_pinctrl_probe(struct platform_device *pdev)
+1
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
··· 106 106 .npins = ARRAY_SIZE(sun6i_a31_r_pins), 107 107 .pin_base = PL_BASE, 108 108 .irq_banks = 2, 109 + .disable_strict_mode = true, 109 110 }; 110 111 111 112 static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev)
+1
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
··· 965 965 .pins = sun6i_a31_pins, 966 966 .npins = ARRAY_SIZE(sun6i_a31_pins), 967 967 .irq_banks = 4, 968 + .disable_strict_mode = true, 968 969 }; 969 970 970 971 static int sun6i_a31_pinctrl_probe(struct platform_device *pdev)
+1
drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
··· 93 93 .npins = ARRAY_SIZE(sun8i_a23_r_pins), 94 94 .pin_base = PL_BASE, 95 95 .irq_banks = 1, 96 + .disable_strict_mode = true, 96 97 }; 97 98 98 99 static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
+1
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
··· 563 563 .pins = sun8i_a23_pins, 564 564 .npins = ARRAY_SIZE(sun8i_a23_pins), 565 565 .irq_banks = 3, 566 + .disable_strict_mode = true, 566 567 }; 567 568 568 569 static int sun8i_a23_pinctrl_probe(struct platform_device *pdev)
+1
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
··· 486 486 .npins = ARRAY_SIZE(sun8i_a33_pins), 487 487 .irq_banks = 2, 488 488 .irq_bank_base = 1, 489 + .disable_strict_mode = true, 489 490 }; 490 491 491 492 static int sun8i_a33_pinctrl_probe(struct platform_device *pdev)
+2 -1
drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
··· 82 82 .npins = ARRAY_SIZE(sun8i_h3_r_pins), 83 83 .irq_banks = 1, 84 84 .pin_base = PL_BASE, 85 - .irq_read_needs_mux = true 85 + .irq_read_needs_mux = true, 86 + .disable_strict_mode = true, 86 87 }; 87 88 88 89 static int sun8i_h3_r_pinctrl_probe(struct platform_device *pdev)
+2 -1
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
··· 491 491 .pins = sun8i_h3_pins, 492 492 .npins = ARRAY_SIZE(sun8i_h3_pins), 493 493 .irq_banks = 2, 494 - .irq_read_needs_mux = true 494 + .irq_read_needs_mux = true, 495 + .disable_strict_mode = true, 495 496 }; 496 497 497 498 static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
+1
drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
··· 152 152 .npins = ARRAY_SIZE(sun9i_a80_r_pins), 153 153 .pin_base = PL_BASE, 154 154 .irq_banks = 2, 155 + .disable_strict_mode = true, 155 156 }; 156 157 157 158 static int sun9i_a80_r_pinctrl_probe(struct platform_device *pdev)
+1
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
··· 721 721 .pins = sun9i_a80_pins, 722 722 .npins = ARRAY_SIZE(sun9i_a80_pins), 723 723 .irq_banks = 5, 724 + .disable_strict_mode = true, 724 725 }; 725 726 726 727 static int sun9i_a80_pinctrl_probe(struct platform_device *pdev)