···1212 * License. See linux/COPYING for more information.1313 *1414 */1515-1615#undef DEBUG17161817#include <linux/init.h>···2728 * Initialization. Try all known PCI access methods. Note that we support2829 * using both PCI BIOS and direct access: in such cases, we use I/O ports2930 * to access config space.3030- * 3131+ *3132 * Note that the platform specific initialization (BSC registers, and memory3233 * space mapping) will be called via the platform defined function3334 * pcibios_init_platform().···114115 * Wait Cycle Control + Parity Enable + Bus Master +115116 * Mem space enable116117 */117117- word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER | 118118+ word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |118119 SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES;119120 pci_write_reg(word, SH7751_PCICONF1);120121···122123 word = PCI_BASE_CLASS_BRIDGE << 24;123124 pci_write_reg(word, SH7751_PCICONF2);124125125125- /* Set IO and Mem windows to local address 126126- * Make PCI and local address the same for easy 1 to 1 mapping 126126+ /* Set IO and Mem windows to local address127127+ * Make PCI and local address the same for easy 1 to 1 mapping127128 * Window0 = map->window0.size @ non-cached area base = SDRAM128128- * Window1 = map->window1.size @ cached area base = SDRAM 129129+ * Window1 = map->window1.size @ cached area base = SDRAM129130 */130131 word = map->window0.size - 1;131132 pci_write_reg(word, SH4_PCILSR0);···174175 case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(5); break;175176 case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(6); break;176177 }177177-178178+178179 if (!word)179180 return 0;180181···193194 * DMA interrupts...194195 */195196196196-#if defined(CONFIG_SH_RTS7751R2D) || defined(CONFIG_SH_LBOX_RE2)197197 pci_fixup_pcic();198198-#endif199198200199 /* SH7751 init done, set central function init complete */201200 /* use round robin mode to stop a device starving/overruning */