Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

thunderbolt: Read port configuration from eeprom.

All Thunderbolt switches (except the root switch) contain a drom which
contains information about the device. Right now we only read the UID.

Add code to read and parse this drom. For now we are only interested in
which ports are disabled and which ports are "dual link ports" (a
physical thunderbolt port/socket contains two such ports).

Signed-off-by: Andreas Noever <andreas.noever@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Andreas Noever and committed by
Greg Kroah-Hartman
cd22e73b 23dd5bb4

+271 -8
+263 -5
drivers/thunderbolt/eeprom.c
··· 4 4 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> 5 5 */ 6 6 7 + #include <linux/crc32.h> 7 8 #include "tb.h" 8 9 9 10 /** ··· 153 152 return tb_eeprom_active(sw, false); 154 153 } 155 154 156 - int tb_eeprom_read_uid(struct tb_switch *sw, u64 *uid) 155 + static u8 tb_crc8(u8 *data, int len) 157 156 { 158 - u8 data[9]; 157 + int i, j; 158 + u8 val = 0xff; 159 + for (i = 0; i < len; i++) { 160 + val ^= data[i]; 161 + for (j = 0; j < 8; j++) 162 + val = (val << 1) ^ ((val & 0x80) ? 7 : 0); 163 + } 164 + return val; 165 + } 166 + 167 + static u32 tb_crc32(void *data, size_t len) 168 + { 169 + return ~__crc32c_le(~0, data, len); 170 + } 171 + 172 + #define TB_DROM_DATA_START 13 173 + struct tb_drom_header { 174 + /* BYTE 0 */ 175 + u8 uid_crc8; /* checksum for uid */ 176 + /* BYTES 1-8 */ 177 + u64 uid; 178 + /* BYTES 9-12 */ 179 + u32 data_crc32; /* checksum for data_len bytes starting at byte 13 */ 180 + /* BYTE 13 */ 181 + u8 device_rom_revision; /* should be <= 1 */ 182 + u16 data_len:10; 183 + u8 __unknown1:6; 184 + /* BYTES 16-21 */ 185 + u16 vendor_id; 186 + u16 model_id; 187 + u8 model_rev; 188 + u8 eeprom_rev; 189 + } __packed; 190 + 191 + enum tb_drom_entry_type { 192 + TB_DROM_ENTRY_GENERIC, 193 + TB_DROM_ENTRY_PORT, 194 + }; 195 + 196 + struct tb_drom_entry_header { 197 + u8 len; 198 + u8 index:6; 199 + bool port_disabled:1; /* only valid if type is TB_DROM_ENTRY_PORT */ 200 + enum tb_drom_entry_type type:1; 201 + } __packed; 202 + 203 + struct tb_drom_entry_port { 204 + /* BYTES 0-1 */ 205 + struct tb_drom_entry_header header; 206 + /* BYTE 2 */ 207 + u8 dual_link_port_rid:4; 208 + u8 link_nr:1; 209 + u8 unknown1:2; 210 + bool has_dual_link_port:1; 211 + 212 + /* BYTE 3 */ 213 + u8 dual_link_port_nr:6; 214 + u8 unknown2:2; 215 + 216 + /* BYTES 4 - 5 TODO decode */ 217 + u8 micro2:4; 218 + u8 micro1:4; 219 + u8 micro3; 220 + 221 + /* BYTES 5-6, TODO: verify (find hardware that has these set) */ 222 + u8 peer_port_rid:4; 223 + u8 unknown3:3; 224 + bool has_peer_port:1; 225 + u8 peer_port_nr:6; 226 + u8 unknown4:2; 227 + } __packed; 228 + 229 + 230 + /** 231 + * tb_eeprom_get_drom_offset - get drom offset within eeprom 232 + */ 233 + int tb_eeprom_get_drom_offset(struct tb_switch *sw, u16 *offset) 234 + { 159 235 struct tb_cap_plug_events cap; 160 236 int res; 161 237 if (!sw->cap_plug_events) { ··· 243 165 sizeof(cap) / 4); 244 166 if (res) 245 167 return res; 168 + 246 169 if (!cap.eeprom_ctl.present || cap.eeprom_ctl.not_present) { 247 170 tb_sw_warn(sw, "no NVM\n"); 248 171 return -ENOSYS; ··· 254 175 cap.drom_offset); 255 176 return -ENXIO; 256 177 } 178 + *offset = cap.drom_offset; 179 + return 0; 180 + } 257 181 258 - /* read uid */ 259 - res = tb_eeprom_read_n(sw, cap.drom_offset, data, 9); 182 + /** 183 + * tb_drom_read_uid_only - read uid directly from drom 184 + * 185 + * Does not use the cached copy in sw->drom. Used during resume to check switch 186 + * identity. 187 + */ 188 + int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid) 189 + { 190 + u8 data[9]; 191 + u16 drom_offset; 192 + u8 crc; 193 + int res = tb_eeprom_get_drom_offset(sw, &drom_offset); 260 194 if (res) 261 195 return res; 262 - /* TODO: check checksum in data[0] */ 196 + 197 + /* read uid */ 198 + res = tb_eeprom_read_n(sw, drom_offset, data, 9); 199 + if (res) 200 + return res; 201 + 202 + crc = tb_crc8(data + 1, 8); 203 + if (crc != data[0]) { 204 + tb_sw_warn(sw, "uid crc8 missmatch (expected: %#x, got: %#x)\n", 205 + data[0], crc); 206 + return -EIO; 207 + } 208 + 263 209 *uid = *(u64 *)(data+1); 264 210 return 0; 265 211 } 266 212 213 + static void tb_drom_parse_port_entry(struct tb_port *port, 214 + struct tb_drom_entry_port *entry) 215 + { 216 + port->link_nr = entry->link_nr; 217 + if (entry->has_dual_link_port) 218 + port->dual_link_port = 219 + &port->sw->ports[entry->dual_link_port_nr]; 220 + } 267 221 222 + static int tb_drom_parse_entry(struct tb_switch *sw, 223 + struct tb_drom_entry_header *header) 224 + { 225 + struct tb_port *port; 226 + int res; 227 + enum tb_port_type type; 268 228 229 + if (header->type != TB_DROM_ENTRY_PORT) 230 + return 0; 231 + 232 + port = &sw->ports[header->index]; 233 + port->disabled = header->port_disabled; 234 + if (port->disabled) 235 + return 0; 236 + 237 + res = tb_port_read(port, &type, TB_CFG_PORT, 2, 1); 238 + if (res) 239 + return res; 240 + type &= 0xffffff; 241 + 242 + if (type == TB_TYPE_PORT) { 243 + struct tb_drom_entry_port *entry = (void *) header; 244 + if (header->len != sizeof(*entry)) { 245 + tb_sw_warn(sw, 246 + "port entry has size %#x (expected %#lx)\n", 247 + header->len, sizeof(struct tb_drom_entry_port)); 248 + return -EIO; 249 + } 250 + tb_drom_parse_port_entry(port, entry); 251 + } 252 + return 0; 253 + } 254 + 255 + /** 256 + * tb_drom_parse_entries - parse the linked list of drom entries 257 + * 258 + * Drom must have been copied to sw->drom. 259 + */ 260 + static int tb_drom_parse_entries(struct tb_switch *sw) 261 + { 262 + struct tb_drom_header *header = (void *) sw->drom; 263 + u16 pos = sizeof(*header); 264 + u16 drom_size = header->data_len + TB_DROM_DATA_START; 265 + 266 + while (pos < drom_size) { 267 + struct tb_drom_entry_header *entry = (void *) (sw->drom + pos); 268 + if (pos + 1 == drom_size || pos + entry->len > drom_size 269 + || !entry->len) { 270 + tb_sw_warn(sw, "drom buffer overrun, aborting\n"); 271 + return -EIO; 272 + } 273 + 274 + tb_drom_parse_entry(sw, entry); 275 + 276 + pos += entry->len; 277 + } 278 + return 0; 279 + } 280 + 281 + /** 282 + * tb_drom_read - copy drom to sw->drom and parse it 283 + */ 284 + int tb_drom_read(struct tb_switch *sw) 285 + { 286 + u16 drom_offset; 287 + u16 size; 288 + u32 crc; 289 + struct tb_drom_header *header; 290 + int res; 291 + if (sw->drom) 292 + return 0; 293 + 294 + if (tb_route(sw) == 0) { 295 + /* 296 + * The root switch contains only a dummy drom (header only, 297 + * no entries). Hardcode the configuration here. 298 + */ 299 + tb_drom_read_uid_only(sw, &sw->uid); 300 + 301 + sw->ports[1].link_nr = 0; 302 + sw->ports[2].link_nr = 1; 303 + sw->ports[1].dual_link_port = &sw->ports[2]; 304 + sw->ports[2].dual_link_port = &sw->ports[1]; 305 + 306 + sw->ports[3].link_nr = 0; 307 + sw->ports[4].link_nr = 1; 308 + sw->ports[3].dual_link_port = &sw->ports[4]; 309 + sw->ports[4].dual_link_port = &sw->ports[3]; 310 + return 0; 311 + } 312 + 313 + res = tb_eeprom_get_drom_offset(sw, &drom_offset); 314 + if (res) 315 + return res; 316 + 317 + res = tb_eeprom_read_n(sw, drom_offset + 14, (u8 *) &size, 2); 318 + if (res) 319 + return res; 320 + size &= 0x3ff; 321 + size += TB_DROM_DATA_START; 322 + tb_sw_info(sw, "reading drom (length: %#x)\n", size); 323 + if (size < sizeof(*header)) { 324 + tb_sw_warn(sw, "drom too small, aborting\n"); 325 + return -EIO; 326 + } 327 + 328 + sw->drom = kzalloc(size, GFP_KERNEL); 329 + if (!sw->drom) 330 + return -ENOMEM; 331 + res = tb_eeprom_read_n(sw, drom_offset, sw->drom, size); 332 + if (res) 333 + goto err; 334 + 335 + header = (void *) sw->drom; 336 + 337 + if (header->data_len + TB_DROM_DATA_START != size) { 338 + tb_sw_warn(sw, "drom size mismatch, aborting\n"); 339 + goto err; 340 + } 341 + 342 + crc = tb_crc8((u8 *) &header->uid, 8); 343 + if (crc != header->uid_crc8) { 344 + tb_sw_warn(sw, 345 + "drom uid crc8 mismatch (expected: %#x, got: %#x), aborting\n", 346 + header->uid_crc8, crc); 347 + goto err; 348 + } 349 + sw->uid = header->uid; 350 + 351 + crc = tb_crc32(sw->drom + TB_DROM_DATA_START, header->data_len); 352 + if (crc != header->data_crc32) { 353 + tb_sw_warn(sw, 354 + "drom data crc32 mismatch (expected: %#x, got: %#x), aborting\n", 355 + header->data_crc32, crc); 356 + goto err; 357 + } 358 + 359 + if (header->device_rom_revision > 1) 360 + tb_sw_warn(sw, "drom device_rom_revision %#x unknown\n", 361 + header->device_rom_revision); 362 + 363 + return tb_drom_parse_entries(sw); 364 + err: 365 + kfree(sw->drom); 366 + return -EIO; 367 + 368 + }
+2 -2
drivers/thunderbolt/switch.c
··· 400 400 } 401 401 sw->cap_plug_events = cap; 402 402 403 - if (tb_eeprom_read_uid(sw, &sw->uid)) 403 + if (tb_drom_read_uid_only(sw, &sw->uid)) 404 404 tb_sw_warn(sw, "could not read uid from eeprom\n"); 405 405 else 406 406 tb_sw_info(sw, "uid: %#llx\n", sw->uid); ··· 442 442 u64 uid; 443 443 tb_sw_info(sw, "resuming switch\n"); 444 444 445 - err = tb_eeprom_read_uid(sw, &uid); 445 + err = tb_drom_read_uid_only(sw, &uid); 446 446 if (err) { 447 447 tb_sw_warn(sw, "uid read failed\n"); 448 448 return err;
+6 -1
drivers/thunderbolt/tb.h
··· 22 22 u64 uid; 23 23 int cap_plug_events; /* offset, zero if not found */ 24 24 bool is_unplugged; /* unplugged, will go away */ 25 + u8 *drom; 25 26 }; 26 27 27 28 /** ··· 34 33 struct tb_port *remote; /* remote port, NULL if not connected */ 35 34 int cap_phy; /* offset, zero if not found */ 36 35 u8 port; /* port number on switch */ 36 + bool disabled; /* disabled by eeprom */ 37 + struct tb_port *dual_link_port; 38 + u8 link_nr:1; 37 39 }; 38 40 39 41 /** ··· 241 237 void tb_path_deactivate(struct tb_path *path); 242 238 bool tb_path_is_invalid(struct tb_path *path); 243 239 244 - int tb_eeprom_read_uid(struct tb_switch *sw, u64 *uid); 240 + int tb_drom_read(struct tb_switch *sw); 241 + int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid); 245 242 246 243 247 244 static inline int tb_route_length(u64 route)