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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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kernel
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linux
ARM: 6412/1: kprobes-decode: add support for MOVW instruction
The MOVW instruction moves a 16-bit immediate into the bottom halfword
of the destination register.
This patch ensures that kprobes leaves the 16-bit immediate intact, rather
than assume a 12-bit immediate and mask out the upper 4 bits.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
authored by Will Deacon and committed by Russell King ccdf2e1b 7f58217b
+4
-3
arch/arm/kernel/kprobes-decode.c
+4
-3
arch/arm/kernel/kprobes-decode.c
···
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{
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/*
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* MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx
1165
-
* Undef : cccc 0011 0x00 xxxx xxxx xxxx xxxx xxxx
1165
+
* Undef : cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx
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* ALU op with S bit and Rd == 15 :
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* cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx
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*/
1169
-
if ((insn & 0x0f900000) == 0x03200000 || /* MSR & Undef */
1169
+
if ((insn & 0x0fb00000) == 0x03200000 || /* MSR */
1170
+
(insn & 0x0ff00000) == 0x03400000 || /* Undef */
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(insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */
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return INSN_REJECTED;
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···
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* *S (bit 20) updates condition codes
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* ADC/SBC/RSC reads the C flag
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*/
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-
insn &= 0xfff00fff; /* Rn = r0, Rd = r0 */
1180
+
insn &= 0xffff0fff; /* Rd = r0 */
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asi->insn[0] = insn;
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asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
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emulate_alu_imm_rwflags : emulate_alu_imm_rflags;