Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

perf arm-spe: Prepare for adding data source packet implementations for other cores

Split Data Source Packet handling to prepare adding support for
other implementations.

Reviewed-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Graham Woodward <graham.woodward@arm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20241108202946.16835-2-ilkka@os.amperecomputing.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

authored by

Ilkka Koskinen and committed by
Arnaldo Carvalho de Melo
ccdc9e9c 9eef3ec9

+30 -12
+30 -12
tools/perf/util/arm-spe.c
··· 103 103 u32 flags; 104 104 }; 105 105 106 + struct data_source_handle { 107 + const struct midr_range *midr_ranges; 108 + void (*ds_synth)(const struct arm_spe_record *record, 109 + union perf_mem_data_src *data_src); 110 + }; 111 + 112 + #define DS(range, func) \ 113 + { \ 114 + .midr_ranges = range, \ 115 + .ds_synth = arm_spe__synth_##func, \ 116 + } 117 + 106 118 static void arm_spe_dump(struct arm_spe *spe __maybe_unused, 107 119 unsigned char *buf, size_t len) 108 120 { ··· 544 532 } 545 533 } 546 534 535 + static const struct data_source_handle data_source_handles[] = { 536 + DS(common_ds_encoding_cpus, data_source_common), 537 + }; 538 + 547 539 static void arm_spe__synth_memory_level(const struct arm_spe_record *record, 548 540 union perf_mem_data_src *data_src) 549 541 { ··· 571 555 data_src->mem_lvl |= PERF_MEM_LVL_REM_CCE1; 572 556 } 573 557 574 - static bool arm_spe__is_common_ds_encoding(struct arm_spe_queue *speq) 558 + static bool arm_spe__synth_ds(struct arm_spe_queue *speq, 559 + const struct arm_spe_record *record, 560 + union perf_mem_data_src *data_src) 575 561 { 576 562 struct arm_spe *spe = speq->spe; 577 - bool is_in_cpu_list; 578 563 u64 *metadata = NULL; 579 - u64 midr = 0; 564 + u64 midr; 565 + unsigned int i; 580 566 581 567 /* Metadata version 1 assumes all CPUs are the same (old behavior) */ 582 568 if (spe->metadata_ver == 1) { ··· 610 592 midr = metadata[ARM_SPE_CPU_MIDR]; 611 593 } 612 594 613 - is_in_cpu_list = is_midr_in_range_list(midr, common_ds_encoding_cpus); 614 - if (is_in_cpu_list) 615 - return true; 616 - else 617 - return false; 595 + for (i = 0; i < ARRAY_SIZE(data_source_handles); i++) { 596 + if (is_midr_in_range_list(midr, data_source_handles[i].midr_ranges)) { 597 + data_source_handles[i].ds_synth(record, data_src); 598 + return true; 599 + } 600 + } 601 + 602 + return false; 618 603 } 619 604 620 605 static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq, 621 606 const struct arm_spe_record *record) 622 607 { 623 608 union perf_mem_data_src data_src = { .mem_op = PERF_MEM_OP_NA }; 624 - bool is_common = arm_spe__is_common_ds_encoding(speq); 625 609 626 610 if (record->op & ARM_SPE_OP_LD) 627 611 data_src.mem_op = PERF_MEM_OP_LOAD; ··· 632 612 else 633 613 return 0; 634 614 635 - if (is_common) 636 - arm_spe__synth_data_source_common(record, &data_src); 637 - else 615 + if (!arm_spe__synth_ds(speq, record, &data_src)) 638 616 arm_spe__synth_memory_level(record, &data_src); 639 617 640 618 if (record->type & (ARM_SPE_TLB_ACCESS | ARM_SPE_TLB_MISS)) {