Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'fbdev-v5.2' of git://github.com/bzolnier/linux

Pull fbdev updates from Bartlomiej Zolnierkiewicz:
"Four small fixes for fb core, updates for udlfb, sm712fb, macfb and
atafb drivers. Redundant code removals from amba-clcd and atmel_lcdfb
drivers. Minor fixes/cleanups for other fb drivers

Detailed summary:

- fix regression in fbcon logo handling on 'quiet' boots (Andreas
Schwab)

- fix divide-by-zero error in fb_var_to_videomode() (Shile Zhang)

- fix 'WARNING in __alloc_pages_nodemask' bug (Jiufei Xue)

- list all PCI memory BARs as conflicting apertures (Gerd Hoffmann)

- update udlfb driver: fix sleeping inside spinlock, add mutex around
rendering calls and remove redundant code (Mikulas Patocka)

- update sm712fb driver: fix SM720 support related issues (Yifeng Li)

- update macfb driver: fix DAFB colour table pointer initialization
and remove redundant code (Finn Thain)

- update atafb driver: fix kexec support, use dev_*() calls instead
of printk() and remove obsolete module support (Geert Uytterhoeven)

- add support to mxsfb driver for skipping display initialization for
flicker-free display takeover from bootloader (Melchior Franz)

- remove Versatile and Nomadik board families support from amba-clcd
driver as they are handled by DRM driver nowadays (Linus Walleij)

- remove no longer needed AVR and platform_data support from
atmel_lcdfb driver (Alexandre Belloni)

- misc fixes (Colin Ian King, Julia Lawall, Gustavo A. R. Silva,
Aditya Pakki, Kangjie Lu, YueHaibing)

- misc cleanups (Enrico Weigelt, Kefeng Wang)"

* tag 'fbdev-v5.2' of git://github.com/bzolnier/linux: (38 commits)
video: fbdev: Use dev_get_drvdata()
fbcon: Don't reset logo_shown when logo is currently shown
video: fbdev: atmel_lcdfb: remove set but not used variable 'pdata'
video: fbdev: mxsfb: remove set but not used variable 'line_count'
video: fbdev: pvr2fb: remove set but not used variable 'size'
fbdev: fix WARNING in __alloc_pages_nodemask bug
video: amba-clcd: Decomission Versatile and Nomadik
fbdev: sm712fb: fix memory frequency by avoiding a switch/case fallthrough
fbdev: fix divide error in fb_var_to_videomode
fbdev: sm712fb: use 1024x768 by default on non-MIPS, fix garbled display
fbdev: sm712fb: fix support for 1024x768-16 mode
fbdev: sm712fb: fix crashes and garbled display during DPMS modesetting
fbdev: sm712fb: fix crashes during framebuffer writes by correctly mapping VRAM
fbdev: sm712fb: fix boot screen glitch when sm712fb replaces VGA
fbdev: sm712fb: fix VRAM detection, don't set SR70/71/74/75
fbdev: sm712fb: fix brightness control on reboot, don't set SR30
fbdev: sm712fb: fix white screen of death on reboot, don't set CR3B-CR3F
video: imsttfb: fix potential NULL pointer dereferences
video: hgafb: fix potential NULL pointer dereference
fbdev: list all pci memory bars as conflicting apertures
...

+612 -1557
+146 -154
drivers/video/fbdev/Kconfig
··· 45 45 device-aware may cause unexpected results. If unsure, say N. 46 46 47 47 config FIRMWARE_EDID 48 - bool "Enable firmware EDID" 49 - depends on FB 50 - ---help--- 51 - This enables access to the EDID transferred from the firmware. 52 - On the i386, this is from the Video BIOS. Enable this if DDC/I2C 53 - transfers do not work for your driver and if you are using 54 - nvidiafb, i810fb or savagefb. 48 + bool "Enable firmware EDID" 49 + depends on FB 50 + ---help--- 51 + This enables access to the EDID transferred from the firmware. 52 + On the i386, this is from the Video BIOS. Enable this if DDC/I2C 53 + transfers do not work for your driver and if you are using 54 + nvidiafb, i810fb or savagefb. 55 55 56 - In general, choosing Y for this option is safe. If you 57 - experience extremely long delays while booting before you get 58 - something on your display, try setting this to N. Matrox cards in 59 - combination with certain motherboards and monitors are known to 60 - suffer from this problem. 56 + In general, choosing Y for this option is safe. If you 57 + experience extremely long delays while booting before you get 58 + something on your display, try setting this to N. Matrox cards in 59 + combination with certain motherboards and monitors are known to 60 + suffer from this problem. 61 61 62 62 config FB_DDC 63 - tristate 64 - depends on FB 65 - select I2C_ALGOBIT 66 - select I2C 63 + tristate 64 + depends on FB 65 + select I2C_ALGOBIT 66 + select I2C 67 67 68 68 config FB_BOOT_VESA_SUPPORT 69 69 bool ··· 160 160 endchoice 161 161 162 162 config FB_SYS_FOPS 163 - tristate 164 - depends on FB 163 + tristate 164 + depends on FB 165 165 166 166 config FB_DEFERRED_IO 167 167 bool ··· 180 180 cards. 181 181 182 182 config FB_MACMODES 183 - tristate 184 - depends on FB 183 + tristate 184 + depends on FB 185 185 186 186 config FB_BACKLIGHT 187 187 tristate ··· 190 190 select BACKLIGHT_CLASS_DEVICE 191 191 192 192 config FB_MODE_HELPERS 193 - bool "Enable Video Mode Handling Helpers" 194 - depends on FB 193 + bool "Enable Video Mode Handling Helpers" 194 + depends on FB 195 195 ---help--- 196 196 This enables functions for handling video modes using the 197 197 Generalized Timing Formula and the EDID parser. A few drivers rely 198 - on this feature such as the radeonfb, rivafb, and the i810fb. If 198 + on this feature such as the radeonfb, rivafb, and the i810fb. If 199 199 your driver does not take advantage of this feature, choosing Y will 200 200 just increase the kernel size by about 5K. 201 201 202 202 config FB_TILEBLITTING 203 - bool "Enable Tile Blitting Support" 204 - depends on FB 205 - ---help--- 206 - This enables tile blitting. Tile blitting is a drawing technique 207 - where the screen is divided into rectangular sections (tiles), whereas 208 - the standard blitting divides the screen into pixels. Because the 209 - default drawing element is a tile, drawing functions will be passed 210 - parameters in terms of number of tiles instead of number of pixels. 211 - For example, to draw a single character, instead of using bitmaps, 212 - an index to an array of bitmaps will be used. To clear or move a 213 - rectangular section of a screen, the rectangle will be described in 214 - terms of number of tiles in the x- and y-axis. 203 + bool "Enable Tile Blitting Support" 204 + depends on FB 205 + ---help--- 206 + This enables tile blitting. Tile blitting is a drawing technique 207 + where the screen is divided into rectangular sections (tiles), whereas 208 + the standard blitting divides the screen into pixels. Because the 209 + default drawing element is a tile, drawing functions will be passed 210 + parameters in terms of number of tiles instead of number of pixels. 211 + For example, to draw a single character, instead of using bitmaps, 212 + an index to an array of bitmaps will be used. To clear or move a 213 + rectangular section of a screen, the rectangle will be described in 214 + terms of number of tiles in the x- and y-axis. 215 215 216 - This is particularly important to one driver, matroxfb. If 217 - unsure, say N. 216 + This is particularly important to one driver, matroxfb. If 217 + unsure, say N. 218 218 219 219 comment "Frame buffer hardware drivers" 220 220 depends on FB ··· 226 226 select FB_CFB_COPYAREA 227 227 select FB_CFB_IMAGEBLIT 228 228 ---help--- 229 - This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler. 229 + This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler. 230 230 231 231 config FB_CIRRUS 232 232 tristate "Cirrus Logic support" ··· 292 292 inserted into and removed from the running kernel), say M 293 293 here and read <file:Documentation/kbuild/modules.txt>. The module 294 294 will be called amba-clcd. 295 - 296 - # Helper logic selected only by the ARM Versatile platform family. 297 - config PLAT_VERSATILE_CLCD 298 - def_bool ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_INTEGRATOR 299 - depends on ARM 300 - depends on FB_ARMCLCD && FB=y 301 - select REGMAP 302 - select MFD_SYSCON 303 295 304 296 config FB_ACORN 305 297 bool "Acorn VIDC support" ··· 647 655 using the EFI framebuffer as your console. 648 656 649 657 config FB_N411 650 - tristate "N411 Apollo/Hecuba devkit support" 651 - depends on FB && X86 && MMU 652 - select FB_SYS_FILLRECT 653 - select FB_SYS_COPYAREA 654 - select FB_SYS_IMAGEBLIT 655 - select FB_SYS_FOPS 656 - select FB_DEFERRED_IO 657 - select FB_HECUBA 658 - help 659 - This enables support for the Apollo display controller in its 660 - Hecuba form using the n411 devkit. 658 + tristate "N411 Apollo/Hecuba devkit support" 659 + depends on FB && X86 && MMU 660 + select FB_SYS_FILLRECT 661 + select FB_SYS_COPYAREA 662 + select FB_SYS_IMAGEBLIT 663 + select FB_SYS_FOPS 664 + select FB_DEFERRED_IO 665 + select FB_HECUBA 666 + help 667 + This enables support for the Apollo display controller in its 668 + Hecuba form using the n411 devkit. 661 669 662 670 config FB_HGA 663 671 tristate "Hercules mono graphics support" ··· 677 685 select FB_CFB_FILLRECT 678 686 select FB_CFB_COPYAREA 679 687 select FB_CFB_IMAGEBLIT 680 - help 688 + help 681 689 This is the frame buffer device driver for SGI Graphics Backend. 682 690 This chip is used in SGI O2 and Visual Workstation 320/540. 683 691 ··· 858 866 <http://vdc.epson.com/> 859 867 860 868 config FB_ATMEL 861 - tristate "AT91/AT32 LCD Controller support" 862 - depends on FB && HAVE_FB_ATMEL 869 + tristate "AT91 LCD Controller support" 870 + depends on FB && OF && HAVE_FB_ATMEL 863 871 select FB_BACKLIGHT 864 872 select FB_CFB_FILLRECT 865 873 select FB_CFB_COPYAREA ··· 867 875 select FB_MODE_HELPERS 868 876 select VIDEOMODE_HELPERS 869 877 help 870 - This enables support for the AT91/AT32 LCD Controller. 878 + This enables support for the AT91 LCD Controller. 871 879 872 880 config FB_NVIDIA 873 881 tristate "nVidia Framebuffer Support" ··· 889 897 module will be called nvidiafb. 890 898 891 899 config FB_NVIDIA_I2C 892 - bool "Enable DDC Support" 893 - depends on FB_NVIDIA 894 - select FB_DDC 895 - help 900 + bool "Enable DDC Support" 901 + depends on FB_NVIDIA 902 + select FB_DDC 903 + help 896 904 This enables I2C support for nVidia Chipsets. This is used 897 905 only for getting EDID information from the attached display 898 906 allowing for robust video mode handling and switching. ··· 935 943 module will be called rivafb. 936 944 937 945 config FB_RIVA_I2C 938 - bool "Enable DDC Support" 939 - depends on FB_RIVA 940 - select FB_DDC 941 - help 946 + bool "Enable DDC Support" 947 + depends on FB_RIVA 948 + select FB_DDC 949 + help 942 950 This enables I2C support for nVidia Chipsets. This is used 943 951 only for getting EDID information from the attached display 944 952 allowing for robust video mode handling and switching. ··· 983 991 select FB_CFB_IMAGEBLIT 984 992 select VGASTATE 985 993 help 986 - This driver supports the on-board graphics built in to the Intel 810 987 - and 815 chipsets. Say Y if you have and plan to use such a board. 994 + This driver supports the on-board graphics built in to the Intel 810 995 + and 815 chipsets. Say Y if you have and plan to use such a board. 988 996 989 - To compile this driver as a module, choose M here: the 997 + To compile this driver as a module, choose M here: the 990 998 module will be called i810fb. 991 999 992 - For more information, please read 1000 + For more information, please read 993 1001 <file:Documentation/fb/intel810.txt> 994 1002 995 1003 config FB_I810_GTF 996 1004 bool "use VESA Generalized Timing Formula" 997 1005 depends on FB_I810 998 1006 help 999 - If you say Y, then the VESA standard, Generalized Timing Formula 1000 - or GTF, will be used to calculate the required video timing values 1001 - per video mode. Since the GTF allows nondiscrete timings 1002 - (nondiscrete being a range of values as opposed to discrete being a 1003 - set of values), you'll be able to use any combination of horizontal 1007 + If you say Y, then the VESA standard, Generalized Timing Formula 1008 + or GTF, will be used to calculate the required video timing values 1009 + per video mode. Since the GTF allows nondiscrete timings 1010 + (nondiscrete being a range of values as opposed to discrete being a 1011 + set of values), you'll be able to use any combination of horizontal 1004 1012 and vertical resolutions, and vertical refresh rates without having 1005 1013 to specify your own timing parameters. This is especially useful 1006 - to maximize the performance of an aging display, or if you just 1007 - have a display with nonstandard dimensions. A VESA compliant 1014 + to maximize the performance of an aging display, or if you just 1015 + have a display with nonstandard dimensions. A VESA compliant 1008 1016 monitor is recommended, but can still work with non-compliant ones. 1009 - If you need or want this, then select this option. The timings may 1010 - not be compliant with Intel's recommended values. Use at your own 1017 + If you need or want this, then select this option. The timings may 1018 + not be compliant with Intel's recommended values. Use at your own 1011 1019 risk. 1012 1020 1013 - If you say N, the driver will revert to discrete video timings 1021 + If you say N, the driver will revert to discrete video timings 1014 1022 using a set recommended by Intel in their documentation. 1015 - 1016 - If unsure, say N. 1023 + 1024 + If unsure, say N. 1017 1025 1018 1026 config FB_I810_I2C 1019 1027 bool "Enable DDC Support" ··· 1052 1060 depends on !DRM_I915 1053 1061 help 1054 1062 This driver supports the on-board graphics built in to the Intel 1055 - 830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets. 1056 - Say Y if you have and plan to use such a board. 1063 + 830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets. 1064 + Say Y if you have and plan to use such a board. 1057 1065 1058 1066 To make FB_INTEL=Y work you need to say AGP_INTEL=y too. 1059 1067 ··· 1134 1142 G450/G550 secondary head and digital output are supported without 1135 1143 additional modules. 1136 1144 1137 - The driver starts in monitor mode. You must use the matroxset tool 1138 - (available at <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to 1139 - swap primary and secondary head outputs, or to change output mode. 1140 - Secondary head driver always start in 640x480 resolution and you 1145 + The driver starts in monitor mode. You must use the matroxset tool 1146 + (available at <ftp://platan.vc.cvut.cz/pub/linux/matrox-latest/>) to 1147 + swap primary and secondary head outputs, or to change output mode. 1148 + Secondary head driver always start in 640x480 resolution and you 1141 1149 must use fbset to change it. 1142 1150 1143 1151 Do not forget that second head supports only 16 and 32 bpp ··· 1220 1228 select FB_DDC 1221 1229 default y 1222 1230 help 1223 - Say Y here if you want DDC/I2C support for your Radeon board. 1231 + Say Y here if you want DDC/I2C support for your Radeon board. 1224 1232 1225 1233 config FB_RADEON_BACKLIGHT 1226 1234 bool "Support for backlight control" ··· 1349 1357 will be called savagefb. 1350 1358 1351 1359 config FB_SAVAGE_I2C 1352 - bool "Enable DDC2 Support" 1353 - depends on FB_SAVAGE 1354 - select FB_DDC 1355 - help 1360 + bool "Enable DDC2 Support" 1361 + depends on FB_SAVAGE 1362 + select FB_DDC 1363 + help 1356 1364 This enables I2C support for S3 Savage Chipsets. This is used 1357 1365 only for getting EDID information from the attached display 1358 1366 allowing for robust video mode handling and switching. ··· 1362 1370 here. 1363 1371 1364 1372 config FB_SAVAGE_ACCEL 1365 - bool "Enable Console Acceleration" 1366 - depends on FB_SAVAGE 1367 - help 1368 - This option will compile in console acceleration support. If 1369 - the resulting framebuffer console has bothersome glitches, then 1370 - choose N here. 1373 + bool "Enable Console Acceleration" 1374 + depends on FB_SAVAGE 1375 + help 1376 + This option will compile in console acceleration support. If 1377 + the resulting framebuffer console has bothersome glitches, then 1378 + choose N here. 1371 1379 1372 1380 config FB_SIS 1373 1381 tristate "SiS/XGI display support" ··· 1400 1408 as XGI V3XT, V5, V8 and Z7. 1401 1409 1402 1410 config FB_VIA 1403 - tristate "VIA UniChrome (Pro) and Chrome9 display support" 1404 - depends on FB && PCI && GPIOLIB && I2C && (X86 || COMPILE_TEST) 1405 - select FB_CFB_FILLRECT 1406 - select FB_CFB_COPYAREA 1407 - select FB_CFB_IMAGEBLIT 1408 - select I2C_ALGOBIT 1409 - help 1411 + tristate "VIA UniChrome (Pro) and Chrome9 display support" 1412 + depends on FB && PCI && GPIOLIB && I2C && (X86 || COMPILE_TEST) 1413 + select FB_CFB_FILLRECT 1414 + select FB_CFB_COPYAREA 1415 + select FB_CFB_IMAGEBLIT 1416 + select I2C_ALGOBIT 1417 + help 1410 1418 This is the frame buffer device driver for Graphics chips of VIA 1411 1419 UniChrome (Pro) Family (CLE266,PM800/CN400,P4M800CE/P4M800Pro/ 1412 1420 CN700/VN800,CX700/VX700,P4M890) and Chrome9 Family (K8M890,CN896 1413 - /P4M900,VX800) 1421 + /P4M900,VX800) 1414 1422 Say Y if you have a VIA UniChrome graphics board. 1415 1423 1416 1424 To compile this driver as a module, choose M here: the ··· 1447 1455 select VGASTATE 1448 1456 help 1449 1457 This driver supports notebooks with NeoMagic PCI chips. 1450 - Say Y if you have such a graphics card. 1458 + Say Y if you have such a graphics card. 1451 1459 1452 1460 To compile this driver as a module, choose M here: the 1453 1461 module will be called neofb. ··· 1502 1510 select FB_CFB_COPYAREA 1503 1511 select FB_CFB_IMAGEBLIT 1504 1512 ---help--- 1505 - Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or 1513 + Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or 1506 1514 Voodoo2 (cvg) based graphics card. 1507 1515 1508 1516 To compile this driver as a module, choose M here: the ··· 1671 1679 config FB_PMAG_AA 1672 1680 tristate "PMAG-AA TURBOchannel framebuffer support" 1673 1681 depends on FB && TC 1674 - select FB_CFB_FILLRECT 1675 - select FB_CFB_COPYAREA 1676 - select FB_CFB_IMAGEBLIT 1682 + select FB_CFB_FILLRECT 1683 + select FB_CFB_COPYAREA 1684 + select FB_CFB_IMAGEBLIT 1677 1685 help 1678 1686 Support for the PMAG-AA TURBOchannel framebuffer card (1280x1024x1) 1679 1687 used mainly in the MIPS-based DECstation series. ··· 1681 1689 config FB_PMAG_BA 1682 1690 tristate "PMAG-BA TURBOchannel framebuffer support" 1683 1691 depends on FB && TC 1684 - select FB_CFB_FILLRECT 1685 - select FB_CFB_COPYAREA 1686 - select FB_CFB_IMAGEBLIT 1692 + select FB_CFB_FILLRECT 1693 + select FB_CFB_COPYAREA 1694 + select FB_CFB_IMAGEBLIT 1687 1695 help 1688 1696 Support for the PMAG-BA TURBOchannel framebuffer card (1024x864x8) 1689 1697 used mainly in the MIPS-based DECstation series. ··· 1691 1699 config FB_PMAGB_B 1692 1700 tristate "PMAGB-B TURBOchannel framebuffer support" 1693 1701 depends on FB && TC 1694 - select FB_CFB_FILLRECT 1695 - select FB_CFB_COPYAREA 1696 - select FB_CFB_IMAGEBLIT 1702 + select FB_CFB_FILLRECT 1703 + select FB_CFB_COPYAREA 1704 + select FB_CFB_IMAGEBLIT 1697 1705 help 1698 1706 Support for the PMAGB-B TURBOchannel framebuffer card used mainly 1699 1707 in the MIPS-based DECstation series. The card is currently only ··· 1702 1710 config FB_MAXINE 1703 1711 bool "Maxine (Personal DECstation) onboard framebuffer support" 1704 1712 depends on (FB = y) && MACH_DECSTATION 1705 - select FB_CFB_FILLRECT 1706 - select FB_CFB_COPYAREA 1707 - select FB_CFB_IMAGEBLIT 1713 + select FB_CFB_FILLRECT 1714 + select FB_CFB_COPYAREA 1715 + select FB_CFB_IMAGEBLIT 1708 1716 help 1709 1717 Support for the onboard framebuffer (1024x768x8) in the Personal 1710 1718 DECstation series (Personal DECstation 5000/20, /25, /33, /50, ··· 1713 1721 config FB_G364 1714 1722 bool "G364 frame buffer support" 1715 1723 depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700) 1716 - select FB_CFB_FILLRECT 1717 - select FB_CFB_COPYAREA 1718 - select FB_CFB_IMAGEBLIT 1724 + select FB_CFB_FILLRECT 1725 + select FB_CFB_COPYAREA 1726 + select FB_CFB_IMAGEBLIT 1719 1727 help 1720 1728 The G364 driver is the framebuffer used in MIPS Magnum 4000 and 1721 1729 Olivetti M700-10 systems. ··· 1723 1731 config FB_68328 1724 1732 bool "Motorola 68328 native frame buffer support" 1725 1733 depends on (FB = y) && (M68328 || M68EZ328 || M68VZ328) 1726 - select FB_CFB_FILLRECT 1727 - select FB_CFB_COPYAREA 1728 - select FB_CFB_IMAGEBLIT 1734 + select FB_CFB_FILLRECT 1735 + select FB_CFB_COPYAREA 1736 + select FB_CFB_IMAGEBLIT 1729 1737 help 1730 1738 Say Y here if you want to support the built-in frame buffer of 1731 1739 the Motorola 68328 CPU family. ··· 1804 1812 Accelerator 1805 1813 1806 1814 config FB_MBX_DEBUG 1807 - bool "Enable debugging info via debugfs" 1808 - depends on FB_MBX && DEBUG_FS 1809 - ---help--- 1810 - Enable this if you want debugging information using the debug 1811 - filesystem (debugfs) 1815 + bool "Enable debugging info via debugfs" 1816 + depends on FB_MBX && DEBUG_FS 1817 + ---help--- 1818 + Enable this if you want debugging information using the debug 1819 + filesystem (debugfs) 1812 1820 1813 - If unsure, say N. 1821 + If unsure, say N. 1814 1822 1815 1823 config FB_FSL_DIU 1816 1824 tristate "Freescale DIU framebuffer support" ··· 1826 1834 config FB_W100 1827 1835 tristate "W100 frame buffer support" 1828 1836 depends on FB && ARCH_PXA 1829 - select FB_CFB_FILLRECT 1830 - select FB_CFB_COPYAREA 1831 - select FB_CFB_IMAGEBLIT 1837 + select FB_CFB_FILLRECT 1838 + select FB_CFB_COPYAREA 1839 + select FB_CFB_IMAGEBLIT 1832 1840 ---help--- 1833 1841 Frame buffer driver for the w100 as found on the Sharp SL-Cxx series. 1834 1842 It can also drive the w3220 chip found on iPAQ hx4700. ··· 1893 1901 Currently the support is only for the S3C6400 and S3C6410 SoCs. 1894 1902 1895 1903 config FB_S3C_DEBUG_REGWRITE 1896 - bool "Debug register writes" 1897 - depends on FB_S3C 1898 - ---help--- 1899 - Show all register writes via pr_debug() 1904 + bool "Debug register writes" 1905 + depends on FB_S3C 1906 + ---help--- 1907 + Show all register writes via pr_debug() 1900 1908 1901 1909 config FB_S3C2410 1902 1910 tristate "S3C2410 LCD framebuffer support" ··· 1922 1930 through sysfs 1923 1931 1924 1932 config FB_NUC900 1925 - tristate "NUC900 LCD framebuffer support" 1926 - depends on FB && ARCH_W90X900 1927 - select FB_CFB_FILLRECT 1928 - select FB_CFB_COPYAREA 1929 - select FB_CFB_IMAGEBLIT 1930 - ---help--- 1931 - Frame buffer driver for the built-in LCD controller in the Nuvoton 1932 - NUC900 processor 1933 + tristate "NUC900 LCD framebuffer support" 1934 + depends on FB && ARCH_W90X900 1935 + select FB_CFB_FILLRECT 1936 + select FB_CFB_COPYAREA 1937 + select FB_CFB_IMAGEBLIT 1938 + ---help--- 1939 + Frame buffer driver for the built-in LCD controller in the Nuvoton 1940 + NUC900 processor 1933 1941 1934 1942 config GPM1040A0_320X240 1935 - bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD" 1936 - depends on FB_NUC900 1943 + bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD" 1944 + depends on FB_NUC900 1937 1945 1938 1946 config FB_SM501 1939 1947 tristate "Silicon Motion SM501 framebuffer support" ··· 2175 2183 2176 2184 config FB_PRE_INIT_FB 2177 2185 bool "Don't reinitialize, use bootloader's GDC/Display configuration" 2178 - depends on FB && FB_MB862XX_LIME 2186 + depends on FB && (FB_MB862XX_LIME || FB_MXS) 2179 2187 ---help--- 2180 2188 Select this option if display contents should be inherited as set by 2181 2189 the bootloader.
-2
drivers/video/fbdev/Makefile
··· 76 76 obj-$(CONFIG_FB_PVR2) += pvr2fb.o 77 77 obj-$(CONFIG_FB_VOODOO1) += sstfb.o 78 78 obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o 79 - obj-$(CONFIG_ARCH_NOMADIK) += amba-clcd-nomadik.o 80 - obj-$(CONFIG_PLAT_VERSATILE_CLCD) += amba-clcd-versatile.o 81 79 obj-$(CONFIG_FB_GOLDFISH) += goldfishfb.o 82 80 obj-$(CONFIG_FB_68328) += 68328fb.o 83 81 obj-$(CONFIG_FB_GBE) += gbefb.o
-251
drivers/video/fbdev/amba-clcd-nomadik.c
··· 1 - #include <linux/amba/bus.h> 2 - #include <linux/amba/clcd.h> 3 - #include <linux/gpio/consumer.h> 4 - #include <linux/of.h> 5 - #include <linux/of_graph.h> 6 - #include <linux/delay.h> 7 - #include <linux/bitops.h> 8 - #include <linux/mfd/syscon.h> 9 - #include <linux/regmap.h> 10 - 11 - #include "amba-clcd-nomadik.h" 12 - 13 - static struct gpio_desc *grestb; 14 - static struct gpio_desc *scen; 15 - static struct gpio_desc *scl; 16 - static struct gpio_desc *sda; 17 - 18 - static u8 tpg110_readwrite_reg(bool write, u8 address, u8 outval) 19 - { 20 - int i; 21 - u8 inval = 0; 22 - 23 - /* Assert SCEN */ 24 - gpiod_set_value_cansleep(scen, 1); 25 - ndelay(150); 26 - /* Hammer out the address */ 27 - for (i = 5; i >= 0; i--) { 28 - if (address & BIT(i)) 29 - gpiod_set_value_cansleep(sda, 1); 30 - else 31 - gpiod_set_value_cansleep(sda, 0); 32 - ndelay(150); 33 - /* Send an SCL pulse */ 34 - gpiod_set_value_cansleep(scl, 1); 35 - ndelay(160); 36 - gpiod_set_value_cansleep(scl, 0); 37 - ndelay(160); 38 - } 39 - 40 - if (write) { 41 - /* WRITE */ 42 - gpiod_set_value_cansleep(sda, 0); 43 - } else { 44 - /* READ */ 45 - gpiod_set_value_cansleep(sda, 1); 46 - } 47 - ndelay(150); 48 - /* Send an SCL pulse */ 49 - gpiod_set_value_cansleep(scl, 1); 50 - ndelay(160); 51 - gpiod_set_value_cansleep(scl, 0); 52 - ndelay(160); 53 - 54 - if (!write) 55 - /* HiZ turn-around cycle */ 56 - gpiod_direction_input(sda); 57 - ndelay(150); 58 - /* Send an SCL pulse */ 59 - gpiod_set_value_cansleep(scl, 1); 60 - ndelay(160); 61 - gpiod_set_value_cansleep(scl, 0); 62 - ndelay(160); 63 - 64 - /* Hammer in/out the data */ 65 - for (i = 7; i >= 0; i--) { 66 - int value; 67 - 68 - if (write) { 69 - value = !!(outval & BIT(i)); 70 - gpiod_set_value_cansleep(sda, value); 71 - } else { 72 - value = gpiod_get_value(sda); 73 - if (value) 74 - inval |= BIT(i); 75 - } 76 - ndelay(150); 77 - /* Send an SCL pulse */ 78 - gpiod_set_value_cansleep(scl, 1); 79 - ndelay(160); 80 - gpiod_set_value_cansleep(scl, 0); 81 - ndelay(160); 82 - } 83 - 84 - gpiod_direction_output(sda, 0); 85 - /* Deassert SCEN */ 86 - gpiod_set_value_cansleep(scen, 0); 87 - /* Satisfies SCEN pulse width */ 88 - udelay(1); 89 - 90 - return inval; 91 - } 92 - 93 - static u8 tpg110_read_reg(u8 address) 94 - { 95 - return tpg110_readwrite_reg(false, address, 0); 96 - } 97 - 98 - static void tpg110_write_reg(u8 address, u8 outval) 99 - { 100 - tpg110_readwrite_reg(true, address, outval); 101 - } 102 - 103 - static void tpg110_startup(struct device *dev) 104 - { 105 - u8 val; 106 - 107 - dev_info(dev, "TPG110 display enable\n"); 108 - /* De-assert the reset signal */ 109 - gpiod_set_value_cansleep(grestb, 0); 110 - mdelay(1); 111 - dev_info(dev, "de-asserted GRESTB\n"); 112 - 113 - /* Test display communication */ 114 - tpg110_write_reg(0x00, 0x55); 115 - val = tpg110_read_reg(0x00); 116 - if (val == 0x55) 117 - dev_info(dev, "passed communication test\n"); 118 - val = tpg110_read_reg(0x01); 119 - dev_info(dev, "TPG110 chip ID: %d version: %d\n", 120 - val>>4, val&0x0f); 121 - 122 - /* Show display resolution */ 123 - val = tpg110_read_reg(0x02); 124 - val &= 7; 125 - switch (val) { 126 - case 0x0: 127 - dev_info(dev, "IN 400x240 RGB -> OUT 800x480 RGB (dual scan)"); 128 - break; 129 - case 0x1: 130 - dev_info(dev, "IN 480x272 RGB -> OUT 800x480 RGB (dual scan)"); 131 - break; 132 - case 0x4: 133 - dev_info(dev, "480x640 RGB"); 134 - break; 135 - case 0x5: 136 - dev_info(dev, "480x272 RGB"); 137 - break; 138 - case 0x6: 139 - dev_info(dev, "640x480 RGB"); 140 - break; 141 - case 0x7: 142 - dev_info(dev, "800x480 RGB"); 143 - break; 144 - default: 145 - dev_info(dev, "ILLEGAL RESOLUTION"); 146 - break; 147 - } 148 - 149 - val = tpg110_read_reg(0x03); 150 - dev_info(dev, "resolution is controlled by %s\n", 151 - (val & BIT(7)) ? "software" : "hardware"); 152 - } 153 - 154 - static void tpg110_enable(struct clcd_fb *fb) 155 - { 156 - struct device *dev = &fb->dev->dev; 157 - static bool startup; 158 - u8 val; 159 - 160 - if (!startup) { 161 - tpg110_startup(dev); 162 - startup = true; 163 - } 164 - 165 - /* Take chip out of standby */ 166 - val = tpg110_read_reg(0x03); 167 - val |= BIT(0); 168 - tpg110_write_reg(0x03, val); 169 - } 170 - 171 - static void tpg110_disable(struct clcd_fb *fb) 172 - { 173 - u8 val; 174 - 175 - dev_info(&fb->dev->dev, "TPG110 display disable\n"); 176 - val = tpg110_read_reg(0x03); 177 - /* Put into standby */ 178 - val &= ~BIT(0); 179 - tpg110_write_reg(0x03, val); 180 - } 181 - 182 - static void tpg110_init(struct device *dev, struct device_node *np, 183 - struct clcd_board *board) 184 - { 185 - dev_info(dev, "TPG110 display init\n"); 186 - 187 - /* This asserts the GRESTB signal, putting the display into reset */ 188 - grestb = devm_fwnode_get_gpiod_from_child(dev, "grestb", &np->fwnode, 189 - GPIOD_OUT_HIGH, "grestb"); 190 - if (IS_ERR(grestb)) { 191 - dev_err(dev, "no GRESTB GPIO\n"); 192 - return; 193 - } 194 - scen = devm_fwnode_get_gpiod_from_child(dev, "scen", &np->fwnode, 195 - GPIOD_OUT_LOW, "scen"); 196 - if (IS_ERR(scen)) { 197 - dev_err(dev, "no SCEN GPIO\n"); 198 - return; 199 - } 200 - scl = devm_fwnode_get_gpiod_from_child(dev, "scl", &np->fwnode, 201 - GPIOD_OUT_LOW, "scl"); 202 - if (IS_ERR(scl)) { 203 - dev_err(dev, "no SCL GPIO\n"); 204 - return; 205 - } 206 - sda = devm_fwnode_get_gpiod_from_child(dev, "sda", &np->fwnode, 207 - GPIOD_OUT_LOW, "sda"); 208 - if (IS_ERR(sda)) { 209 - dev_err(dev, "no SDA GPIO\n"); 210 - return; 211 - } 212 - board->enable = tpg110_enable; 213 - board->disable = tpg110_disable; 214 - } 215 - 216 - int nomadik_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel) 217 - { 218 - if (of_device_is_compatible(panel, "tpo,tpg110")) 219 - tpg110_init(&fb->dev->dev, panel, fb->board); 220 - else 221 - dev_info(&fb->dev->dev, "unknown panel\n"); 222 - 223 - /* Unknown panel, fall through */ 224 - return 0; 225 - } 226 - EXPORT_SYMBOL_GPL(nomadik_clcd_init_panel); 227 - 228 - #define PMU_CTRL_OFFSET 0x0000 229 - #define PMU_CTRL_LCDNDIF BIT(26) 230 - 231 - int nomadik_clcd_init_board(struct amba_device *adev, 232 - struct clcd_board *board) 233 - { 234 - struct regmap *pmu_regmap; 235 - 236 - dev_info(&adev->dev, "Nomadik CLCD board init\n"); 237 - pmu_regmap = 238 - syscon_regmap_lookup_by_compatible("stericsson,nomadik-pmu"); 239 - if (IS_ERR(pmu_regmap)) { 240 - dev_err(&adev->dev, "could not find PMU syscon regmap\n"); 241 - return PTR_ERR(pmu_regmap); 242 - } 243 - regmap_update_bits(pmu_regmap, 244 - PMU_CTRL_OFFSET, 245 - PMU_CTRL_LCDNDIF, 246 - 0); 247 - dev_info(&adev->dev, "set PMU mux to CLCD mode\n"); 248 - 249 - return 0; 250 - } 251 - EXPORT_SYMBOL_GPL(nomadik_clcd_init_board);
-24
drivers/video/fbdev/amba-clcd-nomadik.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef _AMBA_CLCD_NOMADIK_H 3 - #define _AMBA_CLCD_NOMADIK_H 4 - 5 - #include <linux/amba/bus.h> 6 - 7 - #ifdef CONFIG_ARCH_NOMADIK 8 - int nomadik_clcd_init_board(struct amba_device *adev, 9 - struct clcd_board *board); 10 - int nomadik_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel); 11 - #else 12 - static inline int nomadik_clcd_init_board(struct amba_device *adev, 13 - struct clcd_board *board) 14 - { 15 - return 0; 16 - } 17 - static inline int nomadik_clcd_init_panel(struct clcd_fb *fb, 18 - struct device_node *panel) 19 - { 20 - return 0; 21 - } 22 - #endif 23 - 24 - #endif /* inclusion guard */
-567
drivers/video/fbdev/amba-clcd-versatile.c
··· 1 - #include <linux/device.h> 2 - #include <linux/dma-mapping.h> 3 - #include <linux/amba/bus.h> 4 - #include <linux/amba/clcd.h> 5 - #include <linux/platform_data/video-clcd-versatile.h> 6 - #include <linux/of.h> 7 - #include <linux/of_graph.h> 8 - #include <linux/regmap.h> 9 - #include <linux/mfd/syscon.h> 10 - #include <linux/bitops.h> 11 - #include "amba-clcd-versatile.h" 12 - 13 - static struct clcd_panel vga = { 14 - .mode = { 15 - .name = "VGA", 16 - .refresh = 60, 17 - .xres = 640, 18 - .yres = 480, 19 - .pixclock = 39721, 20 - .left_margin = 40, 21 - .right_margin = 24, 22 - .upper_margin = 32, 23 - .lower_margin = 11, 24 - .hsync_len = 96, 25 - .vsync_len = 2, 26 - .sync = 0, 27 - .vmode = FB_VMODE_NONINTERLACED, 28 - }, 29 - .width = -1, 30 - .height = -1, 31 - .tim2 = TIM2_BCD | TIM2_IPC, 32 - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), 33 - .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, 34 - .bpp = 16, 35 - }; 36 - 37 - static struct clcd_panel xvga = { 38 - .mode = { 39 - .name = "XVGA", 40 - .refresh = 60, 41 - .xres = 1024, 42 - .yres = 768, 43 - .pixclock = 15748, 44 - .left_margin = 152, 45 - .right_margin = 48, 46 - .upper_margin = 23, 47 - .lower_margin = 3, 48 - .hsync_len = 104, 49 - .vsync_len = 4, 50 - .sync = 0, 51 - .vmode = FB_VMODE_NONINTERLACED, 52 - }, 53 - .width = -1, 54 - .height = -1, 55 - .tim2 = TIM2_BCD | TIM2_IPC, 56 - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), 57 - .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, 58 - .bpp = 16, 59 - }; 60 - 61 - /* Sanyo TM38QV67A02A - 3.8 inch QVGA (320x240) Color TFT */ 62 - static struct clcd_panel sanyo_tm38qv67a02a = { 63 - .mode = { 64 - .name = "Sanyo TM38QV67A02A", 65 - .refresh = 116, 66 - .xres = 320, 67 - .yres = 240, 68 - .pixclock = 100000, 69 - .left_margin = 6, 70 - .right_margin = 6, 71 - .upper_margin = 5, 72 - .lower_margin = 5, 73 - .hsync_len = 6, 74 - .vsync_len = 6, 75 - .sync = 0, 76 - .vmode = FB_VMODE_NONINTERLACED, 77 - }, 78 - .width = -1, 79 - .height = -1, 80 - .tim2 = TIM2_BCD, 81 - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), 82 - .caps = CLCD_CAP_5551, 83 - .bpp = 16, 84 - }; 85 - 86 - static struct clcd_panel sanyo_2_5_in = { 87 - .mode = { 88 - .name = "Sanyo QVGA Portrait", 89 - .refresh = 116, 90 - .xres = 240, 91 - .yres = 320, 92 - .pixclock = 100000, 93 - .left_margin = 20, 94 - .right_margin = 10, 95 - .upper_margin = 2, 96 - .lower_margin = 2, 97 - .hsync_len = 10, 98 - .vsync_len = 2, 99 - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 100 - .vmode = FB_VMODE_NONINTERLACED, 101 - }, 102 - .width = -1, 103 - .height = -1, 104 - .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, 105 - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), 106 - .caps = CLCD_CAP_5551, 107 - .bpp = 16, 108 - }; 109 - 110 - /* Epson L2F50113T00 - 2.2 inch 176x220 Color TFT */ 111 - static struct clcd_panel epson_l2f50113t00 = { 112 - .mode = { 113 - .name = "Epson L2F50113T00", 114 - .refresh = 390, 115 - .xres = 176, 116 - .yres = 220, 117 - .pixclock = 62500, 118 - .left_margin = 3, 119 - .right_margin = 2, 120 - .upper_margin = 1, 121 - .lower_margin = 0, 122 - .hsync_len = 3, 123 - .vsync_len = 2, 124 - .sync = 0, 125 - .vmode = FB_VMODE_NONINTERLACED, 126 - }, 127 - .width = -1, 128 - .height = -1, 129 - .tim2 = TIM2_BCD | TIM2_IPC, 130 - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), 131 - .caps = CLCD_CAP_5551, 132 - .bpp = 16, 133 - }; 134 - 135 - static struct clcd_panel *panels[] = { 136 - &vga, 137 - &xvga, 138 - &sanyo_tm38qv67a02a, 139 - &sanyo_2_5_in, 140 - &epson_l2f50113t00, 141 - }; 142 - 143 - struct clcd_panel *versatile_clcd_get_panel(const char *name) 144 - { 145 - int i; 146 - 147 - for (i = 0; i < ARRAY_SIZE(panels); i++) 148 - if (strcmp(panels[i]->mode.name, name) == 0) 149 - break; 150 - 151 - if (i < ARRAY_SIZE(panels)) 152 - return panels[i]; 153 - 154 - pr_err("CLCD: couldn't get parameters for panel %s\n", name); 155 - 156 - return NULL; 157 - } 158 - 159 - int versatile_clcd_setup_dma(struct clcd_fb *fb, unsigned long framesize) 160 - { 161 - dma_addr_t dma; 162 - 163 - fb->fb.screen_base = dma_alloc_wc(&fb->dev->dev, framesize, &dma, 164 - GFP_KERNEL); 165 - if (!fb->fb.screen_base) { 166 - pr_err("CLCD: unable to map framebuffer\n"); 167 - return -ENOMEM; 168 - } 169 - 170 - fb->fb.fix.smem_start = dma; 171 - fb->fb.fix.smem_len = framesize; 172 - 173 - return 0; 174 - } 175 - 176 - int versatile_clcd_mmap_dma(struct clcd_fb *fb, struct vm_area_struct *vma) 177 - { 178 - return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base, 179 - fb->fb.fix.smem_start, fb->fb.fix.smem_len); 180 - } 181 - 182 - void versatile_clcd_remove_dma(struct clcd_fb *fb) 183 - { 184 - dma_free_wc(&fb->dev->dev, fb->fb.fix.smem_len, fb->fb.screen_base, 185 - fb->fb.fix.smem_start); 186 - } 187 - 188 - #ifdef CONFIG_OF 189 - 190 - static struct regmap *versatile_syscon_map; 191 - static struct regmap *versatile_ib2_map; 192 - 193 - /* 194 - * We detect the different syscon types from the compatible strings. 195 - */ 196 - enum versatile_clcd { 197 - INTEGRATOR_CLCD_CM, 198 - VERSATILE_CLCD, 199 - REALVIEW_CLCD_EB, 200 - REALVIEW_CLCD_PB1176, 201 - REALVIEW_CLCD_PB11MP, 202 - REALVIEW_CLCD_PBA8, 203 - REALVIEW_CLCD_PBX, 204 - }; 205 - 206 - static const struct of_device_id versatile_clcd_of_match[] = { 207 - { 208 - .compatible = "arm,core-module-integrator", 209 - .data = (void *)INTEGRATOR_CLCD_CM, 210 - }, 211 - { 212 - .compatible = "arm,versatile-sysreg", 213 - .data = (void *)VERSATILE_CLCD, 214 - }, 215 - { 216 - .compatible = "arm,realview-eb-syscon", 217 - .data = (void *)REALVIEW_CLCD_EB, 218 - }, 219 - { 220 - .compatible = "arm,realview-pb1176-syscon", 221 - .data = (void *)REALVIEW_CLCD_PB1176, 222 - }, 223 - { 224 - .compatible = "arm,realview-pb11mp-syscon", 225 - .data = (void *)REALVIEW_CLCD_PB11MP, 226 - }, 227 - { 228 - .compatible = "arm,realview-pba8-syscon", 229 - .data = (void *)REALVIEW_CLCD_PBA8, 230 - }, 231 - { 232 - .compatible = "arm,realview-pbx-syscon", 233 - .data = (void *)REALVIEW_CLCD_PBX, 234 - }, 235 - {}, 236 - }; 237 - 238 - /* 239 - * Core module CLCD control on the Integrator/CP, bits 240 - * 8 thru 19 of the CM_CONTROL register controls a bunch 241 - * of CLCD settings. 242 - */ 243 - #define INTEGRATOR_HDR_CTRL_OFFSET 0x0C 244 - #define INTEGRATOR_CLCD_LCDBIASEN BIT(8) 245 - #define INTEGRATOR_CLCD_LCDBIASUP BIT(9) 246 - #define INTEGRATOR_CLCD_LCDBIASDN BIT(10) 247 - /* Bits 11,12,13 controls the LCD type */ 248 - #define INTEGRATOR_CLCD_LCDMUX_MASK (BIT(11)|BIT(12)|BIT(13)) 249 - #define INTEGRATOR_CLCD_LCDMUX_LCD24 BIT(11) 250 - #define INTEGRATOR_CLCD_LCDMUX_VGA565 BIT(12) 251 - #define INTEGRATOR_CLCD_LCDMUX_SHARP (BIT(11)|BIT(12)) 252 - #define INTEGRATOR_CLCD_LCDMUX_VGA555 BIT(13) 253 - #define INTEGRATOR_CLCD_LCDMUX_VGA24 (BIT(11)|BIT(12)|BIT(13)) 254 - #define INTEGRATOR_CLCD_LCD0_EN BIT(14) 255 - #define INTEGRATOR_CLCD_LCD1_EN BIT(15) 256 - /* R/L flip on Sharp */ 257 - #define INTEGRATOR_CLCD_LCD_STATIC1 BIT(16) 258 - /* U/D flip on Sharp */ 259 - #define INTEGRATOR_CLCD_LCD_STATIC2 BIT(17) 260 - /* No connection on Sharp */ 261 - #define INTEGRATOR_CLCD_LCD_STATIC BIT(18) 262 - /* 0 = 24bit VGA, 1 = 18bit VGA */ 263 - #define INTEGRATOR_CLCD_LCD_N24BITEN BIT(19) 264 - 265 - #define INTEGRATOR_CLCD_MASK (INTEGRATOR_CLCD_LCDBIASEN | \ 266 - INTEGRATOR_CLCD_LCDBIASUP | \ 267 - INTEGRATOR_CLCD_LCDBIASDN | \ 268 - INTEGRATOR_CLCD_LCDMUX_MASK | \ 269 - INTEGRATOR_CLCD_LCD0_EN | \ 270 - INTEGRATOR_CLCD_LCD1_EN | \ 271 - INTEGRATOR_CLCD_LCD_STATIC1 | \ 272 - INTEGRATOR_CLCD_LCD_STATIC2 | \ 273 - INTEGRATOR_CLCD_LCD_STATIC | \ 274 - INTEGRATOR_CLCD_LCD_N24BITEN) 275 - 276 - static void integrator_clcd_enable(struct clcd_fb *fb) 277 - { 278 - struct fb_var_screeninfo *var = &fb->fb.var; 279 - u32 val; 280 - 281 - dev_info(&fb->dev->dev, "enable Integrator CLCD connectors\n"); 282 - 283 - /* FIXME: really needed? */ 284 - val = INTEGRATOR_CLCD_LCD_STATIC1 | INTEGRATOR_CLCD_LCD_STATIC2 | 285 - INTEGRATOR_CLCD_LCD0_EN | INTEGRATOR_CLCD_LCD1_EN; 286 - if (var->bits_per_pixel <= 8 || 287 - (var->bits_per_pixel == 16 && var->green.length == 5)) 288 - /* Pseudocolor, RGB555, BGR555 */ 289 - val |= INTEGRATOR_CLCD_LCDMUX_VGA555; 290 - else if (fb->fb.var.bits_per_pixel <= 16) 291 - /* truecolor RGB565 */ 292 - val |= INTEGRATOR_CLCD_LCDMUX_VGA565; 293 - else 294 - val = 0; /* no idea for this, don't trust the docs */ 295 - 296 - regmap_update_bits(versatile_syscon_map, 297 - INTEGRATOR_HDR_CTRL_OFFSET, 298 - INTEGRATOR_CLCD_MASK, 299 - val); 300 - } 301 - 302 - /* 303 - * This configuration register in the Versatile and RealView 304 - * family is uniformly present but appears more and more 305 - * unutilized starting with the RealView series. 306 - */ 307 - #define SYS_CLCD 0x50 308 - #define SYS_CLCD_MODE_MASK (BIT(0)|BIT(1)) 309 - #define SYS_CLCD_MODE_888 0 310 - #define SYS_CLCD_MODE_5551 BIT(0) 311 - #define SYS_CLCD_MODE_565_R_LSB BIT(1) 312 - #define SYS_CLCD_MODE_565_B_LSB (BIT(0)|BIT(1)) 313 - #define SYS_CLCD_CONNECTOR_MASK (BIT(2)|BIT(3)|BIT(4)|BIT(5)) 314 - #define SYS_CLCD_NLCDIOON BIT(2) 315 - #define SYS_CLCD_VDDPOSSWITCH BIT(3) 316 - #define SYS_CLCD_PWR3V5SWITCH BIT(4) 317 - #define SYS_CLCD_VDDNEGSWITCH BIT(5) 318 - #define SYS_CLCD_TSNSS BIT(6) /* touchscreen enable */ 319 - #define SYS_CLCD_SSPEXP BIT(7) /* SSP expansion enable */ 320 - 321 - /* The Versatile can detect the connected panel type */ 322 - #define SYS_CLCD_CLCDID_MASK (BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)) 323 - #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) 324 - #define SYS_CLCD_ID_SHARP_8_4 (0x01 << 8) 325 - #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) 326 - #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) 327 - #define SYS_CLCD_ID_VGA (0x1f << 8) 328 - 329 - #define SYS_CLCD_TSNDAV BIT(13) /* data ready from TS */ 330 - 331 - /* IB2 control register for the Versatile daughterboard */ 332 - #define IB2_CTRL 0x00 333 - #define IB2_CTRL_LCD_SD BIT(1) /* 1 = shut down LCD */ 334 - #define IB2_CTRL_LCD_BL_ON BIT(0) 335 - #define IB2_CTRL_LCD_MASK (BIT(0)|BIT(1)) 336 - 337 - static void versatile_clcd_disable(struct clcd_fb *fb) 338 - { 339 - dev_info(&fb->dev->dev, "disable Versatile CLCD connectors\n"); 340 - regmap_update_bits(versatile_syscon_map, 341 - SYS_CLCD, 342 - SYS_CLCD_CONNECTOR_MASK, 343 - 0); 344 - 345 - /* If we're on an IB2 daughterboard, turn off display */ 346 - if (versatile_ib2_map) { 347 - dev_info(&fb->dev->dev, "disable IB2 display\n"); 348 - regmap_update_bits(versatile_ib2_map, 349 - IB2_CTRL, 350 - IB2_CTRL_LCD_MASK, 351 - IB2_CTRL_LCD_SD); 352 - } 353 - } 354 - 355 - static void versatile_clcd_enable(struct clcd_fb *fb) 356 - { 357 - struct fb_var_screeninfo *var = &fb->fb.var; 358 - u32 val = 0; 359 - 360 - dev_info(&fb->dev->dev, "enable Versatile CLCD connectors\n"); 361 - switch (var->green.length) { 362 - case 5: 363 - val |= SYS_CLCD_MODE_5551; 364 - break; 365 - case 6: 366 - if (var->red.offset == 0) 367 - val |= SYS_CLCD_MODE_565_R_LSB; 368 - else 369 - val |= SYS_CLCD_MODE_565_B_LSB; 370 - break; 371 - case 8: 372 - val |= SYS_CLCD_MODE_888; 373 - break; 374 - } 375 - 376 - /* Set up the MUX */ 377 - regmap_update_bits(versatile_syscon_map, 378 - SYS_CLCD, 379 - SYS_CLCD_MODE_MASK, 380 - val); 381 - 382 - /* Then enable the display */ 383 - regmap_update_bits(versatile_syscon_map, 384 - SYS_CLCD, 385 - SYS_CLCD_CONNECTOR_MASK, 386 - SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH); 387 - 388 - /* If we're on an IB2 daughterboard, turn on display */ 389 - if (versatile_ib2_map) { 390 - dev_info(&fb->dev->dev, "enable IB2 display\n"); 391 - regmap_update_bits(versatile_ib2_map, 392 - IB2_CTRL, 393 - IB2_CTRL_LCD_MASK, 394 - IB2_CTRL_LCD_BL_ON); 395 - } 396 - } 397 - 398 - static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs) 399 - { 400 - clcdfb_decode(fb, regs); 401 - 402 - /* Always clear BGR for RGB565: we do the routing externally */ 403 - if (fb->fb.var.green.length == 6) 404 - regs->cntl &= ~CNTL_BGR; 405 - } 406 - 407 - static void realview_clcd_disable(struct clcd_fb *fb) 408 - { 409 - dev_info(&fb->dev->dev, "disable RealView CLCD connectors\n"); 410 - regmap_update_bits(versatile_syscon_map, 411 - SYS_CLCD, 412 - SYS_CLCD_CONNECTOR_MASK, 413 - 0); 414 - } 415 - 416 - static void realview_clcd_enable(struct clcd_fb *fb) 417 - { 418 - dev_info(&fb->dev->dev, "enable RealView CLCD connectors\n"); 419 - regmap_update_bits(versatile_syscon_map, 420 - SYS_CLCD, 421 - SYS_CLCD_CONNECTOR_MASK, 422 - SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH); 423 - } 424 - 425 - struct versatile_panel { 426 - u32 id; 427 - char *compatible; 428 - bool ib2; 429 - }; 430 - 431 - static const struct versatile_panel versatile_panels[] = { 432 - { 433 - .id = SYS_CLCD_ID_VGA, 434 - .compatible = "VGA", 435 - }, 436 - { 437 - .id = SYS_CLCD_ID_SANYO_3_8, 438 - .compatible = "sanyo,tm38qv67a02a", 439 - }, 440 - { 441 - .id = SYS_CLCD_ID_SHARP_8_4, 442 - .compatible = "sharp,lq084v1dg21", 443 - }, 444 - { 445 - .id = SYS_CLCD_ID_EPSON_2_2, 446 - .compatible = "epson,l2f50113t00", 447 - }, 448 - { 449 - .id = SYS_CLCD_ID_SANYO_2_5, 450 - .compatible = "sanyo,alr252rgt", 451 - .ib2 = true, 452 - }, 453 - }; 454 - 455 - static void versatile_panel_probe(struct device *dev, struct device_node *panel) 456 - { 457 - struct versatile_panel const *vpanel = NULL; 458 - u32 val; 459 - int ret; 460 - int i; 461 - 462 - /* 463 - * The Versatile CLCD has a panel auto-detection mechanism. 464 - * We use this and look for the compatible panel in the 465 - * device tree. 466 - */ 467 - ret = regmap_read(versatile_syscon_map, SYS_CLCD, &val); 468 - if (ret) { 469 - dev_err(dev, "cannot read CLCD syscon register\n"); 470 - return; 471 - } 472 - val &= SYS_CLCD_CLCDID_MASK; 473 - 474 - /* First find corresponding panel information */ 475 - for (i = 0; i < ARRAY_SIZE(versatile_panels); i++) { 476 - vpanel = &versatile_panels[i]; 477 - 478 - if (val == vpanel->id) { 479 - dev_err(dev, "autodetected panel \"%s\"\n", 480 - vpanel->compatible); 481 - break; 482 - } 483 - } 484 - if (i == ARRAY_SIZE(versatile_panels)) { 485 - dev_err(dev, "could not auto-detect panel\n"); 486 - return; 487 - } 488 - 489 - if (!of_device_is_compatible(panel, vpanel->compatible)) 490 - dev_err(dev, "panel in DT is not compatible with the " 491 - "auto-detected panel, continuing anyway\n"); 492 - 493 - /* 494 - * If we have a Sanyo 2.5" port 495 - * that we're running on an IB2 and proceed to look for the 496 - * IB2 syscon regmap. 497 - */ 498 - if (!vpanel->ib2) 499 - return; 500 - 501 - versatile_ib2_map = syscon_regmap_lookup_by_compatible( 502 - "arm,versatile-ib2-syscon"); 503 - if (IS_ERR(versatile_ib2_map)) { 504 - dev_err(dev, "could not locate IB2 control register\n"); 505 - versatile_ib2_map = NULL; 506 - return; 507 - } 508 - } 509 - 510 - int versatile_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel) 511 - { 512 - const struct of_device_id *clcd_id; 513 - enum versatile_clcd versatile_clcd_type; 514 - struct device_node *np; 515 - struct regmap *map; 516 - struct device *dev = &fb->dev->dev; 517 - 518 - np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match, 519 - &clcd_id); 520 - if (!np) { 521 - /* Vexpress does not have this */ 522 - return 0; 523 - } 524 - versatile_clcd_type = (enum versatile_clcd)clcd_id->data; 525 - 526 - map = syscon_node_to_regmap(np); 527 - if (IS_ERR(map)) { 528 - dev_err(dev, "no Versatile syscon regmap\n"); 529 - return PTR_ERR(map); 530 - } 531 - 532 - switch (versatile_clcd_type) { 533 - case INTEGRATOR_CLCD_CM: 534 - versatile_syscon_map = map; 535 - fb->board->enable = integrator_clcd_enable; 536 - /* Override the caps, we have only these */ 537 - fb->board->caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | 538 - CLCD_CAP_888; 539 - dev_info(dev, "set up callbacks for Integrator PL110\n"); 540 - break; 541 - case VERSATILE_CLCD: 542 - versatile_syscon_map = map; 543 - fb->board->enable = versatile_clcd_enable; 544 - fb->board->disable = versatile_clcd_disable; 545 - fb->board->decode = versatile_clcd_decode; 546 - versatile_panel_probe(dev, panel); 547 - dev_info(dev, "set up callbacks for Versatile\n"); 548 - break; 549 - case REALVIEW_CLCD_EB: 550 - case REALVIEW_CLCD_PB1176: 551 - case REALVIEW_CLCD_PB11MP: 552 - case REALVIEW_CLCD_PBA8: 553 - case REALVIEW_CLCD_PBX: 554 - versatile_syscon_map = map; 555 - fb->board->enable = realview_clcd_enable; 556 - fb->board->disable = realview_clcd_disable; 557 - dev_info(dev, "set up callbacks for RealView PL111\n"); 558 - break; 559 - default: 560 - dev_info(dev, "unknown Versatile system controller\n"); 561 - break; 562 - } 563 - 564 - return 0; 565 - } 566 - EXPORT_SYMBOL_GPL(versatile_clcd_init_panel); 567 - #endif
-17
drivers/video/fbdev/amba-clcd-versatile.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * Special local versatile callbacks 4 - */ 5 - #include <linux/of.h> 6 - #include <linux/amba/bus.h> 7 - #include <linux/platform_data/video-clcd-versatile.h> 8 - 9 - #if defined(CONFIG_PLAT_VERSATILE_CLCD) && defined(CONFIG_OF) 10 - int versatile_clcd_init_panel(struct clcd_fb *fb, struct device_node *panel); 11 - #else 12 - static inline int versatile_clcd_init_panel(struct clcd_fb *fb, 13 - struct device_node *panel) 14 - { 15 - return 0; 16 - } 17 - #endif
+2 -96
drivers/video/fbdev/amba-clcd.c
··· 30 30 #include <video/of_display_timing.h> 31 31 #include <video/videomode.h> 32 32 33 - #include "amba-clcd-nomadik.h" 34 - #include "amba-clcd-versatile.h" 35 - 36 33 #define to_clcd(info) container_of(info, struct clcd_fb, fb) 37 34 38 35 /* This is limited to 16 characters when displayed by X startup */ ··· 220 223 var->blue.length = 4; 221 224 } 222 225 break; 223 - case 24: 224 - if (fb->vendor->packed_24_bit_pixels) { 225 - var->red.length = 8; 226 - var->green.length = 8; 227 - var->blue.length = 8; 228 - } else { 229 - ret = -EINVAL; 230 - } 231 - break; 232 226 case 32: 233 227 /* If we can't do 888, reject */ 234 228 caps &= CLCD_CAP_888; ··· 305 317 fb->board->decode(fb, &regs); 306 318 307 319 clcdfb_disable(fb); 308 - 309 - /* Some variants must be clocked here */ 310 - if (fb->vendor->clock_timregs && !fb->clk_enabled) { 311 - fb->clk_enabled = true; 312 - clk_enable(fb->clk); 313 - } 314 320 315 321 writel(regs.tim0, fb->regs + CLCD_TIM0); 316 322 writel(regs.tim1, fb->regs + CLCD_TIM1); ··· 447 465 fb->off_ienb = CLCD_PL111_IENB; 448 466 fb->off_cntl = CLCD_PL111_CNTL; 449 467 } else { 450 - if (of_machine_is_compatible("arm,versatile-ab") || 451 - of_machine_is_compatible("arm,versatile-pb")) { 452 - fb->off_ienb = CLCD_PL111_IENB; 453 - fb->off_cntl = CLCD_PL111_CNTL; 454 - } else { 455 - fb->off_ienb = CLCD_PL110_IENB; 456 - fb->off_cntl = CLCD_PL110_CNTL; 457 - } 468 + fb->off_ienb = CLCD_PL110_IENB; 469 + fb->off_cntl = CLCD_PL110_CNTL; 458 470 } 459 471 460 472 fb->clk = clk_get(&fb->dev->dev, NULL); ··· 689 713 if (r0 != 0 && b0 == 0) 690 714 fb->panel->bgr_connection = true; 691 715 692 - if (fb->panel->caps && fb->vendor->st_bitmux_control) { 693 - /* 694 - * Set up the special bits for the Nomadik control register 695 - * (other platforms tend to do this through an external 696 - * register). 697 - */ 698 - 699 - /* Offset of the highest used color */ 700 - int maxoff = max3(r0, g0, b0); 701 - /* Most significant bit out, highest used bit */ 702 - int msb = 0; 703 - 704 - if (fb->panel->caps & CLCD_CAP_888) { 705 - msb = maxoff + 8 - 1; 706 - } else if (fb->panel->caps & CLCD_CAP_565) { 707 - msb = maxoff + 5 - 1; 708 - fb->panel->cntl |= CNTL_ST_1XBPP_565; 709 - } else if (fb->panel->caps & CLCD_CAP_5551) { 710 - msb = maxoff + 5 - 1; 711 - fb->panel->cntl |= CNTL_ST_1XBPP_5551; 712 - } else if (fb->panel->caps & CLCD_CAP_444) { 713 - msb = maxoff + 4 - 1; 714 - fb->panel->cntl |= CNTL_ST_1XBPP_444; 715 - } 716 - 717 - /* Send out as many bits as we need */ 718 - if (msb > 17) 719 - fb->panel->cntl |= CNTL_ST_CDWID_24; 720 - else if (msb > 15) 721 - fb->panel->cntl |= CNTL_ST_CDWID_18; 722 - else if (msb > 11) 723 - fb->panel->cntl |= CNTL_ST_CDWID_16; 724 - else 725 - fb->panel->cntl |= CNTL_ST_CDWID_12; 726 - } 727 - 728 716 return fb->panel->caps ? 0 : -EINVAL; 729 717 } 730 718 ··· 714 774 panel = of_graph_get_remote_port_parent(endpoint); 715 775 if (!panel) 716 776 return -ENODEV; 717 - 718 - if (fb->vendor->init_panel) { 719 - err = fb->vendor->init_panel(fb, panel); 720 - if (err) 721 - return err; 722 - } 723 777 724 778 err = clcdfb_of_get_backlight(panel, fb->panel); 725 779 if (err) ··· 875 941 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id) 876 942 { 877 943 struct clcd_board *board = dev_get_platdata(&dev->dev); 878 - struct clcd_vendor_data *vendor = id->data; 879 944 struct clcd_fb *fb; 880 945 int ret; 881 946 ··· 883 950 884 951 if (!board) 885 952 return -EINVAL; 886 - 887 - if (vendor->init_board) { 888 - ret = vendor->init_board(dev, board); 889 - if (ret) 890 - return ret; 891 - } 892 953 893 954 ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)); 894 955 if (ret) ··· 901 974 } 902 975 903 976 fb->dev = dev; 904 - fb->vendor = vendor; 905 977 fb->board = board; 906 978 907 979 dev_info(&fb->dev->dev, "PL%03x designer %02x rev%u at 0x%08llx\n", ··· 947 1021 return 0; 948 1022 } 949 1023 950 - static struct clcd_vendor_data vendor_arm = { 951 - /* Sets up the versatile board displays */ 952 - .init_panel = versatile_clcd_init_panel, 953 - }; 954 - 955 - static struct clcd_vendor_data vendor_nomadik = { 956 - .clock_timregs = true, 957 - .packed_24_bit_pixels = true, 958 - .st_bitmux_control = true, 959 - .init_board = nomadik_clcd_init_board, 960 - .init_panel = nomadik_clcd_init_panel, 961 - }; 962 - 963 1024 static const struct amba_id clcdfb_id_table[] = { 964 1025 { 965 1026 .id = 0x00041110, 966 1027 .mask = 0x000ffffe, 967 - .data = &vendor_arm, 968 - }, 969 - /* ST Electronics Nomadik variant */ 970 - { 971 - .id = 0x00180110, 972 - .mask = 0x00fffffe, 973 - .data = &vendor_nomadik, 974 1028 }, 975 1029 { 0, 0 }, 976 1030 };
+42 -29
drivers/video/fbdev/atafb.c
··· 47 47 #define ATAFB_EXT 48 48 #define ATAFB_FALCON 49 49 50 - #include <linux/module.h> 51 50 #include <linux/kernel.h> 52 51 #include <linux/errno.h> 53 52 #include <linux/string.h> ··· 54 55 #include <linux/delay.h> 55 56 #include <linux/init.h> 56 57 #include <linux/interrupt.h> 58 + #include <linux/platform_device.h> 57 59 58 60 #include <asm/setup.h> 59 61 #include <linux/uaccess.h> ··· 3073 3073 return 0; 3074 3074 } 3075 3075 3076 - int __init atafb_init(void) 3076 + static int __init atafb_probe(struct platform_device *pdev) 3077 3077 { 3078 3078 int pad, detected_mode, error; 3079 3079 unsigned int defmode = 0; 3080 3080 unsigned long mem_req; 3081 - 3082 - #ifndef MODULE 3083 3081 char *option = NULL; 3084 3082 3085 3083 if (fb_get_options("atafb", &option)) 3086 3084 return -ENODEV; 3087 3085 atafb_setup(option); 3088 - #endif 3089 - printk("atafb_init: start\n"); 3090 - 3091 - if (!MACH_IS_ATARI) 3092 - return -ENODEV; 3086 + dev_dbg(&pdev->dev, "%s: start\n", __func__); 3093 3087 3094 3088 do { 3095 3089 #ifdef ATAFB_EXT 3096 3090 if (external_addr) { 3097 - printk("atafb_init: initializing external hw\n"); 3091 + dev_dbg(&pdev->dev, "initializing external hw\n"); 3098 3092 fbhw = &ext_switch; 3099 3093 atafb_ops.fb_setcolreg = &ext_setcolreg; 3100 3094 defmode = DEFMODE_EXT; ··· 3097 3103 #endif 3098 3104 #ifdef ATAFB_TT 3099 3105 if (ATARIHW_PRESENT(TT_SHIFTER)) { 3100 - printk("atafb_init: initializing TT hw\n"); 3106 + dev_dbg(&pdev->dev, "initializing TT hw\n"); 3101 3107 fbhw = &tt_switch; 3102 3108 atafb_ops.fb_setcolreg = &tt_setcolreg; 3103 3109 defmode = DEFMODE_TT; ··· 3106 3112 #endif 3107 3113 #ifdef ATAFB_FALCON 3108 3114 if (ATARIHW_PRESENT(VIDEL_SHIFTER)) { 3109 - printk("atafb_init: initializing Falcon hw\n"); 3115 + dev_dbg(&pdev->dev, "initializing Falcon hw\n"); 3110 3116 fbhw = &falcon_switch; 3111 3117 atafb_ops.fb_setcolreg = &falcon_setcolreg; 3112 3118 error = request_irq(IRQ_AUTO_4, falcon_vbl_switcher, 0, ··· 3121 3127 #ifdef ATAFB_STE 3122 3128 if (ATARIHW_PRESENT(STND_SHIFTER) || 3123 3129 ATARIHW_PRESENT(EXTD_SHIFTER)) { 3124 - printk("atafb_init: initializing ST/E hw\n"); 3130 + dev_dbg(&pdev->dev, "initializing ST/E hw\n"); 3125 3131 fbhw = &st_switch; 3126 3132 atafb_ops.fb_setcolreg = &stste_setcolreg; 3127 3133 defmode = DEFMODE_STE; ··· 3129 3135 } 3130 3136 fbhw = &st_switch; 3131 3137 atafb_ops.fb_setcolreg = &stste_setcolreg; 3132 - printk("Cannot determine video hardware; defaulting to ST(e)\n"); 3138 + dev_warn(&pdev->dev, 3139 + "Cannot determine video hardware; defaulting to ST(e)\n"); 3133 3140 #else /* ATAFB_STE */ 3134 3141 /* no default driver included */ 3135 3142 /* Nobody will ever see this message :-) */ ··· 3170 3175 kernel_set_cachemode(screen_base, screen_len, 3171 3176 IOMAP_WRITETHROUGH); 3172 3177 } 3173 - printk("atafb: screen_base %p phys_screen_base %lx screen_len %d\n", 3174 - screen_base, phys_screen_base, screen_len); 3178 + dev_info(&pdev->dev, "phys_screen_base %lx screen_len %d\n", 3179 + phys_screen_base, screen_len); 3175 3180 #ifdef ATAFB_EXT 3176 3181 } else { 3177 3182 /* Map the video memory (physical address given) to somewhere ··· 3218 3223 fb_alloc_cmap(&(fb_info.cmap), 1 << fb_info.var.bits_per_pixel, 0); 3219 3224 3220 3225 3221 - printk("Determined %dx%d, depth %d\n", 3222 - fb_info.var.xres, fb_info.var.yres, fb_info.var.bits_per_pixel); 3226 + dev_info(&pdev->dev, "Determined %dx%d, depth %d\n", fb_info.var.xres, 3227 + fb_info.var.yres, fb_info.var.bits_per_pixel); 3223 3228 if ((fb_info.var.xres != fb_info.var.xres_virtual) || 3224 3229 (fb_info.var.yres != fb_info.var.yres_virtual)) 3225 - printk(" virtual %dx%d\n", fb_info.var.xres_virtual, 3226 - fb_info.var.yres_virtual); 3230 + dev_info(&pdev->dev, " virtual %dx%d\n", 3231 + fb_info.var.xres_virtual, fb_info.var.yres_virtual); 3227 3232 3228 3233 if (register_framebuffer(&fb_info) < 0) { 3229 3234 #ifdef ATAFB_EXT ··· 3246 3251 return 0; 3247 3252 } 3248 3253 3249 - module_init(atafb_init); 3250 - 3251 - #ifdef MODULE 3252 - MODULE_LICENSE("GPL"); 3253 - 3254 - int cleanup_module(void) 3254 + static void atafb_shutdown(struct platform_device *pdev) 3255 3255 { 3256 - unregister_framebuffer(&fb_info); 3257 - return atafb_deinit(); 3256 + /* Unblank before kexec */ 3257 + if (fbhw->blank) 3258 + fbhw->blank(0); 3258 3259 } 3259 - #endif /* MODULE */ 3260 + 3261 + static struct platform_driver atafb_driver = { 3262 + .shutdown = atafb_shutdown, 3263 + .driver = { 3264 + .name = "atafb", 3265 + }, 3266 + }; 3267 + 3268 + static int __init atafb_init(void) 3269 + { 3270 + struct platform_device *pdev; 3271 + 3272 + if (!MACH_IS_ATARI) 3273 + return -ENODEV; 3274 + 3275 + pdev = platform_device_register_simple("atafb", -1, NULL, 0); 3276 + if (IS_ERR(pdev)) 3277 + return PTR_ERR(pdev); 3278 + 3279 + return platform_driver_probe(&atafb_driver, atafb_probe); 3280 + } 3281 + 3282 + device_initcall(atafb_init);
-23
drivers/video/fbdev/atafb_iplan2p2.c
··· 10 10 * more details. 11 11 */ 12 12 13 - #include <linux/module.h> 14 13 #include <linux/string.h> 15 14 #include <linux/fb.h> 16 15 ··· 268 269 if (width) 269 270 fill8_2col((u8 *)dest, fgcolor, bgcolor, *data); 270 271 } 271 - 272 - #ifdef MODULE 273 - MODULE_LICENSE("GPL"); 274 - 275 - int init_module(void) 276 - { 277 - return 0; 278 - } 279 - 280 - void cleanup_module(void) 281 - { 282 - } 283 - #endif /* MODULE */ 284 - 285 - 286 - /* 287 - * Visible symbols for modules 288 - */ 289 - 290 - EXPORT_SYMBOL(atafb_iplan2p2_copyarea); 291 - EXPORT_SYMBOL(atafb_iplan2p2_fillrect); 292 - EXPORT_SYMBOL(atafb_iplan2p2_linefill);
-23
drivers/video/fbdev/atafb_iplan2p4.c
··· 10 10 * more details. 11 11 */ 12 12 13 - #include <linux/module.h> 14 13 #include <linux/string.h> 15 14 #include <linux/fb.h> 16 15 ··· 283 284 if (width) 284 285 fill8_2col((u8 *)dest, fgcolor, bgcolor, *data); 285 286 } 286 - 287 - #ifdef MODULE 288 - MODULE_LICENSE("GPL"); 289 - 290 - int init_module(void) 291 - { 292 - return 0; 293 - } 294 - 295 - void cleanup_module(void) 296 - { 297 - } 298 - #endif /* MODULE */ 299 - 300 - 301 - /* 302 - * Visible symbols for modules 303 - */ 304 - 305 - EXPORT_SYMBOL(atafb_iplan2p4_copyarea); 306 - EXPORT_SYMBOL(atafb_iplan2p4_fillrect); 307 - EXPORT_SYMBOL(atafb_iplan2p4_linefill);
-23
drivers/video/fbdev/atafb_iplan2p8.c
··· 10 10 * more details. 11 11 */ 12 12 13 - #include <linux/module.h> 14 13 #include <linux/string.h> 15 14 #include <linux/fb.h> 16 15 ··· 320 321 if (width) 321 322 fill8_2col((u8 *)dest, fgcolor, bgcolor, *data); 322 323 } 323 - 324 - #ifdef MODULE 325 - MODULE_LICENSE("GPL"); 326 - 327 - int init_module(void) 328 - { 329 - return 0; 330 - } 331 - 332 - void cleanup_module(void) 333 - { 334 - } 335 - #endif /* MODULE */ 336 - 337 - 338 - /* 339 - * Visible symbols for modules 340 - */ 341 - 342 - EXPORT_SYMBOL(atafb_iplan2p8_copyarea); 343 - EXPORT_SYMBOL(atafb_iplan2p8_fillrect); 344 - EXPORT_SYMBOL(atafb_iplan2p8_linefill);
-23
drivers/video/fbdev/atafb_mfb.c
··· 9 9 * more details. 10 10 */ 11 11 12 - #include <linux/module.h> 13 12 #include <linux/string.h> 14 13 #include <linux/fb.h> 15 14 ··· 87 88 *dest++ = *data++; 88 89 } 89 90 } 90 - 91 - #ifdef MODULE 92 - MODULE_LICENSE("GPL"); 93 - 94 - int init_module(void) 95 - { 96 - return 0; 97 - } 98 - 99 - void cleanup_module(void) 100 - { 101 - } 102 - #endif /* MODULE */ 103 - 104 - 105 - /* 106 - * Visible symbols for modules 107 - */ 108 - 109 - EXPORT_SYMBOL(atafb_mfb_copyarea); 110 - EXPORT_SYMBOL(atafb_mfb_fillrect); 111 - EXPORT_SYMBOL(atafb_mfb_linefill);
+4 -112
drivers/video/fbdev/atmel_lcdfb.c
··· 1 1 /* 2 - * Driver for AT91/AT32 LCD Controller 2 + * Driver for AT91 LCD Controller 3 3 * 4 4 * Copyright (C) 2007 Atmel Corporation 5 5 * ··· 98 98 static struct atmel_lcdfb_config at91sam9rl_config = { 99 99 .have_intensity_bit = true, 100 100 }; 101 - 102 - static struct atmel_lcdfb_config at32ap_config = { 103 - .have_hozval = true, 104 - }; 105 - 106 - static const struct platform_device_id atmel_lcdfb_devtypes[] = { 107 - { 108 - .name = "at91sam9261-lcdfb", 109 - .driver_data = (unsigned long)&at91sam9261_config, 110 - }, { 111 - .name = "at91sam9263-lcdfb", 112 - .driver_data = (unsigned long)&at91sam9263_config, 113 - }, { 114 - .name = "at91sam9g10-lcdfb", 115 - .driver_data = (unsigned long)&at91sam9g10_config, 116 - }, { 117 - .name = "at91sam9g45-lcdfb", 118 - .driver_data = (unsigned long)&at91sam9g45_config, 119 - }, { 120 - .name = "at91sam9g45es-lcdfb", 121 - .driver_data = (unsigned long)&at91sam9g45es_config, 122 - }, { 123 - .name = "at91sam9rl-lcdfb", 124 - .driver_data = (unsigned long)&at91sam9rl_config, 125 - }, { 126 - .name = "at32ap-lcdfb", 127 - .driver_data = (unsigned long)&at32ap_config, 128 - }, { 129 - /* terminator */ 130 - } 131 - }; 132 - MODULE_DEVICE_TABLE(platform, atmel_lcdfb_devtypes); 133 - 134 - static struct atmel_lcdfb_config * 135 - atmel_lcdfb_get_config(struct platform_device *pdev) 136 - { 137 - unsigned long data; 138 - 139 - data = platform_get_device_id(pdev)->driver_data; 140 - 141 - return (struct atmel_lcdfb_config *)data; 142 - } 143 - 144 - #if defined(CONFIG_ARCH_AT91) 145 - #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ 146 - | FBINFO_PARTIAL_PAN_OK \ 147 - | FBINFO_HWACCEL_YPAN) 148 - 149 - static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, 150 - struct fb_var_screeninfo *var, 151 - struct fb_info *info) 152 - { 153 - 154 - } 155 - #elif defined(CONFIG_AVR32) 156 - #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ 157 - | FBINFO_PARTIAL_PAN_OK \ 158 - | FBINFO_HWACCEL_XPAN \ 159 - | FBINFO_HWACCEL_YPAN) 160 - 161 - static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, 162 - struct fb_var_screeninfo *var, 163 - struct fb_info *info) 164 - { 165 - u32 dma2dcfg; 166 - u32 pixeloff; 167 - 168 - pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f; 169 - 170 - dma2dcfg = (info->var.xres_virtual - info->var.xres) 171 - * info->var.bits_per_pixel / 8; 172 - dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET; 173 - lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg); 174 - 175 - /* Update configuration */ 176 - lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 177 - lcdc_readl(sinfo, ATMEL_LCDC_DMACON) 178 - | ATMEL_LCDC_DMAUPDT); 179 - } 180 - #endif 181 101 182 102 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8 183 103 | ATMEL_LCDC_POL_POSITIVE ··· 324 404 325 405 /* Set framebuffer DMA base address and pixel offset */ 326 406 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr); 327 - 328 - atmel_lcdfb_update_dma2d(sinfo, var, info); 329 407 } 330 408 331 409 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo) ··· 896 978 clk_disable_unprepare(sinfo->lcdc_clk); 897 979 } 898 980 899 - #ifdef CONFIG_OF 900 981 static const struct of_device_id atmel_lcdfb_dt_ids[] = { 901 982 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, }, 902 983 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, }, ··· 903 986 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, }, 904 987 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, }, 905 988 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, }, 906 - { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, }, 907 989 { /* sentinel */ } 908 990 }; 909 991 ··· 1038 1122 of_node_put(display_np); 1039 1123 return ret; 1040 1124 } 1041 - #else 1042 - static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) 1043 - { 1044 - return 0; 1045 - } 1046 - #endif 1047 1125 1048 1126 static int __init atmel_lcdfb_probe(struct platform_device *pdev) 1049 1127 { 1050 1128 struct device *dev = &pdev->dev; 1051 1129 struct fb_info *info; 1052 1130 struct atmel_lcdfb_info *sinfo; 1053 - struct atmel_lcdfb_pdata *pdata = NULL; 1054 1131 struct resource *regs = NULL; 1055 1132 struct resource *map = NULL; 1056 1133 struct fb_modelist *modelist; ··· 1068 1159 ret = atmel_lcdfb_of_init(sinfo); 1069 1160 if (ret) 1070 1161 goto free_info; 1071 - } else if (dev_get_platdata(dev)) { 1072 - struct fb_monspecs *monspecs; 1073 - int i; 1074 - 1075 - pdata = dev_get_platdata(dev); 1076 - monspecs = pdata->default_monspecs; 1077 - sinfo->pdata = *pdata; 1078 - 1079 - for (i = 0; i < monspecs->modedb_len; i++) 1080 - fb_add_videomode(&monspecs->modedb[i], &info->modelist); 1081 - 1082 - sinfo->config = atmel_lcdfb_get_config(pdev); 1083 - 1084 - info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16; 1085 - memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs)); 1086 1162 } else { 1087 1163 dev_err(dev, "cannot get default configuration\n"); 1088 1164 goto free_info; ··· 1080 1186 if (IS_ERR(sinfo->reg_lcd)) 1081 1187 sinfo->reg_lcd = NULL; 1082 1188 1083 - info->flags = ATMEL_LCDFB_FBINFO_DEFAULT; 1189 + info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK | 1190 + FBINFO_HWACCEL_YPAN; 1084 1191 info->pseudo_palette = sinfo->pseudo_palette; 1085 1192 info->fbops = &atmel_lcdfb_ops; 1086 1193 ··· 1252 1357 struct device *dev = &pdev->dev; 1253 1358 struct fb_info *info = dev_get_drvdata(dev); 1254 1359 struct atmel_lcdfb_info *sinfo; 1255 - struct atmel_lcdfb_pdata *pdata; 1256 1360 1257 1361 if (!info || !info->par) 1258 1362 return 0; 1259 1363 sinfo = info->par; 1260 - pdata = &sinfo->pdata; 1261 1364 1262 1365 cancel_work_sync(&sinfo->task); 1263 1366 exit_backlight(sinfo); ··· 1328 1435 .remove = __exit_p(atmel_lcdfb_remove), 1329 1436 .suspend = atmel_lcdfb_suspend, 1330 1437 .resume = atmel_lcdfb_resume, 1331 - .id_table = atmel_lcdfb_devtypes, 1332 1438 .driver = { 1333 1439 .name = "atmel_lcdfb", 1334 1440 .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids), ··· 1336 1444 1337 1445 module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe); 1338 1446 1339 - MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver"); 1447 + MODULE_DESCRIPTION("AT91 LCD Controller framebuffer driver"); 1340 1448 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>"); 1341 1449 MODULE_LICENSE("GPL");
+2
drivers/video/fbdev/core/fbcmap.c
··· 94 94 int size = len * sizeof(u16); 95 95 int ret = -ENOMEM; 96 96 97 + flags |= __GFP_NOWARN; 98 + 97 99 if (cmap->len != len) { 98 100 fb_dealloc_cmap(cmap); 99 101 if (!len)
+1 -1
drivers/video/fbdev/core/fbcon.c
··· 1069 1069 1070 1070 cap = info->flags; 1071 1071 1072 - if (console_loglevel <= CONSOLE_LOGLEVEL_QUIET) 1072 + if (logo_shown < 0 && console_loglevel <= CONSOLE_LOGLEVEL_QUIET) 1073 1073 logo_shown = FBCON_LOGO_DONTSHOW; 1074 1074 1075 1075 if (vc != svc || logo_shown == FBCON_LOGO_DONTSHOW ||
+25 -4
drivers/video/fbdev/core/fbmem.c
··· 1882 1882 { 1883 1883 struct apertures_struct *ap; 1884 1884 bool primary = false; 1885 - int err; 1885 + int err, idx, bar; 1886 + bool res_id_found = false; 1886 1887 1887 - ap = alloc_apertures(1); 1888 + for (idx = 0, bar = 0; bar < PCI_ROM_RESOURCE; bar++) { 1889 + if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) 1890 + continue; 1891 + idx++; 1892 + } 1893 + 1894 + ap = alloc_apertures(idx); 1888 1895 if (!ap) 1889 1896 return -ENOMEM; 1890 1897 1891 - ap->ranges[0].base = pci_resource_start(pdev, res_id); 1892 - ap->ranges[0].size = pci_resource_len(pdev, res_id); 1898 + for (idx = 0, bar = 0; bar < PCI_ROM_RESOURCE; bar++) { 1899 + if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) 1900 + continue; 1901 + ap->ranges[idx].base = pci_resource_start(pdev, bar); 1902 + ap->ranges[idx].size = pci_resource_len(pdev, bar); 1903 + pci_info(pdev, "%s: bar %d: 0x%lx -> 0x%lx\n", __func__, bar, 1904 + (unsigned long)pci_resource_start(pdev, bar), 1905 + (unsigned long)pci_resource_end(pdev, bar)); 1906 + idx++; 1907 + if (res_id == bar) 1908 + res_id_found = true; 1909 + } 1910 + if (!res_id_found) 1911 + pci_warn(pdev, "%s: passed res_id (%d) is not a memory bar\n", 1912 + __func__, res_id); 1913 + 1893 1914 #ifdef CONFIG_X86 1894 1915 primary = pdev->resource[PCI_ROM_RESOURCE].flags & 1895 1916 IORESOURCE_ROM_SHADOW;
+3
drivers/video/fbdev/core/modedb.c
··· 935 935 if (var->vmode & FB_VMODE_DOUBLE) 936 936 vtotal *= 2; 937 937 938 + if (!htotal || !vtotal) 939 + return; 940 + 938 941 hfreq = pixclock/htotal; 939 942 mode->refresh = hfreq/vtotal; 940 943 }
+2
drivers/video/fbdev/hgafb.c
··· 285 285 hga_vram_len = 0x08000; 286 286 287 287 hga_vram = ioremap(0xb0000, hga_vram_len); 288 + if (!hga_vram) 289 + goto error; 288 290 289 291 if (request_region(0x3b0, 12, "hgafb")) 290 292 release_io_ports = 1;
+5
drivers/video/fbdev/imsttfb.c
··· 1515 1515 info->fix.smem_start = addr; 1516 1516 info->screen_base = (__u8 *)ioremap(addr, par->ramdac == IBM ? 1517 1517 0x400000 : 0x800000); 1518 + if (!info->screen_base) { 1519 + release_mem_region(addr, size); 1520 + framebuffer_release(info); 1521 + return -ENOMEM; 1522 + } 1518 1523 info->fix.mmio_start = addr + 0x800000; 1519 1524 par->dc_regs = ioremap(addr + 0x800000, 0x1000); 1520 1525 par->cmap_regs_phys = addr + 0x840000;
+2 -27
drivers/video/fbdev/macfb.c
··· 120 120 #define PIXEL_TO_MM(a) (((a)*10)/28) /* width in mm at 72 dpi */ 121 121 122 122 static struct fb_var_screeninfo macfb_defined = { 123 - .bits_per_pixel = 8, 124 123 .activate = FB_ACTIVATE_NOW, 125 - .width = -1, 126 - .height = -1, 127 124 .right_margin = 32, 128 125 .upper_margin = 16, 129 126 .lower_margin = 4, ··· 136 139 static void *slot_addr; 137 140 static struct fb_info fb_info; 138 141 static u32 pseudo_palette[16]; 139 - static int inverse; 140 142 static int vidtest; 141 143 142 144 /* ··· 148 152 unsigned int green, unsigned int blue, 149 153 struct fb_info *info) 150 154 { 151 - static int lastreg = -1; 155 + static int lastreg = -2; 152 156 unsigned long flags; 153 157 154 158 local_irq_save(flags); ··· 197 201 unsigned int bpp = info->var.bits_per_pixel; 198 202 unsigned long flags; 199 203 200 - if (bpp > 8) 201 - return 1; /* failsafe */ 202 - 203 204 local_irq_save(flags); 204 205 205 206 /* On these chips, the CLUT register numbers are spread out ··· 226 233 struct fb_info *info) 227 234 { 228 235 unsigned long flags; 229 - 230 - if (info->var.bits_per_pixel > 8) 231 - return 1; /* failsafe */ 232 236 233 237 local_irq_save(flags); 234 238 ··· 343 353 unsigned long flags; 344 354 int clut_status; 345 355 346 - if (info->var.bits_per_pixel > 8) 347 - return 1; /* failsafe */ 348 - 349 356 local_irq_save(flags); 350 357 351 358 /* Set the register address */ ··· 519 532 continue; 520 533 521 534 if (!strcmp(this_opt, "inverse")) 522 - inverse = 1; 535 + fb_invert_cmaps(); 523 536 else 524 537 if (!strcmp(this_opt, "vidtest")) 525 538 vidtest = 1; /* enable experimental CLUT code */ ··· 675 688 case NUBUS_DRHW_APPLE_MDC: 676 689 strcpy(macfb_fix.id, "Mac Disp. Card"); 677 690 macfb_setpalette = mdc_setpalette; 678 - macfb_defined.activate = FB_ACTIVATE_NOW; 679 691 break; 680 692 case NUBUS_DRHW_APPLE_TFB: 681 693 strcpy(macfb_fix.id, "Toby"); 682 694 macfb_setpalette = toby_setpalette; 683 - macfb_defined.activate = FB_ACTIVATE_NOW; 684 695 break; 685 696 case NUBUS_DRHW_APPLE_JET: 686 697 strcpy(macfb_fix.id, "Jet"); 687 698 macfb_setpalette = jet_setpalette; 688 - macfb_defined.activate = FB_ACTIVATE_NOW; 689 699 break; 690 700 default: 691 701 strcpy(macfb_fix.id, "Generic NuBus"); ··· 715 731 strcpy(macfb_fix.id, "DAFB"); 716 732 macfb_setpalette = dafb_setpalette; 717 733 dafb_cmap_regs = ioremap(DAFB_BASE, 0x1000); 718 - macfb_defined.activate = FB_ACTIVATE_NOW; 719 734 break; 720 735 721 736 /* ··· 724 741 strcpy(macfb_fix.id, "V8"); 725 742 macfb_setpalette = v8_brazil_setpalette; 726 743 v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000); 727 - macfb_defined.activate = FB_ACTIVATE_NOW; 728 744 break; 729 745 730 746 /* ··· 737 755 strcpy(macfb_fix.id, "Brazil"); 738 756 macfb_setpalette = v8_brazil_setpalette; 739 757 v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000); 740 - macfb_defined.activate = FB_ACTIVATE_NOW; 741 758 break; 742 759 743 760 /* ··· 753 772 strcpy(macfb_fix.id, "Sonora"); 754 773 macfb_setpalette = v8_brazil_setpalette; 755 774 v8_brazil_cmap_regs = ioremap(DAC_BASE, 0x1000); 756 - macfb_defined.activate = FB_ACTIVATE_NOW; 757 775 break; 758 776 759 777 /* ··· 765 785 strcpy(macfb_fix.id, "RBV"); 766 786 macfb_setpalette = rbv_setpalette; 767 787 rbv_cmap_regs = ioremap(DAC_BASE, 0x1000); 768 - macfb_defined.activate = FB_ACTIVATE_NOW; 769 788 break; 770 789 771 790 /* ··· 775 796 strcpy(macfb_fix.id, "Civic"); 776 797 macfb_setpalette = civic_setpalette; 777 798 civic_cmap_regs = ioremap(CIVIC_BASE, 0x1000); 778 - macfb_defined.activate = FB_ACTIVATE_NOW; 779 799 break; 780 800 781 801 ··· 788 810 macfb_setpalette = v8_brazil_setpalette; 789 811 v8_brazil_cmap_regs = 790 812 ioremap(DAC_BASE, 0x1000); 791 - macfb_defined.activate = FB_ACTIVATE_NOW; 792 813 } 793 814 break; 794 815 ··· 800 823 macfb_setpalette = v8_brazil_setpalette; 801 824 v8_brazil_cmap_regs = 802 825 ioremap(DAC_BASE, 0x1000); 803 - macfb_defined.activate = FB_ACTIVATE_NOW; 804 826 } 805 827 break; 806 828 ··· 868 892 strcpy(macfb_fix.id, "CSC"); 869 893 macfb_setpalette = csc_setpalette; 870 894 csc_cmap_regs = ioremap(CSC_BASE, 0x1000); 871 - macfb_defined.activate = FB_ACTIVATE_NOW; 872 895 break; 873 896 874 897 default:
+3 -3
drivers/video/fbdev/mmp/Kconfig
··· 1 1 menuconfig MMP_DISP 2 - tristate "Marvell MMP Display Subsystem support" 3 - depends on CPU_PXA910 || CPU_MMP2 4 - help 2 + tristate "Marvell MMP Display Subsystem support" 3 + depends on CPU_PXA910 || CPU_MMP2 4 + help 5 5 Marvell Display Subsystem support. 6 6 7 7 if MMP_DISP
+12 -2
drivers/video/fbdev/mxsfb.c
··· 181 181 const struct mxsfb_devdata *devdata; 182 182 u32 sync; 183 183 struct regulator *reg_lcd; 184 + int pre_init; 184 185 }; 185 186 186 187 #define mxsfb_is_v3(host) (host->devdata->ipversion == 3) ··· 420 419 421 420 fb_info->fix.line_length = line_size; 422 421 422 + if (host->pre_init) { 423 + mxsfb_enable_controller(fb_info); 424 + host->pre_init = 0; 425 + return 0; 426 + } 427 + 423 428 /* 424 429 * It seems, you can't re-program the controller if it is still running. 425 430 * This may lead into shifted pictures (FIFO issue?). ··· 630 623 struct fb_videomode *vmode) 631 624 { 632 625 struct mxsfb_info *host = fb_info->par; 633 - unsigned line_count; 634 626 unsigned period; 635 627 unsigned long pa, fbsize; 636 628 int bits_per_pixel, ofs, ret = 0; ··· 716 710 writel(fb_info->fix.smem_start, host->base + host->devdata->next_buf); 717 711 } 718 712 719 - line_count = fb_info->fix.smem_len / fb_info->fix.line_length; 720 713 fb_info->fix.ypanstep = 1; 721 714 722 715 clk_prepare_enable(host->clk); ··· 936 931 if (IS_ERR(host->reg_lcd)) 937 932 host->reg_lcd = NULL; 938 933 934 + #if defined(CONFIG_FB_PRE_INIT_FB) 935 + host->pre_init = 1; 936 + #endif 937 + 939 938 fb_info->pseudo_palette = devm_kcalloc(&pdev->dev, 16, sizeof(u32), 940 939 GFP_KERNEL); 941 940 if (!fb_info->pseudo_palette) { ··· 972 963 mxsfb_enable_controller(fb_info); 973 964 } 974 965 966 + host->pre_init = 0; 975 967 dev_info(&pdev->dev, "initialized\n"); 976 968 977 969 return 0;
+1 -1
drivers/video/fbdev/nuc900fb.c
··· 455 455 struct fb_info *fbinfo; 456 456 long delta_f; 457 457 info = container_of(nb, struct nuc900fb_info, freq_transition); 458 - fbinfo = platform_get_drvdata(to_platform_device(info->dev)); 458 + fbinfo = dev_get_drvdata(info->dev); 459 459 460 460 delta_f = info->clk_rate - clk_get_rate(info->clk); 461 461
+9 -11
drivers/video/fbdev/omap/Kconfig
··· 6 6 select FB_CFB_COPYAREA 7 7 select FB_CFB_IMAGEBLIT 8 8 help 9 - Frame buffer driver for OMAP based boards. 9 + Frame buffer driver for OMAP based boards. 10 10 11 11 config FB_OMAP_LCDC_EXTERNAL 12 12 bool "External LCD controller support" ··· 49 49 H3 board. 50 50 51 51 config FB_OMAP_DMA_TUNE 52 - bool "Set DMA SDRAM access priority high" 53 - depends on FB_OMAP 54 - help 55 - On systems in which video memory is in system memory 56 - (SDRAM) this will speed up graphics DMA operations. 57 - If you have such a system and want to use rotation 58 - answer yes. Answer no if you have a dedicated video 59 - memory, or don't use any of the accelerated features. 60 - 61 - 52 + bool "Set DMA SDRAM access priority high" 53 + depends on FB_OMAP 54 + help 55 + On systems in which video memory is in system memory 56 + (SDRAM) this will speed up graphics DMA operations. 57 + If you have such a system and want to use rotation 58 + answer yes. Answer no if you have a dedicated video 59 + memory, or don't use any of the accelerated features.
+9 -9
drivers/video/fbdev/omap2/omapfb/Kconfig
··· 2 2 bool 3 3 4 4 menuconfig FB_OMAP2 5 - tristate "OMAP2+ frame buffer support" 6 - depends on FB 7 - depends on DRM_OMAP = n 5 + tristate "OMAP2+ frame buffer support" 6 + depends on FB 7 + depends on DRM_OMAP = n 8 8 depends on GPIOLIB 9 9 10 - select FB_OMAP2_DSS 10 + select FB_OMAP2_DSS 11 11 select OMAP2_VRFB if ARCH_OMAP2 || ARCH_OMAP3 12 - select FB_CFB_FILLRECT 13 - select FB_CFB_COPYAREA 14 - select FB_CFB_IMAGEBLIT 15 - help 12 + select FB_CFB_FILLRECT 13 + select FB_CFB_COPYAREA 14 + select FB_CFB_IMAGEBLIT 15 + help 16 16 Frame buffer driver for OMAP2+ based boards. 17 17 18 18 if FB_OMAP2 19 19 20 20 config FB_OMAP2_DEBUG_SUPPORT 21 - bool "Debug support for OMAP2+ FB" 21 + bool "Debug support for OMAP2+ FB" 22 22 default y 23 23 depends on FB_OMAP2 24 24 help
+20 -20
drivers/video/fbdev/omap2/omapfb/displays/Kconfig
··· 1 1 menu "OMAPFB Panel and Encoder Drivers" 2 - depends on FB_OMAP2_DSS 2 + depends on FB_OMAP2_DSS 3 3 4 4 config FB_OMAP2_ENCODER_OPA362 5 5 tristate "OPA362 external analog amplifier" ··· 8 8 through a GPIO. 9 9 10 10 config FB_OMAP2_ENCODER_TFP410 11 - tristate "TFP410 DPI to DVI Encoder" 11 + tristate "TFP410 DPI to DVI Encoder" 12 12 help 13 13 Driver for TFP410 DPI to DVI encoder. 14 14 15 15 config FB_OMAP2_ENCODER_TPD12S015 16 - tristate "TPD12S015 HDMI ESD protection and level shifter" 16 + tristate "TPD12S015 HDMI ESD protection and level shifter" 17 17 help 18 18 Driver for TPD12S015, which offers HDMI ESD protection and level 19 19 shifting. 20 20 21 21 config FB_OMAP2_CONNECTOR_DVI 22 - tristate "DVI Connector" 22 + tristate "DVI Connector" 23 23 depends on I2C 24 24 help 25 25 Driver for a generic DVI connector. 26 26 27 27 config FB_OMAP2_CONNECTOR_HDMI 28 - tristate "HDMI Connector" 28 + tristate "HDMI Connector" 29 29 help 30 30 Driver for a generic HDMI connector. 31 31 32 32 config FB_OMAP2_CONNECTOR_ANALOG_TV 33 - tristate "Analog TV Connector" 33 + tristate "Analog TV Connector" 34 34 help 35 35 Driver for a generic analog TV connector. 36 36 ··· 58 58 LCD Panel used on the Gumstix Overo Palo35 59 59 60 60 config FB_OMAP2_PANEL_SHARP_LS037V7DW01 61 - tristate "Sharp LS037V7DW01 LCD Panel" 62 - depends on BACKLIGHT_CLASS_DEVICE 63 - help 64 - LCD Panel used in TI's SDP3430 and EVM boards 61 + tristate "Sharp LS037V7DW01 LCD Panel" 62 + depends on BACKLIGHT_CLASS_DEVICE 63 + help 64 + LCD Panel used in TI's SDP3430 and EVM boards 65 65 66 66 config FB_OMAP2_PANEL_TPO_TD028TTEC1 67 - tristate "TPO TD028TTEC1 LCD Panel" 68 - depends on SPI 69 - help 70 - LCD panel used in Openmoko. 67 + tristate "TPO TD028TTEC1 LCD Panel" 68 + depends on SPI 69 + help 70 + LCD panel used in Openmoko. 71 71 72 72 config FB_OMAP2_PANEL_TPO_TD043MTEA1 73 - tristate "TPO TD043MTEA1 LCD Panel" 74 - depends on SPI 75 - help 76 - LCD Panel used in OMAP3 Pandora 73 + tristate "TPO TD043MTEA1 LCD Panel" 74 + depends on SPI 75 + help 76 + LCD Panel used in OMAP3 Pandora 77 77 78 78 config FB_OMAP2_PANEL_NEC_NL8048HL11 79 79 tristate "NEC NL8048HL11 Panel" 80 80 depends on SPI 81 81 depends on BACKLIGHT_CLASS_DEVICE 82 82 help 83 - This NEC NL8048HL11 panel is TFT LCD used in the 84 - Zoom2/3/3630 sdp boards. 83 + This NEC NL8048HL11 panel is TFT LCD used in the 84 + Zoom2/3/3630 sdp boards. 85 85 86 86 endmenu
+3 -3
drivers/video/fbdev/omap2/omapfb/dss/Kconfig
··· 3 3 bool 4 4 5 5 config FB_OMAP2_DSS 6 - tristate 6 + tristate 7 7 select VIDEOMODE_HELPERS 8 8 select FB_OMAP2_DSS_INIT 9 9 select HDMI ··· 53 53 54 54 config FB_OMAP2_DSS_VENC 55 55 bool "VENC support" 56 - default y 56 + default y 57 57 help 58 58 OMAP Video Encoder support for S-Video and composite TV-out. 59 59 ··· 62 62 63 63 config FB_OMAP4_DSS_HDMI 64 64 bool "HDMI support for OMAP4" 65 - default y 65 + default y 66 66 select FB_OMAP2_DSS_HDMI_COMMON 67 67 help 68 68 HDMI support for OMAP4 based SoCs.
+5 -1
drivers/video/fbdev/omap2/omapfb/dss/omapdss-boot-init.c
··· 111 111 112 112 new_len = prop->length + strlen(prefix) * num_strs; 113 113 new_compat = kmalloc(new_len, GFP_KERNEL); 114 + if (!new_compat) 115 + return; 114 116 115 117 omapdss_prefix_strcpy(new_compat, new_len, prop->value, prop->length); 116 118 ··· 195 193 196 194 dss = of_find_matching_node(NULL, omapdss_of_match); 197 195 198 - if (dss == NULL || !of_device_is_available(dss)) 196 + if (dss == NULL || !of_device_is_available(dss)) { 197 + of_node_put(dss); 199 198 return 0; 199 + } 200 200 201 201 omapdss_walk_device(dss, true); 202 202
-2
drivers/video/fbdev/pvr2fb.c
··· 1071 1071 static int __init pvr2fb_init(void) 1072 1072 { 1073 1073 int i, ret = -ENODEV; 1074 - int size; 1075 1074 1076 1075 #ifndef MODULE 1077 1076 char *option = NULL; ··· 1079 1080 return -ENODEV; 1080 1081 pvr2fb_setup(option); 1081 1082 #endif 1082 - size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32); 1083 1083 1084 1084 fb_info = framebuffer_alloc(sizeof(struct pvr2fb_par), NULL); 1085 1085
+1 -1
drivers/video/fbdev/s3c2410fb.c
··· 777 777 long delta_f; 778 778 779 779 info = container_of(nb, struct s3c2410fb_info, freq_transition); 780 - fbinfo = platform_get_drvdata(to_platform_device(info->dev)); 780 + fbinfo = dev_get_drvdata(info->dev); 781 781 782 782 /* work out change, <0 for speed-up */ 783 783 delta_f = info->clk_rate - clk_get_rate(info->clk);
+3 -3
drivers/video/fbdev/savage/savagefb_driver.c
··· 2155 2155 2156 2156 err = fb_alloc_cmap(&info->cmap, NR_PALETTE, 0); 2157 2157 if (!err) 2158 - info->flags |= FBINFO_HWACCEL_COPYAREA | 2159 - FBINFO_HWACCEL_FILLRECT | 2160 - FBINFO_HWACCEL_IMAGEBLIT; 2158 + info->flags |= FBINFO_HWACCEL_COPYAREA | 2159 + FBINFO_HWACCEL_FILLRECT | 2160 + FBINFO_HWACCEL_IMAGEBLIT; 2161 2161 } 2162 2162 #endif 2163 2163 return err;
+4 -8
drivers/video/fbdev/sm712.h
··· 15 15 16 16 #define FB_ACCEL_SMI_LYNX 88 17 17 18 - #define SCREEN_X_RES 1024 19 - #define SCREEN_Y_RES 600 20 - #define SCREEN_BPP 16 21 - 22 - /*Assume SM712 graphics chip has 4MB VRAM */ 23 - #define SM712_VIDEOMEMORYSIZE 0x00400000 24 - /*Assume SM722 graphics chip has 8MB VRAM */ 25 - #define SM722_VIDEOMEMORYSIZE 0x00800000 18 + #define SCREEN_X_RES 1024 19 + #define SCREEN_Y_RES_PC 768 20 + #define SCREEN_Y_RES_NETBOOK 600 21 + #define SCREEN_BPP 16 26 22 27 23 #define dac_reg (0x3c8) 28 24 #define dac_val (0x3c9)
+200 -51
drivers/video/fbdev/sm712fb.c
··· 530 530 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, 531 531 }, 532 532 }, 533 + { /* 1024 x 768 16Bpp 60Hz */ 534 + 1024, 768, 16, 60, 535 + /* Init_MISC */ 536 + 0xEB, 537 + { /* Init_SR0_SR4 */ 538 + 0x03, 0x01, 0x0F, 0x03, 0x0E, 539 + }, 540 + { /* Init_SR10_SR24 */ 541 + 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C, 542 + 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 543 + 0xC4, 0x30, 0x02, 0x01, 0x01, 544 + }, 545 + { /* Init_SR30_SR75 */ 546 + 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A, 547 + 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF, 548 + 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, 549 + 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A, 550 + 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, 551 + 0x0F, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A, 552 + 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, 553 + 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02, 554 + 0x04, 0x45, 0x30, 0x30, 0x40, 0x20, 555 + }, 556 + { /* Init_SR80_SR93 */ 557 + 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, 558 + 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, 559 + 0x00, 0x00, 0x00, 0x00, 560 + }, 561 + { /* Init_SRA0_SRAF */ 562 + 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, 563 + 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, 564 + }, 565 + { /* Init_GR00_GR08 */ 566 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 567 + 0xFF, 568 + }, 569 + { /* Init_AR00_AR14 */ 570 + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 571 + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 572 + 0x41, 0x00, 0x0F, 0x00, 0x00, 573 + }, 574 + { /* Init_CR00_CR18 */ 575 + 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, 576 + 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 577 + 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, 578 + 0xFF, 579 + }, 580 + { /* Init_CR30_CR4D */ 581 + 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, 582 + 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF, 583 + 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00, 584 + 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF, 585 + }, 586 + { /* Init_CR90_CRA7 */ 587 + 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, 588 + 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, 589 + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, 590 + }, 591 + }, 533 592 { /* mode#5: 1024 x 768 24Bpp 60Hz */ 534 593 1024, 768, 24, 60, 535 594 /* Init_MISC */ ··· 886 827 887 828 static int smtc_blank(int blank_mode, struct fb_info *info) 888 829 { 830 + struct smtcfb_info *sfb = info->par; 831 + 889 832 /* clear DPMS setting */ 890 833 switch (blank_mode) { 891 834 case FB_BLANK_UNBLANK: 892 835 /* Screen On: HSync: On, VSync : On */ 836 + 837 + switch (sfb->chip_id) { 838 + case 0x710: 839 + case 0x712: 840 + smtc_seqw(0x6a, 0x16); 841 + smtc_seqw(0x6b, 0x02); 842 + break; 843 + case 0x720: 844 + smtc_seqw(0x6a, 0x0d); 845 + smtc_seqw(0x6b, 0x02); 846 + break; 847 + } 848 + 849 + smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0))); 893 850 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20))); 894 - smtc_seqw(0x6a, 0x16); 895 - smtc_seqw(0x6b, 0x02); 896 851 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77)); 897 852 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30))); 898 - smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0))); 899 - smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01)); 900 853 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03)); 854 + smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01)); 901 855 break; 902 856 case FB_BLANK_NORMAL: 903 857 /* Screen Off: HSync: On, VSync : On Soft blank */ 904 - smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20))); 905 - smtc_seqw(0x6a, 0x16); 906 - smtc_seqw(0x6b, 0x02); 907 - smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30))); 908 - smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0))); 909 858 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01)); 910 859 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00)); 860 + smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0))); 861 + smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20))); 862 + smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30))); 863 + smtc_seqw(0x6a, 0x16); 864 + smtc_seqw(0x6b, 0x02); 911 865 break; 912 866 case FB_BLANK_VSYNC_SUSPEND: 913 867 /* Screen On: HSync: On, VSync : Off */ 914 - smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20)); 915 - smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0))); 916 - smtc_seqw(0x6a, 0x0c); 917 - smtc_seqw(0x6b, 0x02); 918 - smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88)); 919 - smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20)); 920 - smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20)); 921 868 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01))); 922 869 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00)); 870 + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20)); 871 + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20)); 872 + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88)); 873 + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0))); 874 + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20)); 923 875 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80)); 876 + smtc_seqw(0x6a, 0x0c); 877 + smtc_seqw(0x6b, 0x02); 924 878 break; 925 879 case FB_BLANK_HSYNC_SUSPEND: 926 880 /* Screen On: HSync: Off, VSync : On */ 927 - smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20)); 928 - smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0))); 929 - smtc_seqw(0x6a, 0x0c); 930 - smtc_seqw(0x6b, 0x02); 931 - smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88)); 932 - smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10)); 933 - smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8)); 934 881 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01))); 935 882 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00)); 883 + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8)); 884 + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20)); 885 + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88)); 886 + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0))); 887 + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10)); 936 888 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80)); 889 + smtc_seqw(0x6a, 0x0c); 890 + smtc_seqw(0x6b, 0x02); 937 891 break; 938 892 case FB_BLANK_POWERDOWN: 939 893 /* Screen On: HSync: Off, VSync : Off */ 940 - smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20)); 941 - smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0))); 942 - smtc_seqw(0x6a, 0x0c); 943 - smtc_seqw(0x6b, 0x02); 944 - smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88)); 945 - smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30)); 946 - smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8)); 947 894 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01))); 948 895 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00)); 896 + smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8)); 897 + smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20)); 898 + smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88)); 899 + smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0))); 900 + smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30)); 949 901 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80)); 902 + smtc_seqw(0x6a, 0x0c); 903 + smtc_seqw(0x6b, 0x02); 950 904 break; 951 905 default: 952 906 return -EINVAL; ··· 1217 1145 1218 1146 /* init SEQ register SR30 - SR75 */ 1219 1147 for (i = 0; i < SIZE_SR30_SR75; i++) 1220 - if ((i + 0x30) != 0x62 && (i + 0x30) != 0x6a && 1221 - (i + 0x30) != 0x6b) 1148 + if ((i + 0x30) != 0x30 && (i + 0x30) != 0x62 && 1149 + (i + 0x30) != 0x6a && (i + 0x30) != 0x6b && 1150 + (i + 0x30) != 0x70 && (i + 0x30) != 0x71 && 1151 + (i + 0x30) != 0x74 && (i + 0x30) != 0x75) 1222 1152 smtc_seqw(i + 0x30, 1223 1153 vgamode[j].init_sr30_sr75[i]); 1224 1154 ··· 1245 1171 smtc_crtcw(i, vgamode[j].init_cr00_cr18[i]); 1246 1172 1247 1173 /* init CRTC register CR30 - CR4D */ 1248 - for (i = 0; i < SIZE_CR30_CR4D; i++) 1174 + for (i = 0; i < SIZE_CR30_CR4D; i++) { 1175 + if ((i + 0x30) >= 0x3B && (i + 0x30) <= 0x3F) 1176 + /* side-effect, don't write to CR3B-CR3F */ 1177 + continue; 1249 1178 smtc_crtcw(i + 0x30, vgamode[j].init_cr30_cr4d[i]); 1179 + } 1250 1180 1251 1181 /* init CRTC register CR90 - CRA7 */ 1252 1182 for (i = 0; i < SIZE_CR90_CRA7; i++) ··· 1401 1323 { 1402 1324 sfb->fb->fix.smem_start = pci_resource_start(pdev, 0); 1403 1325 1326 + if (sfb->chip_id == 0x720) 1327 + /* on SM720, the framebuffer starts at the 1 MB offset */ 1328 + sfb->fb->fix.smem_start += 0x00200000; 1329 + 1330 + /* XXX: is it safe for SM720 on Big-Endian? */ 1404 1331 if (sfb->fb->var.bits_per_pixel == 32) 1405 1332 sfb->fb->fix.smem_start += big_addr; 1406 1333 ··· 1443 1360 outb_p(0x11, 0x3c5); 1444 1361 } 1445 1362 1363 + static u_long sm7xx_vram_probe(struct smtcfb_info *sfb) 1364 + { 1365 + u8 vram; 1366 + 1367 + switch (sfb->chip_id) { 1368 + case 0x710: 1369 + case 0x712: 1370 + /* 1371 + * Assume SM712 graphics chip has 4MB VRAM. 1372 + * 1373 + * FIXME: SM712 can have 2MB VRAM, which is used on earlier 1374 + * laptops, such as IBM Thinkpad 240X. This driver would 1375 + * probably crash on those machines. If anyone gets one of 1376 + * those and is willing to help, run "git blame" and send me 1377 + * an E-mail. 1378 + */ 1379 + return 0x00400000; 1380 + case 0x720: 1381 + outb_p(0x76, 0x3c4); 1382 + vram = inb_p(0x3c5) >> 6; 1383 + 1384 + if (vram == 0x00) 1385 + return 0x00800000; /* 8 MB */ 1386 + else if (vram == 0x01) 1387 + return 0x01000000; /* 16 MB */ 1388 + else if (vram == 0x02) 1389 + return 0x00400000; /* illegal, fallback to 4 MB */ 1390 + else if (vram == 0x03) 1391 + return 0x00400000; /* 4 MB */ 1392 + } 1393 + return 0; /* unknown hardware */ 1394 + } 1395 + 1396 + static void sm7xx_resolution_probe(struct smtcfb_info *sfb) 1397 + { 1398 + /* get mode parameter from smtc_scr_info */ 1399 + if (smtc_scr_info.lfb_width != 0) { 1400 + sfb->fb->var.xres = smtc_scr_info.lfb_width; 1401 + sfb->fb->var.yres = smtc_scr_info.lfb_height; 1402 + sfb->fb->var.bits_per_pixel = smtc_scr_info.lfb_depth; 1403 + goto final; 1404 + } 1405 + 1406 + /* 1407 + * No parameter, default resolution is 1024x768-16. 1408 + * 1409 + * FIXME: earlier laptops, such as IBM Thinkpad 240X, has a 800x600 1410 + * panel, also see the comments about Thinkpad 240X above. 1411 + */ 1412 + sfb->fb->var.xres = SCREEN_X_RES; 1413 + sfb->fb->var.yres = SCREEN_Y_RES_PC; 1414 + sfb->fb->var.bits_per_pixel = SCREEN_BPP; 1415 + 1416 + #ifdef CONFIG_MIPS 1417 + /* 1418 + * Loongson MIPS netbooks use 1024x600 LCD panels, which is the original 1419 + * target platform of this driver, but nearly all old x86 laptops have 1420 + * 1024x768. Lighting 768 panels using 600's timings would partially 1421 + * garble the display, so we don't want that. But it's not possible to 1422 + * distinguish them reliably. 1423 + * 1424 + * So we change the default to 768, but keep 600 as-is on MIPS. 1425 + */ 1426 + sfb->fb->var.yres = SCREEN_Y_RES_NETBOOK; 1427 + #endif 1428 + 1429 + final: 1430 + big_pixel_depth(sfb->fb->var.bits_per_pixel, smtc_scr_info.lfb_depth); 1431 + } 1432 + 1446 1433 static int smtcfb_pci_probe(struct pci_dev *pdev, 1447 1434 const struct pci_device_id *ent) 1448 1435 { 1449 1436 struct smtcfb_info *sfb; 1450 1437 struct fb_info *info; 1451 - u_long smem_size = 0x00800000; /* default 8MB */ 1438 + u_long smem_size; 1452 1439 int err; 1453 1440 unsigned long mmio_base; 1454 1441 ··· 1558 1405 1559 1406 sm7xx_init_hw(); 1560 1407 1561 - /* get mode parameter from smtc_scr_info */ 1562 - if (smtc_scr_info.lfb_width != 0) { 1563 - sfb->fb->var.xres = smtc_scr_info.lfb_width; 1564 - sfb->fb->var.yres = smtc_scr_info.lfb_height; 1565 - sfb->fb->var.bits_per_pixel = smtc_scr_info.lfb_depth; 1566 - } else { 1567 - /* default resolution 1024x600 16bit mode */ 1568 - sfb->fb->var.xres = SCREEN_X_RES; 1569 - sfb->fb->var.yres = SCREEN_Y_RES; 1570 - sfb->fb->var.bits_per_pixel = SCREEN_BPP; 1571 - } 1572 - 1573 - big_pixel_depth(sfb->fb->var.bits_per_pixel, smtc_scr_info.lfb_depth); 1574 1408 /* Map address and memory detection */ 1575 1409 mmio_base = pci_resource_start(pdev, 0); 1576 1410 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id); 1411 + 1412 + smem_size = sm7xx_vram_probe(sfb); 1413 + dev_info(&pdev->dev, "%lu MiB of VRAM detected.\n", 1414 + smem_size / 1048576); 1577 1415 1578 1416 switch (sfb->chip_id) { 1579 1417 case 0x710: 1580 1418 case 0x712: 1581 1419 sfb->fb->fix.mmio_start = mmio_base + 0x00400000; 1582 1420 sfb->fb->fix.mmio_len = 0x00400000; 1583 - smem_size = SM712_VIDEOMEMORYSIZE; 1584 1421 sfb->lfb = ioremap(mmio_base, mmio_addr); 1585 1422 if (!sfb->lfb) { 1586 1423 dev_err(&pdev->dev, ··· 1602 1459 case 0x720: 1603 1460 sfb->fb->fix.mmio_start = mmio_base; 1604 1461 sfb->fb->fix.mmio_len = 0x00200000; 1605 - smem_size = SM722_VIDEOMEMORYSIZE; 1606 - sfb->dp_regs = ioremap(mmio_base, 0x00a00000); 1462 + sfb->dp_regs = ioremap(mmio_base, 0x00200000 + smem_size); 1607 1463 sfb->lfb = sfb->dp_regs + 0x00200000; 1608 1464 sfb->mmio = (smtc_regbaseaddress = 1609 1465 sfb->dp_regs + 0x000c0000); ··· 1619 1477 goto failed_fb; 1620 1478 } 1621 1479 1480 + /* probe and decide resolution */ 1481 + sm7xx_resolution_probe(sfb); 1482 + 1622 1483 /* can support 32 bpp */ 1623 1484 if (sfb->fb->var.bits_per_pixel == 15) 1624 1485 sfb->fb->var.bits_per_pixel = 16; ··· 1632 1487 if (err) 1633 1488 goto failed; 1634 1489 1635 - smtcfb_setmode(sfb); 1490 + /* 1491 + * The screen would be temporarily garbled when sm712fb takes over 1492 + * vesafb or VGA text mode. Zero the framebuffer. 1493 + */ 1494 + memset_io(sfb->lfb, 0, sfb->fb->fix.smem_len); 1636 1495 1637 1496 err = register_framebuffer(info); 1638 1497 if (err < 0)
+90 -24
drivers/video/fbdev/udlfb.c
··· 594 594 return 0; 595 595 } 596 596 597 - static int dlfb_handle_damage(struct dlfb_data *dlfb, int x, int y, 598 - int width, int height, char *data) 597 + static int dlfb_handle_damage(struct dlfb_data *dlfb, int x, int y, int width, int height) 599 598 { 600 599 int i, ret; 601 600 char *cmd; ··· 606 607 607 608 start_cycles = get_cycles(); 608 609 610 + mutex_lock(&dlfb->render_mutex); 611 + 609 612 aligned_x = DL_ALIGN_DOWN(x, sizeof(unsigned long)); 610 613 width = DL_ALIGN_UP(width + (x-aligned_x), sizeof(unsigned long)); 611 614 x = aligned_x; 612 615 613 616 if ((width <= 0) || 614 617 (x + width > dlfb->info->var.xres) || 615 - (y + height > dlfb->info->var.yres)) 616 - return -EINVAL; 618 + (y + height > dlfb->info->var.yres)) { 619 + ret = -EINVAL; 620 + goto unlock_ret; 621 + } 617 622 618 - if (!atomic_read(&dlfb->usb_active)) 619 - return 0; 623 + if (!atomic_read(&dlfb->usb_active)) { 624 + ret = 0; 625 + goto unlock_ret; 626 + } 620 627 621 628 urb = dlfb_get_urb(dlfb); 622 - if (!urb) 623 - return 0; 629 + if (!urb) { 630 + ret = 0; 631 + goto unlock_ret; 632 + } 624 633 cmd = urb->transfer_buffer; 625 634 626 635 for (i = y; i < y + height ; i++) { ··· 648 641 *cmd++ = 0xAF; 649 642 /* Send partial buffer remaining before exiting */ 650 643 len = cmd - (char *) urb->transfer_buffer; 651 - ret = dlfb_submit_urb(dlfb, urb, len); 644 + dlfb_submit_urb(dlfb, urb, len); 652 645 bytes_sent += len; 653 646 } else 654 647 dlfb_urb_completion(urb); ··· 662 655 >> 10)), /* Kcycles */ 663 656 &dlfb->cpu_kcycles_used); 664 657 665 - return 0; 658 + ret = 0; 659 + 660 + unlock_ret: 661 + mutex_unlock(&dlfb->render_mutex); 662 + return ret; 663 + } 664 + 665 + static void dlfb_init_damage(struct dlfb_data *dlfb) 666 + { 667 + dlfb->damage_x = INT_MAX; 668 + dlfb->damage_x2 = 0; 669 + dlfb->damage_y = INT_MAX; 670 + dlfb->damage_y2 = 0; 671 + } 672 + 673 + static void dlfb_damage_work(struct work_struct *w) 674 + { 675 + struct dlfb_data *dlfb = container_of(w, struct dlfb_data, damage_work); 676 + int x, x2, y, y2; 677 + 678 + spin_lock_irq(&dlfb->damage_lock); 679 + x = dlfb->damage_x; 680 + x2 = dlfb->damage_x2; 681 + y = dlfb->damage_y; 682 + y2 = dlfb->damage_y2; 683 + dlfb_init_damage(dlfb); 684 + spin_unlock_irq(&dlfb->damage_lock); 685 + 686 + if (x < x2 && y < y2) 687 + dlfb_handle_damage(dlfb, x, y, x2 - x, y2 - y); 688 + } 689 + 690 + static void dlfb_offload_damage(struct dlfb_data *dlfb, int x, int y, int width, int height) 691 + { 692 + unsigned long flags; 693 + int x2 = x + width; 694 + int y2 = y + height; 695 + 696 + if (x >= x2 || y >= y2) 697 + return; 698 + 699 + spin_lock_irqsave(&dlfb->damage_lock, flags); 700 + dlfb->damage_x = min(x, dlfb->damage_x); 701 + dlfb->damage_x2 = max(x2, dlfb->damage_x2); 702 + dlfb->damage_y = min(y, dlfb->damage_y); 703 + dlfb->damage_y2 = max(y2, dlfb->damage_y2); 704 + spin_unlock_irqrestore(&dlfb->damage_lock, flags); 705 + 706 + schedule_work(&dlfb->damage_work); 666 707 } 667 708 668 709 /* ··· 734 679 (u32)info->var.yres); 735 680 736 681 dlfb_handle_damage(dlfb, 0, start, info->var.xres, 737 - lines, info->screen_base); 682 + lines); 738 683 } 739 684 740 685 return result; ··· 749 694 750 695 sys_copyarea(info, area); 751 696 752 - dlfb_handle_damage(dlfb, area->dx, area->dy, 753 - area->width, area->height, info->screen_base); 697 + dlfb_offload_damage(dlfb, area->dx, area->dy, 698 + area->width, area->height); 754 699 } 755 700 756 701 static void dlfb_ops_imageblit(struct fb_info *info, ··· 760 705 761 706 sys_imageblit(info, image); 762 707 763 - dlfb_handle_damage(dlfb, image->dx, image->dy, 764 - image->width, image->height, info->screen_base); 708 + dlfb_offload_damage(dlfb, image->dx, image->dy, 709 + image->width, image->height); 765 710 } 766 711 767 712 static void dlfb_ops_fillrect(struct fb_info *info, ··· 771 716 772 717 sys_fillrect(info, rect); 773 718 774 - dlfb_handle_damage(dlfb, rect->dx, rect->dy, rect->width, 775 - rect->height, info->screen_base); 719 + dlfb_offload_damage(dlfb, rect->dx, rect->dy, rect->width, 720 + rect->height); 776 721 } 777 722 778 723 /* ··· 794 739 int bytes_identical = 0; 795 740 int bytes_rendered = 0; 796 741 742 + mutex_lock(&dlfb->render_mutex); 743 + 797 744 if (!fb_defio) 798 - return; 745 + goto unlock_ret; 799 746 800 747 if (!atomic_read(&dlfb->usb_active)) 801 - return; 748 + goto unlock_ret; 802 749 803 750 start_cycles = get_cycles(); 804 751 805 752 urb = dlfb_get_urb(dlfb); 806 753 if (!urb) 807 - return; 754 + goto unlock_ret; 808 755 809 756 cmd = urb->transfer_buffer; 810 757 ··· 839 782 atomic_add(((unsigned int) ((end_cycles - start_cycles) 840 783 >> 10)), /* Kcycles */ 841 784 &dlfb->cpu_kcycles_used); 785 + unlock_ret: 786 + mutex_unlock(&dlfb->render_mutex); 842 787 } 843 788 844 789 static int dlfb_get_edid(struct dlfb_data *dlfb, char *edid, int len) ··· 918 859 if (area.y > info->var.yres) 919 860 area.y = info->var.yres; 920 861 921 - dlfb_handle_damage(dlfb, area.x, area.y, area.w, area.h, 922 - info->screen_base); 862 + dlfb_handle_damage(dlfb, area.x, area.y, area.w, area.h); 923 863 } 924 864 925 865 return 0; ··· 999 941 static void dlfb_ops_destroy(struct fb_info *info) 1000 942 { 1001 943 struct dlfb_data *dlfb = info->par; 944 + 945 + cancel_work_sync(&dlfb->damage_work); 946 + 947 + mutex_destroy(&dlfb->render_mutex); 1002 948 1003 949 if (info->cmap.len != 0) 1004 950 fb_dealloc_cmap(&info->cmap); ··· 1127 1065 pix_framebuffer[i] = 0x37e6; 1128 1066 } 1129 1067 1130 - dlfb_handle_damage(dlfb, 0, 0, info->var.xres, info->var.yres, 1131 - info->screen_base); 1068 + dlfb_handle_damage(dlfb, 0, 0, info->var.xres, info->var.yres); 1132 1069 1133 1070 return 0; 1134 1071 } ··· 1699 1638 info->pseudo_palette = dlfb->pseudo_palette; 1700 1639 dlfb->ops = dlfb_ops; 1701 1640 info->fbops = &dlfb->ops; 1641 + 1642 + mutex_init(&dlfb->render_mutex); 1643 + dlfb_init_damage(dlfb); 1644 + spin_lock_init(&dlfb->damage_lock); 1645 + INIT_WORK(&dlfb->damage_work, dlfb_damage_work); 1702 1646 1703 1647 INIT_LIST_HEAD(&info->modelist); 1704 1648
+8 -8
drivers/video/fbdev/uvesafb.c
··· 1543 1543 static ssize_t uvesafb_show_vbe_ver(struct device *dev, 1544 1544 struct device_attribute *attr, char *buf) 1545 1545 { 1546 - struct fb_info *info = platform_get_drvdata(to_platform_device(dev)); 1546 + struct fb_info *info = dev_get_drvdata(dev); 1547 1547 struct uvesafb_par *par = info->par; 1548 1548 1549 1549 return snprintf(buf, PAGE_SIZE, "%.4x\n", par->vbe_ib.vbe_version); ··· 1554 1554 static ssize_t uvesafb_show_vbe_modes(struct device *dev, 1555 1555 struct device_attribute *attr, char *buf) 1556 1556 { 1557 - struct fb_info *info = platform_get_drvdata(to_platform_device(dev)); 1557 + struct fb_info *info = dev_get_drvdata(dev); 1558 1558 struct uvesafb_par *par = info->par; 1559 1559 int ret = 0, i; 1560 1560 ··· 1573 1573 static ssize_t uvesafb_show_vendor(struct device *dev, 1574 1574 struct device_attribute *attr, char *buf) 1575 1575 { 1576 - struct fb_info *info = platform_get_drvdata(to_platform_device(dev)); 1576 + struct fb_info *info = dev_get_drvdata(dev); 1577 1577 struct uvesafb_par *par = info->par; 1578 1578 1579 1579 if (par->vbe_ib.oem_vendor_name_ptr) ··· 1588 1588 static ssize_t uvesafb_show_product_name(struct device *dev, 1589 1589 struct device_attribute *attr, char *buf) 1590 1590 { 1591 - struct fb_info *info = platform_get_drvdata(to_platform_device(dev)); 1591 + struct fb_info *info = dev_get_drvdata(dev); 1592 1592 struct uvesafb_par *par = info->par; 1593 1593 1594 1594 if (par->vbe_ib.oem_product_name_ptr) ··· 1603 1603 static ssize_t uvesafb_show_product_rev(struct device *dev, 1604 1604 struct device_attribute *attr, char *buf) 1605 1605 { 1606 - struct fb_info *info = platform_get_drvdata(to_platform_device(dev)); 1606 + struct fb_info *info = dev_get_drvdata(dev); 1607 1607 struct uvesafb_par *par = info->par; 1608 1608 1609 1609 if (par->vbe_ib.oem_product_rev_ptr) ··· 1618 1618 static ssize_t uvesafb_show_oem_string(struct device *dev, 1619 1619 struct device_attribute *attr, char *buf) 1620 1620 { 1621 - struct fb_info *info = platform_get_drvdata(to_platform_device(dev)); 1621 + struct fb_info *info = dev_get_drvdata(dev); 1622 1622 struct uvesafb_par *par = info->par; 1623 1623 1624 1624 if (par->vbe_ib.oem_string_ptr) ··· 1633 1633 static ssize_t uvesafb_show_nocrtc(struct device *dev, 1634 1634 struct device_attribute *attr, char *buf) 1635 1635 { 1636 - struct fb_info *info = platform_get_drvdata(to_platform_device(dev)); 1636 + struct fb_info *info = dev_get_drvdata(dev); 1637 1637 struct uvesafb_par *par = info->par; 1638 1638 1639 1639 return snprintf(buf, PAGE_SIZE, "%d\n", par->nocrtc); ··· 1642 1642 static ssize_t uvesafb_store_nocrtc(struct device *dev, 1643 1643 struct device_attribute *attr, const char *buf, size_t count) 1644 1644 { 1645 - struct fb_info *info = platform_get_drvdata(to_platform_device(dev)); 1645 + struct fb_info *info = dev_get_drvdata(dev); 1646 1646 struct uvesafb_par *par = info->par; 1647 1647 1648 1648 if (count > 0) {
+2 -2
drivers/video/fbdev/vesafb.c
··· 336 336 printk(KERN_INFO "vesafb: pmi: set display start = %p, set palette = %p\n",pmi_start,pmi_pal); 337 337 if (pmi_base[3]) { 338 338 printk(KERN_INFO "vesafb: pmi: ports = "); 339 - for (i = pmi_base[3]/2; pmi_base[i] != 0xffff; i++) 340 - printk("%x ",pmi_base[i]); 339 + for (i = pmi_base[3]/2; pmi_base[i] != 0xffff; i++) 340 + printk("%x ", pmi_base[i]); 341 341 printk("\n"); 342 342 if (pmi_base[i] != 0xffff) { 343 343 /*
+1 -1
drivers/video/fbdev/xen-fbfront.c
··· 677 677 case XenbusStateClosed: 678 678 if (dev->state == XenbusStateClosed) 679 679 break; 680 - /* Missed the backend's CLOSING state -- fallthrough */ 680 + /* fall through - Missed the backend's CLOSING state. */ 681 681 case XenbusStateClosing: 682 682 xenbus_frontend_closed(dev); 683 683 break;
-31
include/linux/amba/clcd.h
··· 124 124 struct amba_device; 125 125 struct clk; 126 126 127 - /** 128 - * struct clcd_vendor_data - holds hardware (IP-block) vendor-specific 129 - * variant information 130 - * 131 - * @clock_timregs: the CLCD needs to be clocked when accessing the 132 - * timer registers, or the hardware will hang. 133 - * @packed_24_bit_pixels: this variant supports 24bit packed pixel data, 134 - * so that RGB accesses 3 bytes at a time, not just on even 32bit 135 - * boundaries, packing the pixel data in memory. ST Microelectronics 136 - * have this. 137 - * @st_bitmux_control: ST Microelectronics have implemented output 138 - * bit line multiplexing into the CLCD control register. This indicates 139 - * that we need to use this. 140 - * @init_board: custom board init function for this variant 141 - * @init_panel: custom panel init function for this variant 142 - */ 143 - struct clcd_vendor_data { 144 - bool clock_timregs; 145 - bool packed_24_bit_pixels; 146 - bool st_bitmux_control; 147 - int (*init_board)(struct amba_device *adev, 148 - struct clcd_board *board); 149 - int (*init_panel)(struct clcd_fb *fb, 150 - struct device_node *panel); 151 - }; 152 - 153 127 /* this data structure describes each frame buffer device we find */ 154 128 struct clcd_fb { 155 129 struct fb_info fb; 156 130 struct amba_device *dev; 157 131 struct clk *clk; 158 - struct clcd_vendor_data *vendor; 159 132 struct clcd_panel *panel; 160 133 struct clcd_board *board; 161 134 void *board_data; ··· 229 256 val |= CNTL_LCDBPP16_565; 230 257 else 231 258 val |= CNTL_LCDBPP16_444; 232 - break; 233 - case 24: 234 - /* Modified variant supporting 24 bit packed pixels */ 235 - val |= CNTL_ST_LCDBPP24_PACKED; 236 259 break; 237 260 case 32: 238 261 val |= CNTL_LCDBPP24;
+7
include/video/udlfb.h
··· 48 48 int base8; 49 49 u32 pseudo_palette[256]; 50 50 int blank_mode; /*one of FB_BLANK_ */ 51 + struct mutex render_mutex; 52 + int damage_x; 53 + int damage_y; 54 + int damage_x2; 55 + int damage_y2; 56 + spinlock_t damage_lock; 57 + struct work_struct damage_work; 51 58 struct fb_ops ops; 52 59 /* blit-only rendering path metrics, exposed through sysfs */ 53 60 atomic_t bytes_rendered; /* raw pixel-bytes driver asked to render */