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linux
drm/xe: Dump CURRENT_LRCA register
Add CURRENT_LRCA to register dump to help debugging.
Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Wang Xin <x.wang@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20251016-xe3p-v3-9-3dd173a3097a@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
authored by
Wang Xin
and committed by
Lucas De Marchi
ccccbc53
c3d318b7
+3
+2
drivers/gpu/drm/xe/regs/xe_engine_regs.h
+2
drivers/gpu/drm/xe/regs/xe_engine_regs.h
···
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#define INHIBIT_SWITCH_UNTIL_PREEMPTED REG_BIT(31)
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#define IDLE_DELAY REG_GENMASK(20, 0)
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+
#define RING_CURRENT_LRCA(base) XE_REG((base) + 0x240)
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+
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#define RING_CONTEXT_CONTROL(base) XE_REG((base) + 0x244, XE_REG_OPTION_MASKED)
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#define CTX_CTRL_PXP_ENABLE REG_BIT(10)
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#define CTX_CTRL_OAC_CONTEXT_ENABLE REG_BIT(8)
+1
drivers/gpu/drm/xe/xe_guc_capture.c
+1
drivers/gpu/drm/xe/xe_guc_capture.c
···
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{ RING_IPEHR(0), REG_32BIT, 0, 0, 0, "IPEHR"}, \
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{ RING_INSTDONE(0), REG_32BIT, 0, 0, 0, "RING_INSTDONE"}, \
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{ INDIRECT_RING_STATE(0), REG_32BIT, 0, 0, 0, "INDIRECT_RING_STATE"}, \
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+
{ RING_CURRENT_LRCA(0), REG_32BIT, 0, 0, 0, "CURRENT_LRCA"}, \
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{ RING_ACTHD(0), REG_64BIT_LOW_DW, 0, 0, 0, NULL}, \
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{ RING_ACTHD_UDW(0), REG_64BIT_HI_DW, 0, 0, 0, "ACTHD"}, \
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{ RING_BBADDR(0), REG_64BIT_LOW_DW, 0, 0, 0, NULL}, \