Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

pinctrl: sh-pfc: r8a7796: Add DU support

Only the DU parallel RGB output signals are included, HDMI and TCON pins
will be added in separate groups. Based on a similar patch from Laurent
Pinchart for the r8a7795 PFC driver.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Niklas Söderlund and committed by
Geert Uytterhoeven
cccc618a 9c99a63e

+101
+101
drivers/pinctrl/sh-pfc/pfc-r8a7796.c
··· 1770 1770 RIF3_D1_B_MARK, 1771 1771 }; 1772 1772 1773 + /* - DU --------------------------------------------------------------------- */ 1774 + static const unsigned int du_rgb666_pins[] = { 1775 + /* R[7:2], G[7:2], B[7:2] */ 1776 + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), 1777 + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), 1778 + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), 1779 + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18), 1780 + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5), 1781 + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2), 1782 + }; 1783 + static const unsigned int du_rgb666_mux[] = { 1784 + DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK, 1785 + DU_DR3_MARK, DU_DR2_MARK, 1786 + DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK, 1787 + DU_DG3_MARK, DU_DG2_MARK, 1788 + DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK, 1789 + DU_DB3_MARK, DU_DB2_MARK, 1790 + }; 1791 + static const unsigned int du_rgb888_pins[] = { 1792 + /* R[7:0], G[7:0], B[7:0] */ 1793 + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), 1794 + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), 1795 + RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 8), 1796 + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), 1797 + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18), 1798 + RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16), 1799 + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5), 1800 + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2), 1801 + RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 0), 1802 + }; 1803 + static const unsigned int du_rgb888_mux[] = { 1804 + DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK, 1805 + DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK, 1806 + DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK, 1807 + DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK, 1808 + DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK, 1809 + DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK, 1810 + }; 1811 + static const unsigned int du_clk_out_0_pins[] = { 1812 + /* CLKOUT */ 1813 + RCAR_GP_PIN(1, 27), 1814 + }; 1815 + static const unsigned int du_clk_out_0_mux[] = { 1816 + DU_DOTCLKOUT0_MARK 1817 + }; 1818 + static const unsigned int du_clk_out_1_pins[] = { 1819 + /* CLKOUT */ 1820 + RCAR_GP_PIN(2, 3), 1821 + }; 1822 + static const unsigned int du_clk_out_1_mux[] = { 1823 + DU_DOTCLKOUT1_MARK 1824 + }; 1825 + static const unsigned int du_sync_pins[] = { 1826 + /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */ 1827 + RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4), 1828 + }; 1829 + static const unsigned int du_sync_mux[] = { 1830 + DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK 1831 + }; 1832 + static const unsigned int du_oddf_pins[] = { 1833 + /* EXDISP/EXODDF/EXCDE */ 1834 + RCAR_GP_PIN(2, 2), 1835 + }; 1836 + static const unsigned int du_oddf_mux[] = { 1837 + DU_EXODDF_DU_ODDF_DISP_CDE_MARK, 1838 + }; 1839 + static const unsigned int du_cde_pins[] = { 1840 + /* CDE */ 1841 + RCAR_GP_PIN(2, 0), 1842 + }; 1843 + static const unsigned int du_cde_mux[] = { 1844 + DU_CDE_MARK, 1845 + }; 1846 + static const unsigned int du_disp_pins[] = { 1847 + /* DISP */ 1848 + RCAR_GP_PIN(2, 1), 1849 + }; 1850 + static const unsigned int du_disp_mux[] = { 1851 + DU_DISP_MARK, 1852 + }; 1853 + 1773 1854 /* - I2C -------------------------------------------------------------------- */ 1774 1855 static const unsigned int i2c1_a_pins[] = { 1775 1856 /* SDA, SCL */ ··· 2363 2282 SH_PFC_PIN_GROUP(drif3_ctrl_b), 2364 2283 SH_PFC_PIN_GROUP(drif3_data0_b), 2365 2284 SH_PFC_PIN_GROUP(drif3_data1_b), 2285 + SH_PFC_PIN_GROUP(du_rgb666), 2286 + SH_PFC_PIN_GROUP(du_rgb888), 2287 + SH_PFC_PIN_GROUP(du_clk_out_0), 2288 + SH_PFC_PIN_GROUP(du_clk_out_1), 2289 + SH_PFC_PIN_GROUP(du_sync), 2290 + SH_PFC_PIN_GROUP(du_oddf), 2291 + SH_PFC_PIN_GROUP(du_cde), 2292 + SH_PFC_PIN_GROUP(du_disp), 2366 2293 SH_PFC_PIN_GROUP(i2c1_a), 2367 2294 SH_PFC_PIN_GROUP(i2c1_b), 2368 2295 SH_PFC_PIN_GROUP(i2c2_a), ··· 2489 2400 "drif3_data1_b", 2490 2401 }; 2491 2402 2403 + static const char * const du_groups[] = { 2404 + "du_rgb666", 2405 + "du_rgb888", 2406 + "du_clk_out_0", 2407 + "du_clk_out_1", 2408 + "du_sync", 2409 + "du_oddf", 2410 + "du_cde", 2411 + "du_disp", 2412 + }; 2413 + 2492 2414 static const char * const i2c1_groups[] = { 2493 2415 "i2c1_a", 2494 2416 "i2c1_b", ··· 2610 2510 SH_PFC_FUNCTION(drif1), 2611 2511 SH_PFC_FUNCTION(drif2), 2612 2512 SH_PFC_FUNCTION(drif3), 2513 + SH_PFC_FUNCTION(du), 2613 2514 SH_PFC_FUNCTION(i2c1), 2614 2515 SH_PFC_FUNCTION(i2c2), 2615 2516 SH_PFC_FUNCTION(i2c6),