Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: clock: exynosautov9: add dpum clock

Add dpum clock definitions and compatibles.

Also used clock name 'bus' instead of full clock name
dout_clkcmu_dpum_bus like other board cmu schema (GS101).

Signed-off-by: Kwanghoon Son <k.son@samsung.com>
Link: https://lore.kernel.org/r/20240809-clk_dpum-v3-1-359decc30fe2@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

authored by

Kwanghoon Son and committed by
Krzysztof Kozlowski
ccb41c44 b9dee49c

+30
+19
Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
··· 35 35 - samsung,exynosautov9-cmu-top 36 36 - samsung,exynosautov9-cmu-busmc 37 37 - samsung,exynosautov9-cmu-core 38 + - samsung,exynosautov9-cmu-dpum 38 39 - samsung,exynosautov9-cmu-fsys0 39 40 - samsung,exynosautov9-cmu-fsys1 40 41 - samsung,exynosautov9-cmu-fsys2 ··· 109 108 items: 110 109 - const: oscclk 111 110 - const: dout_clkcmu_core_bus 111 + 112 + - if: 113 + properties: 114 + compatible: 115 + contains: 116 + const: samsung,exynosautov9-cmu-dpum 117 + 118 + then: 119 + properties: 120 + clocks: 121 + items: 122 + - description: External reference clock (26 MHz) 123 + - description: DPU Main bus clock (from CMU_TOP) 124 + 125 + clock-names: 126 + items: 127 + - const: oscclk 128 + - const: bus 112 129 113 130 - if: 114 131 properties:
+11
include/dt-bindings/clock/samsung,exynosautov9.h
··· 179 179 #define CLK_GOUT_CORE_CCI_PCLK 4 180 180 #define CLK_GOUT_CORE_CMU_CORE_PCLK 5 181 181 182 + /* CMU_DPUM */ 183 + #define CLK_MOUT_DPUM_BUS_USER 1 184 + #define CLK_DOUT_DPUM_BUSP 2 185 + #define CLK_GOUT_DPUM_ACLK_DECON 3 186 + #define CLK_GOUT_DPUM_ACLK_DMA 4 187 + #define CLK_GOUT_DPUM_ACLK_DPP 5 188 + #define CLK_GOUT_DPUM_SYSMMU_D0_CLK 6 189 + #define CLK_GOUT_DPUM_SYSMMU_D1_CLK 7 190 + #define CLK_GOUT_DPUM_SYSMMU_D2_CLK 8 191 + #define CLK_GOUT_DPUM_SYSMMU_D3_CLK 9 192 + 182 193 /* CMU_FSYS0 */ 183 194 #define CLK_MOUT_FSYS0_BUS_USER 1 184 195 #define CLK_MOUT_FSYS0_PCIE_USER 2