Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: 5848/1: kill flush_ioremap_region()

There is not enough users to warrant its existence, and it is actually
an obstacle to progress with the new DMA API which cannot cover this
case properly.

To keep backward compatibility, let's perform the necessary custom
cache maintenance locally in the only driver affected.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Nicolas Pitre and committed by
Russell King
ccaf5f05 3067e02f

+11 -10
-7
arch/arm/include/asm/cacheflush.h
··· 465 465 */ 466 466 #define flush_icache_page(vma,page) do { } while (0) 467 467 468 - static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt, 469 - unsigned offset, size_t size) 470 - { 471 - const void *start = (void __force *)virt + offset; 472 - dmac_inv_range(start, start + size); 473 - } 474 - 475 468 /* 476 469 * flush_cache_vmap() is used when creating mappings (eg, via vmap, 477 470 * vmalloc, ioremap etc) in kernel space for pages. On non-VIPT
-1
arch/arm/mm/proc-syms.c
··· 28 28 EXPORT_SYMBOL(__cpuc_flush_user_range); 29 29 EXPORT_SYMBOL(__cpuc_coherent_kern_range); 30 30 EXPORT_SYMBOL(__cpuc_flush_dcache_page); 31 - EXPORT_SYMBOL(dmac_inv_range); /* because of flush_ioremap_region() */ 32 31 #else 33 32 EXPORT_SYMBOL(cpu_cache); 34 33 #endif
+11 -2
drivers/mtd/maps/pxa2xx-flash.c
··· 20 20 21 21 #include <asm/io.h> 22 22 #include <mach/hardware.h> 23 - #include <asm/cacheflush.h> 24 23 25 24 #include <asm/mach/flash.h> 25 + 26 + #define CACHELINESIZE 32 26 27 27 28 static void pxa2xx_map_inval_cache(struct map_info *map, unsigned long from, 28 29 ssize_t len) 29 30 { 30 - flush_ioremap_region(map->phys, map->cached, from, len); 31 + unsigned long start = (unsigned long)map->cached + from; 32 + unsigned long end = start + len; 33 + 34 + start &= ~(CACHELINESIZE - 1); 35 + while (start < end) { 36 + /* invalidate D cache line */ 37 + asm volatile ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)); 38 + start += CACHELINESIZE; 39 + } 31 40 } 32 41 33 42 struct pxa2xx_flash_info {