tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

wifi: rt2x00: rework MT7620 PA/LNA RF calibration

1. Move MT7620 PA/LNA calibration code to dedicated functions.
2. For external PA/LNA devices, restore RF and BBP registers before
R-Calibration.
3. Do Rx DCOC calibration again before RXIQ calibration.
4. Add some missing LNA related registers' initialization.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/TYAP286MB0315979F92DC563019B8F238BCD4A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM

authored by

Shiji Yang and committed by
Kalle Valo cca74bed a28533c6

+130 -52
+124 -52
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
··· 4468 4468 rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, bbp); 4469 4469 4470 4470 usleep_range(1000, 1500); 4471 - 4472 - if (test_bit(CAPABILITY_EXTERNAL_PA_TX0, 4473 - &rt2x00dev->cap_flags)) { 4474 - reg = rt2800_register_read(rt2x00dev, RF_CONTROL3); 4475 - reg |= 0x00000101; 4476 - rt2800_register_write(rt2x00dev, RF_CONTROL3, reg); 4477 - 4478 - reg = rt2800_register_read(rt2x00dev, RF_BYPASS3); 4479 - reg |= 0x00000101; 4480 - rt2800_register_write(rt2x00dev, RF_BYPASS3, reg); 4481 - 4482 - rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73); 4483 - rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73); 4484 - rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73); 4485 - rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27); 4486 - rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8); 4487 - rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4); 4488 - rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05); 4489 - rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27); 4490 - rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8); 4491 - rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4); 4492 - rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05); 4493 - rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27); 4494 - rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8); 4495 - rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4); 4496 - rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05); 4497 - rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00); 4498 - 4499 - rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 4500 - 0x36303636); 4501 - rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 4502 - 0x6C6C6B6C); 4503 - rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 4504 - 0x6C6C6B6C); 4505 - } 4506 4471 } 4507 4472 4508 4473 bbp = rt2800_bbp_read(rt2x00dev, 4); ··· 5577 5612 } 5578 5613 } 5579 5614 rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); 5580 - 5581 - if (rt2x00_rt(rt2x00dev, RT6352)) { 5582 - if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) { 5583 - rt2800_bbp_write(rt2x00dev, 75, 0x68); 5584 - rt2800_bbp_write(rt2x00dev, 76, 0x4C); 5585 - rt2800_bbp_write(rt2x00dev, 79, 0x1C); 5586 - rt2800_bbp_write(rt2x00dev, 80, 0x0C); 5587 - rt2800_bbp_write(rt2x00dev, 82, 0xB6); 5588 - } 5589 - } 5590 5615 } 5591 5616 EXPORT_SYMBOL_GPL(rt2800_vco_calibration); 5592 5617 ··· 10300 10345 rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0); 10301 10346 } 10302 10347 10348 + static void rt2800_restore_rf_bbp_rt6352(struct rt2x00_dev *rt2x00dev) 10349 + { 10350 + if (rt2x00_has_cap_external_pa(rt2x00dev)) { 10351 + rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x0); 10352 + rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0); 10353 + } 10354 + 10355 + if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) { 10356 + rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16); 10357 + rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23); 10358 + rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x02); 10359 + } 10360 + 10361 + if (rt2x00_has_cap_external_pa(rt2x00dev)) { 10362 + rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xd3); 10363 + rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xb3); 10364 + rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xd5); 10365 + rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27); 10366 + rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6c); 10367 + rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xfc); 10368 + rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1f); 10369 + rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27); 10370 + rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66); 10371 + rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xff); 10372 + rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1c); 10373 + rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20); 10374 + rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6b); 10375 + rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xf7); 10376 + rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09); 10377 + } 10378 + 10379 + if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) { 10380 + rt2800_bbp_write(rt2x00dev, 75, 0x60); 10381 + rt2800_bbp_write(rt2x00dev, 76, 0x44); 10382 + rt2800_bbp_write(rt2x00dev, 79, 0x1c); 10383 + rt2800_bbp_write(rt2x00dev, 80, 0x0c); 10384 + rt2800_bbp_write(rt2x00dev, 82, 0xB6); 10385 + } 10386 + 10387 + if (rt2x00_has_cap_external_pa(rt2x00dev)) { 10388 + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x3630363a); 10389 + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6c6c666c); 10390 + rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6c6c666c); 10391 + } 10392 + } 10393 + 10394 + static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev) 10395 + { 10396 + u32 reg; 10397 + 10398 + if (rt2x00_has_cap_external_pa(rt2x00dev) || 10399 + rt2x00_has_cap_external_lna_bg(rt2x00dev)) 10400 + rt2800_restore_rf_bbp_rt6352(rt2x00dev); 10401 + 10402 + rt2800_r_calibration(rt2x00dev); 10403 + rt2800_rf_self_txdc_cal(rt2x00dev); 10404 + rt2800_rxdcoc_calibration(rt2x00dev); 10405 + rt2800_bw_filter_calibration(rt2x00dev, true); 10406 + rt2800_bw_filter_calibration(rt2x00dev, false); 10407 + rt2800_loft_iq_calibration(rt2x00dev); 10408 + 10409 + /* missing DPD calibration for internal PA devices */ 10410 + 10411 + rt2800_rxdcoc_calibration(rt2x00dev); 10412 + rt2800_rxiq_calibration(rt2x00dev); 10413 + 10414 + if (!rt2x00_has_cap_external_pa(rt2x00dev) && 10415 + !rt2x00_has_cap_external_lna_bg(rt2x00dev)) 10416 + return; 10417 + 10418 + if (rt2x00_has_cap_external_pa(rt2x00dev)) { 10419 + reg = rt2800_register_read(rt2x00dev, RF_CONTROL3); 10420 + reg |= 0x00000101; 10421 + rt2800_register_write(rt2x00dev, RF_CONTROL3, reg); 10422 + 10423 + reg = rt2800_register_read(rt2x00dev, RF_BYPASS3); 10424 + reg |= 0x00000101; 10425 + rt2800_register_write(rt2x00dev, RF_BYPASS3, reg); 10426 + } 10427 + 10428 + if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) { 10429 + rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66); 10430 + rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20); 10431 + rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42); 10432 + } 10433 + 10434 + if (rt2x00_has_cap_external_pa(rt2x00dev)) { 10435 + rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73); 10436 + rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73); 10437 + rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73); 10438 + rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27); 10439 + rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xc8); 10440 + rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xa4); 10441 + rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05); 10442 + rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27); 10443 + rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xc8); 10444 + rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xa4); 10445 + rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05); 10446 + rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27); 10447 + rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xc8); 10448 + rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xa4); 10449 + rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05); 10450 + } 10451 + 10452 + if (rt2x00_has_cap_external_pa(rt2x00dev)) 10453 + rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00); 10454 + 10455 + if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) { 10456 + rt2800_bbp_write(rt2x00dev, 75, 0x68); 10457 + rt2800_bbp_write(rt2x00dev, 76, 0x4c); 10458 + rt2800_bbp_write(rt2x00dev, 79, 0x1c); 10459 + rt2800_bbp_write(rt2x00dev, 80, 0x0c); 10460 + rt2800_bbp_write(rt2x00dev, 82, 0xb6); 10461 + } 10462 + 10463 + if (rt2x00_has_cap_external_pa(rt2x00dev)) { 10464 + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x36303636); 10465 + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6c6c6b6c); 10466 + rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6c6c6b6c); 10467 + } 10468 + } 10469 + 10303 10470 static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev) 10304 10471 { 10305 10472 /* Initialize RF central register to default value */ ··· 10686 10609 rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00); 10687 10610 rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C); 10688 10611 10689 - rt2800_r_calibration(rt2x00dev); 10690 - rt2800_rf_self_txdc_cal(rt2x00dev); 10691 - rt2800_rxdcoc_calibration(rt2x00dev); 10692 - rt2800_bw_filter_calibration(rt2x00dev, true); 10693 - rt2800_bw_filter_calibration(rt2x00dev, false); 10694 - rt2800_loft_iq_calibration(rt2x00dev); 10695 - rt2800_rxiq_calibration(rt2x00dev); 10612 + /* Do calibration and init PA/LNA */ 10613 + rt2800_calibration_rt6352(rt2x00dev); 10696 10614 } 10697 10615 10698 10616 static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
+6
drivers/net/wireless/ralink/rt2x00/rt2x00.h
··· 1263 1263 } 1264 1264 1265 1265 static inline bool 1266 + rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev) 1267 + { 1268 + return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0); 1269 + } 1270 + 1271 + static inline bool 1266 1272 rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev) 1267 1273 { 1268 1274 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA);