Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: move build test pattern params as part of pipe resource update for odm

[why]
Move built test pattern as part of pipe resource update for odm to ensure we rebuild
test pattern params every time we have an ODM update

Reviewed-by: George Shen <george.shen@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Wenjing Liu and committed by
Alex Deucher
cc520964 e779f458

+37 -9
+15 -9
drivers/gpu/drm/amd/display/dc/core/dc.c
··· 3235 3235 BREAK_TO_DEBUGGER(); 3236 3236 goto fail; 3237 3237 } 3238 - 3239 - for (i = 0; i < context->stream_count; i++) { 3240 - struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(&context->res_ctx, 3241 - context->streams[i]); 3242 - 3243 - if (otg_master && otg_master->stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE) 3244 - resource_build_test_pattern_params(&context->res_ctx, otg_master); 3245 - } 3246 3238 } 3247 3239 update_seamless_boot_flags(dc, context, surface_count, stream); 3248 3240 ··· 3330 3338 } 3331 3339 3332 3340 if (stream_update->pending_test_pattern) { 3333 - dc_link_dp_set_test_pattern(stream->link, 3341 + /* 3342 + * test pattern params depends on ODM topology 3343 + * changes that we could be applying to front 3344 + * end. Since at the current stage front end 3345 + * changes are not yet applied. We can only 3346 + * apply test pattern in hw based on current 3347 + * state and populate the final test pattern 3348 + * params in new state. If current and new test 3349 + * pattern params are different as result of 3350 + * different ODM topology being used, it will be 3351 + * detected and handle during front end 3352 + * programming update. 3353 + */ 3354 + dc->link_srv->dp_set_test_pattern(stream->link, 3334 3355 stream->test_pattern.type, 3335 3356 stream->test_pattern.color_space, 3336 3357 stream->test_pattern.p_link_settings, 3337 3358 stream->test_pattern.p_custom_pattern, 3338 3359 stream->test_pattern.cust_pattern_size); 3360 + resource_build_test_pattern_params(&context->res_ctx, pipe_ctx); 3339 3361 } 3340 3362 3341 3363 if (stream_update->dpms_off) {
+7
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
··· 1457 1457 controller_color_space = convert_dp_to_controller_color_space( 1458 1458 otg_master->stream->test_pattern.color_space); 1459 1459 1460 + if (controller_test_pattern == CONTROLLER_DP_TEST_PATTERN_VIDEOMODE) 1461 + return; 1462 + 1460 1463 odm_cnt = resource_get_opp_heads_for_otg_master(otg_master, res_ctx, opp_heads); 1461 1464 1462 1465 odm_slice_width = h_active / odm_cnt; ··· 2328 2325 2329 2326 if (pool->funcs->build_pipe_pix_clk_params) 2330 2327 pool->funcs->build_pipe_pix_clk_params(otg_master); 2328 + 2329 + if (otg_master->stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE) 2330 + resource_build_test_pattern_params(&context->res_ctx, otg_master); 2331 2331 return result; 2332 2332 } 2333 2333 ··· 5088 5082 { 5089 5083 dml2_options->callbacks.dc = dc; 5090 5084 dml2_options->callbacks.build_scaling_params = &resource_build_scaling_params; 5085 + dml2_options->callbacks.build_test_pattern_params = &resource_build_test_pattern_params; 5091 5086 dml2_options->callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy; 5092 5087 dml2_options->callbacks.update_pipes_for_stream_with_slice_count = &resource_update_pipes_for_stream_with_slice_count; 5093 5088 dml2_options->callbacks.update_pipes_for_plane_with_slice_count = &resource_update_pipes_for_plane_with_slice_count;
+8
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
··· 2115 2115 return false; 2116 2116 } 2117 2117 } 2118 + 2119 + for (i = 0; i < context->stream_count; i++) { 2120 + struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(&context->res_ctx, 2121 + context->streams[i]); 2122 + 2123 + if (otg_master && otg_master->stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE) 2124 + resource_build_test_pattern_params(&context->res_ctx, otg_master); 2125 + } 2118 2126 } 2119 2127 return true; 2120 2128 }
+6
drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
··· 1078 1078 ASSERT(false); 1079 1079 } 1080 1080 } 1081 + 1082 + if (ctx->config.callbacks.build_test_pattern_params && 1083 + pipe->stream && 1084 + pipe->prev_odm_pipe == NULL && 1085 + pipe->top_pipe == NULL) 1086 + ctx->config.callbacks.build_test_pattern_params(&state->res_ctx, pipe); 1081 1087 } 1082 1088 1083 1089 return true;
+1
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h
··· 71 71 struct dml2_dc_callbacks { 72 72 struct dc *dc; 73 73 bool (*build_scaling_params)(struct pipe_ctx *pipe_ctx); 74 + void (*build_test_pattern_params)(struct resource_context *res_ctx, struct pipe_ctx *otg_master); 74 75 bool (*can_support_mclk_switch_using_fw_based_vblank_stretch)(struct dc *dc, struct dc_state *context); 75 76 bool (*acquire_secondary_pipe_for_mpc_odm)(const struct dc *dc, struct dc_state *state, struct pipe_ctx *pri_pipe, struct pipe_ctx *sec_pipe, bool odm); 76 77 bool (*update_pipes_for_stream_with_slice_count)(