[ARM] 4512/1: S3C: rename the debug macros for per-cpu updates

Update the debug macros for use with the new per-cpu
configuration and usage.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Ben Dooks and committed by Russell King cbc4dbff b2627588

+53 -6
+33 -4
include/asm-arm/arch-s3c2410/debug-macro.S
··· 14 14 15 15 #include <asm/arch/map.h> 16 16 #include <asm/arch/regs-gpio.h> 17 - 18 17 #include <asm/plat-s3c/regs-serial.h> 19 - #include <asm/plat-s3c/debug-macro.S> 20 18 21 19 #define S3C2410_UART1_OFF (0x4000) 22 20 #define SHIFT_2440TXF (14-9) ··· 29 31 #endif 30 32 .endm 31 33 32 - .macro fifo_full rd, rx 34 + .macro fifo_full_s3c24xx rd, rx 33 35 @ check for arm920 vs arm926. currently assume all arm926 34 36 @ devices have an 64 byte FIFO identical to the s3c2440 35 37 mrc p15, 0, \rd, c0, c0 ··· 50 52 tst \rd, #S3C2410_UFSTAT_TXFULL 51 53 .endm 52 54 53 - .macro fifo_level rd, rx 55 + .macro fifo_full_s3c2410 rd, rx 56 + ldr \rd, [ \rx, # S3C2410_UFSTAT ] 57 + tst \rd, #S3C2410_UFSTAT_TXFULL 58 + .endm 59 + 60 + /* fifo level reading */ 61 + 62 + .macro fifo_level_s3c24xx rd, rx 54 63 mrc p15, 0, \rd, c1, c0 55 64 tst \rd, #1 56 65 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) ··· 71 66 andne \rd, \rd, #S3C2410_UFSTAT_TXMASK 72 67 andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK 73 68 .endm 69 + 70 + .macro fifo_level_s3c2410 rd, rx 71 + ldr \rd, [ \rx, # S3C2410_UFSTAT ] 72 + and \rd, \rd, #S3C2410_UFSTAT_TXMASK 73 + .endm 74 + 75 + /* Select the correct implementation depending on the configuration. The 76 + * S3C2440 will get selected by default, as these are the most widely 77 + * used variants of these 78 + */ 79 + 80 + #if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY) 81 + #define fifo_full fifo_full_s3c2410 82 + #define fifo_level fifo_level_s3c2410 83 + #warning 2410only 84 + #elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY) 85 + #define fifo_full fifo_full_s3c24xx 86 + #define fifo_level fifo_level_s3c24xx 87 + #warning generic 88 + #endif 89 + 90 + /* include the reset of the code which will do the work */ 91 + 92 + #include <asm/plat-s3c/debug-macro.S>
+20 -2
include/asm-arm/plat-s3c/debug-macro.S
··· 11 11 12 12 #include <asm/plat-s3c/regs-serial.h> 13 13 14 - #define S3C2410_UART1_OFF (0x4000) 14 + /* The S3C2440 implementations are used by default as they are the 15 + * most widely re-used */ 16 + 17 + .macro fifo_level_s3c2440 rd, rx 18 + ldr \rd, [ \rx, # S3C2410_UFSTAT ] 19 + and \rd, \rd, #S3C2440_UFSTAT_TXMASK 20 + .endm 21 + 22 + #ifndef fifo_level 23 + #define fifo_level fifo_level_s3c2410 24 + #endif 25 + 26 + .macro fifo_full_s3c2440 rd, rx 27 + ldr \rd, [ \rx, # S3C2410_UFSTAT ] 28 + tst \rd, #S3C2440_UFSTAT_TXFULL 29 + .endm 30 + 31 + #ifndef fifo_full 32 + #define fifo_full fifo_full_s3c2440 33 + #endif 15 34 16 35 .macro senduart,rd,rx 17 36 strb \rd, [\rx, # S3C2410_UTXH ] ··· 56 37 .endm 57 38 58 39 .macro waituart,rd,rx 59 - 60 40 ldr \rd, [ \rx, # S3C2410_UFCON ] 61 41 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? 62 42 beq 1001f @