tjh.dev / kernel
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staging: comedi: 8253.h: tidy up the i8253_cascade_ns_to_timer*() users

Introduce a couple defines for the common 8254 oscillator base values
used in the comedi drivers and remove the custom defines and open
coded values.

Change the i8253_cascade_ns_to_timer_2div() calls in the drivers to
the more generic i8253_cascade_ns_to_timer(). They are identical due
to the #define in the 8253.h header.

Remove the extra mask by TRIG_ROUND_MASK of the 'round_mode' parameter
to i8253_cascade_ns_to_timer(). That function already handles the mask.

Tidy up all the calls to i8253_cascade_ns_to_timer().

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

H Hartley Sweeten and committed by
Greg Kroah-Hartman cb9cfd7e fa57560c

+161 -181
+9
drivers/staging/comedi/drivers/8253.h
··· 21 21 22 22 #include "../comedi.h" 23 23 24 + /* 25 + * Common oscillator base values in nanoseconds 26 + */ 27 + #define I8254_OSC_BASE_10MHZ 100 28 + #define I8254_OSC_BASE_5MHZ 200 29 + #define I8254_OSC_BASE_4MHZ 250 30 + #define I8254_OSC_BASE_2MHZ 500 31 + #define I8254_OSC_BASE_1MHZ 1000 32 + 24 33 #define i8253_cascade_ns_to_timer i8253_cascade_ns_to_timer_2div 25 34 26 35 static inline void i8253_cascade_ns_to_timer_2div_old(int i8253_osc_base,
+4 -7
drivers/staging/comedi/drivers/adl_pci9111.c
··· 86 86 #define PCI9111_AI_INSTANT_READ_UDELAY_US 2 87 87 #define PCI9111_AI_INSTANT_READ_TIMEOUT 100 88 88 89 - #define PCI9111_8254_CLOCK_PERIOD_NS 500 90 - 91 89 /* 92 90 * IO address map and bit defines 93 91 */ ··· 391 393 392 394 if (cmd->convert_src == TRIG_TIMER) { 393 395 tmp = cmd->convert_arg; 394 - i8253_cascade_ns_to_timer_2div(PCI9111_8254_CLOCK_PERIOD_NS, 395 - &dev_private->div1, 396 - &dev_private->div2, 397 - &cmd->convert_arg, 398 - cmd->flags & TRIG_ROUND_MASK); 396 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ, 397 + &dev_private->div1, 398 + &dev_private->div2, 399 + &cmd->convert_arg, cmd->flags); 399 400 if (tmp != cmd->convert_arg) 400 401 error++; 401 402 }
+9 -8
drivers/staging/comedi/drivers/adl_pci9118.c
··· 792 792 case 4: 793 793 if (*tim2 < this_board->ai_ns_min) 794 794 *tim2 = this_board->ai_ns_min; 795 - i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, div1, div2, 795 + i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, 796 + div1, div2, 796 797 tim2, flags & TRIG_ROUND_NEAREST); 797 798 break; 798 799 case 2: ··· 1278 1277 1279 1278 if (cmd->scan_begin_src == TRIG_TIMER) { 1280 1279 tmp = cmd->scan_begin_arg; 1281 - i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, &divisor1, 1282 - &divisor2, &cmd->scan_begin_arg, 1283 - cmd->flags & TRIG_ROUND_MASK); 1280 + i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, 1281 + &divisor1, &divisor2, 1282 + &cmd->scan_begin_arg, cmd->flags); 1284 1283 if (cmd->scan_begin_arg < this_board->ai_ns_min) 1285 1284 cmd->scan_begin_arg = this_board->ai_ns_min; 1286 1285 if (tmp != cmd->scan_begin_arg) ··· 1289 1288 1290 1289 if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW)) { 1291 1290 tmp = cmd->convert_arg; 1292 - i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, &divisor1, 1293 - &divisor2, &cmd->convert_arg, 1294 - cmd->flags & TRIG_ROUND_MASK); 1291 + i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, 1292 + &divisor1, &divisor2, 1293 + &cmd->convert_arg, cmd->flags); 1295 1294 if (cmd->convert_arg < this_board->ai_ns_min) 1296 1295 cmd->convert_arg = this_board->ai_ns_min; 1297 1296 if (tmp != cmd->convert_arg) ··· 2087 2086 s->insn_bits = pci9118_insn_bits_do; 2088 2087 2089 2088 devpriv->valid = 1; 2090 - devpriv->i8254_osc_base = 250; /* 250ns=4MHz */ 2089 + devpriv->i8254_osc_base = I8254_OSC_BASE_4MHZ; 2091 2090 devpriv->ai_maskharderr = 0x10a; 2092 2091 /* default measure crash condition */ 2093 2092 if (hw_err_mask) /* disable some requested */
+8 -7
drivers/staging/comedi/drivers/adv_pci1710.c
··· 1005 1005 } else { 1006 1006 devpriv->ai_et = 0; 1007 1007 } 1008 - i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, &divisor1, 1009 - &divisor2, &devpriv->ai_timer1, 1010 - devpriv->ai_flags & TRIG_ROUND_MASK); 1008 + i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, 1009 + &divisor1, &divisor2, 1010 + &devpriv->ai_timer1, 1011 + devpriv->ai_flags); 1011 1012 outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL); 1012 1013 if (mode != 2) { 1013 1014 /* start pacer */ ··· 1087 1086 1088 1087 if (cmd->convert_src == TRIG_TIMER) { 1089 1088 tmp = cmd->convert_arg; 1090 - i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, &divisor1, 1091 - &divisor2, &cmd->convert_arg, 1092 - cmd->flags & TRIG_ROUND_MASK); 1089 + i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, 1090 + &divisor1, &divisor2, 1091 + &cmd->convert_arg, cmd->flags); 1093 1092 if (cmd->convert_arg < this_board->ai_ns_min) 1094 1093 cmd->convert_arg = this_board->ai_ns_min; 1095 1094 if (tmp != cmd->convert_arg) ··· 1285 1284 s->do_cmdtest = pci171x_ai_cmdtest; 1286 1285 s->do_cmd = pci171x_ai_cmd; 1287 1286 } 1288 - devpriv->i8254_osc_base = 100; /* 100ns=10MHz */ 1287 + devpriv->i8254_osc_base = I8254_OSC_BASE_10MHZ; 1289 1288 subdev++; 1290 1289 } 1291 1290
+16 -20
drivers/staging/comedi/drivers/amplc_pci224.c
··· 215 215 #define CLK_EXT 7 /* external clock */ 216 216 /* Macro to construct clock input configuration register value. */ 217 217 #define CLK_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7)) 218 - /* Timebases in ns. */ 219 - #define TIMEBASE_10MHZ 100 220 - #define TIMEBASE_1MHZ 1000 221 - #define TIMEBASE_100KHZ 10000 222 - #define TIMEBASE_10KHZ 100000 223 - #define TIMEBASE_1KHZ 1000000 224 218 225 219 /* 226 220 * Counter/timer gate input configuration sources. ··· 837 843 switch (round_mode) { 838 844 case TRIG_ROUND_NEAREST: 839 845 default: 840 - round = TIMEBASE_10MHZ / 2; 846 + round = I8254_OSC_BASE_10MHZ / 2; 841 847 break; 842 848 case TRIG_ROUND_DOWN: 843 849 round = 0; 844 850 break; 845 851 case TRIG_ROUND_UP: 846 - round = TIMEBASE_10MHZ - 1; 852 + round = I8254_OSC_BASE_10MHZ - 1; 847 853 break; 848 854 } 849 855 /* Be careful to avoid overflow! */ 850 - div2 = cmd->scan_begin_arg / TIMEBASE_10MHZ; 851 - div2 += (round + cmd->scan_begin_arg % TIMEBASE_10MHZ) / 852 - TIMEBASE_10MHZ; 856 + div2 = cmd->scan_begin_arg / I8254_OSC_BASE_10MHZ; 857 + div2 += (round + cmd->scan_begin_arg % I8254_OSC_BASE_10MHZ) / 858 + I8254_OSC_BASE_10MHZ; 853 859 if (div2 <= 0x10000) { 854 860 /* A single timer will suffice. */ 855 861 if (div2 < 2) 856 862 div2 = 2; 857 - cmd->scan_begin_arg = div2 * TIMEBASE_10MHZ; 863 + cmd->scan_begin_arg = div2 * I8254_OSC_BASE_10MHZ; 858 864 if (cmd->scan_begin_arg < div2 || 859 - cmd->scan_begin_arg < TIMEBASE_10MHZ) { 865 + cmd->scan_begin_arg < I8254_OSC_BASE_10MHZ) { 860 866 /* Overflow! */ 861 867 cmd->scan_begin_arg = MAX_SCAN_PERIOD; 862 868 } ··· 864 870 /* Use two timers. */ 865 871 div1 = devpriv->cached_div1; 866 872 div2 = devpriv->cached_div2; 867 - pci224_cascade_ns_to_timer(TIMEBASE_10MHZ, &div1, &div2, 873 + pci224_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 874 + &div1, &div2, 868 875 &cmd->scan_begin_arg, 869 876 round_mode); 870 877 devpriv->cached_div1 = div1; ··· 997 1002 switch (round_mode) { 998 1003 case TRIG_ROUND_NEAREST: 999 1004 default: 1000 - round = TIMEBASE_10MHZ / 2; 1005 + round = I8254_OSC_BASE_10MHZ / 2; 1001 1006 break; 1002 1007 case TRIG_ROUND_DOWN: 1003 1008 round = 0; 1004 1009 break; 1005 1010 case TRIG_ROUND_UP: 1006 - round = TIMEBASE_10MHZ - 1; 1011 + round = I8254_OSC_BASE_10MHZ - 1; 1007 1012 break; 1008 1013 } 1009 1014 /* Be careful to avoid overflow! */ 1010 - div2 = cmd->scan_begin_arg / TIMEBASE_10MHZ; 1011 - div2 += (round + cmd->scan_begin_arg % TIMEBASE_10MHZ) / 1012 - TIMEBASE_10MHZ; 1015 + div2 = cmd->scan_begin_arg / I8254_OSC_BASE_10MHZ; 1016 + div2 += (round + cmd->scan_begin_arg % I8254_OSC_BASE_10MHZ) / 1017 + I8254_OSC_BASE_10MHZ; 1013 1018 if (div2 <= 0x10000) { 1014 1019 /* A single timer will suffice. */ 1015 1020 if (div2 < 2) ··· 1020 1025 /* Use two timers. */ 1021 1026 div1 = devpriv->cached_div1; 1022 1027 div2 = devpriv->cached_div2; 1023 - pci224_cascade_ns_to_timer(TIMEBASE_10MHZ, &div1, &div2, 1028 + pci224_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 1029 + &div1, &div2, 1024 1030 &ns, round_mode); 1025 1031 } 1026 1032
+6 -6
drivers/staging/comedi/drivers/cb_das16_cs.c
··· 234 234 unsigned int div1 = 0, div2 = 0; 235 235 236 236 tmp = cmd->scan_begin_arg; 237 - i8253_cascade_ns_to_timer(100, &div1, &div2, 238 - &cmd->scan_begin_arg, 239 - cmd->flags & TRIG_ROUND_MASK); 237 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 238 + &div1, &div2, 239 + &cmd->scan_begin_arg, cmd->flags); 240 240 if (tmp != cmd->scan_begin_arg) 241 241 err++; 242 242 } ··· 244 244 unsigned int div1 = 0, div2 = 0; 245 245 246 246 tmp = cmd->convert_arg; 247 - i8253_cascade_ns_to_timer(100, &div1, &div2, 248 - &cmd->scan_begin_arg, 249 - cmd->flags & TRIG_ROUND_MASK); 247 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 248 + &div1, &div2, 249 + &cmd->scan_begin_arg, cmd->flags); 250 250 if (tmp != cmd->convert_arg) 251 251 err++; 252 252 if (cmd->scan_begin_src == TRIG_TIMER &&
+19 -24
drivers/staging/comedi/drivers/cb_pcidas.c
··· 73 73 #include "amcc_s5933.h" 74 74 #include "comedi_fc.h" 75 75 76 - #define TIMER_BASE 100 /* 10MHz master clock */ 77 76 #define AI_BUFFER_SIZE 1024 /* max ai fifo size */ 78 77 #define AO_BUFFER_SIZE 1024 /* max ao fifo size */ 79 78 #define NUM_CHANNELS_8800 8 ··· 879 880 880 881 if (cmd->scan_begin_src == TRIG_TIMER) { 881 882 tmp = cmd->scan_begin_arg; 882 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, 883 - &(devpriv->divisor1), 884 - &(devpriv->divisor2), 885 - &(cmd->scan_begin_arg), 886 - cmd->flags & TRIG_ROUND_MASK); 883 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 884 + &devpriv->divisor1, 885 + &devpriv->divisor2, 886 + &cmd->scan_begin_arg, cmd->flags); 887 887 if (tmp != cmd->scan_begin_arg) 888 888 err++; 889 889 } 890 890 if (cmd->convert_src == TRIG_TIMER) { 891 891 tmp = cmd->convert_arg; 892 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, 893 - &(devpriv->divisor1), 894 - &(devpriv->divisor2), 895 - &(cmd->convert_arg), 896 - cmd->flags & TRIG_ROUND_MASK); 892 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 893 + &devpriv->divisor1, 894 + &devpriv->divisor2, 895 + &cmd->convert_arg, cmd->flags); 897 896 if (tmp != cmd->convert_arg) 898 897 err++; 899 898 } ··· 929 932 { 930 933 struct cb_pcidas_private *devpriv = dev->private; 931 934 932 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, &(devpriv->divisor1), 933 - &(devpriv->divisor2), ns, 934 - rounding_flags & TRIG_ROUND_MASK); 935 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 936 + &devpriv->divisor1, &devpriv->divisor2, 937 + ns, rounding_flags); 935 938 936 939 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */ 937 940 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 1, ··· 1081 1084 1082 1085 if (cmd->scan_begin_src == TRIG_TIMER) { 1083 1086 tmp = cmd->scan_begin_arg; 1084 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, 1085 - &(devpriv->ao_divisor1), 1086 - &(devpriv->ao_divisor2), 1087 - &(cmd->scan_begin_arg), 1088 - cmd->flags & TRIG_ROUND_MASK); 1087 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 1088 + &devpriv->ao_divisor1, 1089 + &devpriv->ao_divisor2, 1090 + &cmd->scan_begin_arg, cmd->flags); 1089 1091 if (tmp != cmd->scan_begin_arg) 1090 1092 err++; 1091 1093 } ··· 1205 1209 1206 1210 /* load counters */ 1207 1211 if (cmd->scan_begin_src == TRIG_TIMER) { 1208 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, 1209 - &(devpriv->ao_divisor1), 1210 - &(devpriv->ao_divisor2), 1211 - &(cmd->scan_begin_arg), 1212 - cmd->flags); 1212 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 1213 + &devpriv->ao_divisor1, 1214 + &devpriv->ao_divisor2, 1215 + &cmd->scan_begin_arg, cmd->flags); 1213 1216 1214 1217 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */ 1215 1218 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 1,
+16 -19
drivers/staging/comedi/drivers/das16.c
··· 675 675 if (cmd->scan_begin_src == TRIG_TIMER) { 676 676 unsigned int tmp = cmd->scan_begin_arg; 677 677 /* set divisors, correct timing arguments */ 678 - i8253_cascade_ns_to_timer_2div(devpriv->clockbase, 679 - &devpriv->divisor1, 680 - &devpriv->divisor2, 681 - &cmd->scan_begin_arg, 682 - cmd->flags & TRIG_ROUND_MASK); 678 + i8253_cascade_ns_to_timer(devpriv->clockbase, 679 + &devpriv->divisor1, 680 + &devpriv->divisor2, 681 + &cmd->scan_begin_arg, cmd->flags); 683 682 err += (tmp != cmd->scan_begin_arg); 684 683 } 685 684 if (cmd->convert_src == TRIG_TIMER) { 686 685 unsigned int tmp = cmd->convert_arg; 687 686 /* set divisors, correct timing arguments */ 688 - i8253_cascade_ns_to_timer_2div(devpriv->clockbase, 689 - &devpriv->divisor1, 690 - &devpriv->divisor2, 691 - &cmd->convert_arg, 692 - cmd->flags & TRIG_ROUND_MASK); 687 + i8253_cascade_ns_to_timer(devpriv->clockbase, 688 + &devpriv->divisor1, 689 + &devpriv->divisor2, 690 + &cmd->convert_arg, cmd->flags); 693 691 err += (tmp != cmd->convert_arg); 694 692 } 695 693 if (err) ··· 723 725 struct das16_private_struct *devpriv = dev->private; 724 726 unsigned long timer_base = dev->iobase + DAS16_TIMER_BASE_REG; 725 727 726 - i8253_cascade_ns_to_timer_2div(devpriv->clockbase, 727 - &devpriv->divisor1, 728 - &devpriv->divisor2, 729 - &ns, 730 - rounding_flags & TRIG_ROUND_MASK); 728 + i8253_cascade_ns_to_timer(devpriv->clockbase, 729 + &devpriv->divisor1, &devpriv->divisor2, 730 + &ns, rounding_flags); 731 731 732 732 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */ 733 733 i8254_load(timer_base, 0, 1, devpriv->divisor1, 2); ··· 1032 1036 status = inb(dev->iobase + DAS1600_STATUS_REG); 1033 1037 1034 1038 if (status & DAS1600_STATUS_CLK_10MHZ) 1035 - devpriv->clockbase = 100; 1039 + devpriv->clockbase = I8254_OSC_BASE_10MHZ; 1036 1040 else 1037 - devpriv->clockbase = 1000; 1041 + devpriv->clockbase = I8254_OSC_BASE_1MHZ; 1038 1042 } else { 1039 1043 if (it->options[3]) 1040 - devpriv->clockbase = 1000 / it->options[3]; 1044 + devpriv->clockbase = I8254_OSC_BASE_1MHZ / 1045 + it->options[3]; 1041 1046 else 1042 - devpriv->clockbase = 1000; /* 1 MHz default */ 1047 + devpriv->clockbase = I8254_OSC_BASE_1MHZ; 1043 1048 } 1044 1049 1045 1050 /* initialize dma */
+8 -10
drivers/staging/comedi/drivers/das16m1.c
··· 63 63 #define DAS16M1_SIZE 16 64 64 #define DAS16M1_SIZE2 8 65 65 66 - #define DAS16M1_XTAL 100 /* 10 MHz master clock */ 67 - 68 66 #define FIFO_SIZE 1024 /* 1024 sample fifo */ 69 67 70 68 /* ··· 205 207 if (cmd->convert_src == TRIG_TIMER) { 206 208 tmp = cmd->convert_arg; 207 209 /* calculate counter values that give desired timing */ 208 - i8253_cascade_ns_to_timer_2div(DAS16M1_XTAL, 209 - &(devpriv->divisor1), 210 - &(devpriv->divisor2), 211 - &(cmd->convert_arg), 212 - cmd->flags & TRIG_ROUND_MASK); 210 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ, 211 + &devpriv->divisor1, 212 + &devpriv->divisor2, 213 + &cmd->convert_arg, cmd->flags); 213 214 if (tmp != cmd->convert_arg) 214 215 err++; 215 216 } ··· 247 250 { 248 251 struct das16m1_private_struct *devpriv = dev->private; 249 252 250 - i8253_cascade_ns_to_timer_2div(DAS16M1_XTAL, &(devpriv->divisor1), 251 - &(devpriv->divisor2), &ns, 252 - rounding_flags & TRIG_ROUND_MASK); 253 + i8253_cascade_ns_to_timer_2div(I8254_OSC_BASE_10MHZ, 254 + &devpriv->divisor1, 255 + &devpriv->divisor2, 256 + &ns, rounding_flags); 253 257 254 258 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */ 255 259 i8254_load(dev->iobase + DAS16M1_8254_SECOND, 0, 1, devpriv->divisor1,
+18 -26
drivers/staging/comedi/drivers/das1800.c
··· 108 108 /* misc. defines */ 109 109 #define DAS1800_SIZE 16 /* uses 16 io addresses */ 110 110 #define FIFO_SIZE 1024 /* 1024 sample fifo */ 111 - #define TIMER_BASE 200 /* 5 Mhz master clock */ 112 111 #define UNIPOLAR 0x4 /* bit that determines whether input range is uni/bipolar */ 113 112 #define DMA_BUF_SIZE 0x1ff00 /* size in bytes of dma buffers */ 114 113 ··· 838 839 if (cmd->scan_begin_src == TRIG_FOLLOW) { 839 840 tmp_arg = cmd->convert_arg; 840 841 /* calculate counter values that give desired timing */ 841 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, 842 - &(devpriv->divisor1), 843 - &(devpriv->divisor2), 844 - &(cmd->convert_arg), 845 - cmd-> 846 - flags & TRIG_ROUND_MASK); 842 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_5MHZ, 843 + &devpriv->divisor1, 844 + &devpriv->divisor2, 845 + &cmd->convert_arg, 846 + cmd->flags); 847 847 if (tmp_arg != cmd->convert_arg) 848 848 err++; 849 849 } ··· 867 869 } 868 870 tmp_arg = cmd->scan_begin_arg; 869 871 /* calculate counter values that give desired timing */ 870 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, 871 - &(devpriv-> 872 - divisor1), 873 - &(devpriv-> 874 - divisor2), 875 - &(cmd-> 876 - scan_begin_arg), 877 - cmd-> 878 - flags & 879 - TRIG_ROUND_MASK); 872 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_5MHZ, 873 + &devpriv->divisor1, 874 + &devpriv->divisor2, 875 + &cmd->scan_begin_arg, 876 + cmd->flags); 880 877 if (tmp_arg != cmd->scan_begin_arg) 881 878 err++; 882 879 } ··· 1003 1010 if (cmd->convert_src == TRIG_TIMER) { 1004 1011 /* set conversion frequency */ 1005 1012 period = cmd->convert_arg; 1006 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, 1007 - &devpriv->divisor1, 1008 - &devpriv->divisor2, 1009 - &period, 1010 - cmd->flags & 1011 - TRIG_ROUND_MASK); 1013 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_5MHZ, 1014 + &devpriv->divisor1, 1015 + &devpriv->divisor2, 1016 + &period, cmd->flags); 1012 1017 if (das1800_set_frequency(dev) < 0) 1013 1018 return -1; 1014 1019 } ··· 1014 1023 case TRIG_TIMER: /* in burst mode */ 1015 1024 /* set scan frequency */ 1016 1025 period = cmd->scan_begin_arg; 1017 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, &devpriv->divisor1, 1018 - &devpriv->divisor2, &period, 1019 - cmd->flags & TRIG_ROUND_MASK); 1026 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_5MHZ, 1027 + &devpriv->divisor1, 1028 + &devpriv->divisor2, 1029 + &period, cmd->flags); 1020 1030 if (das1800_set_frequency(dev) < 0) 1021 1031 return -1; 1022 1032 break;
+4 -6
drivers/staging/comedi/drivers/das800.c
··· 66 66 #include "comedi_fc.h" 67 67 68 68 #define DAS800_SIZE 8 69 - #define TIMER_BASE 1000 70 69 #define N_CHAN_AI 8 /* number of analog input channels */ 71 70 72 71 /* Registers for the das800 */ ··· 355 356 int tmp = cmd->convert_arg; 356 357 357 358 /* calculate counter values that give desired timing */ 358 - i8253_cascade_ns_to_timer_2div(TIMER_BASE, 359 - &devpriv->divisor1, 360 - &devpriv->divisor2, 361 - &cmd->convert_arg, 362 - cmd->flags & TRIG_ROUND_MASK); 359 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_1MHZ, 360 + &devpriv->divisor1, 361 + &devpriv->divisor2, 362 + &cmd->convert_arg, cmd->flags); 363 363 if (tmp != cmd->convert_arg) 364 364 err++; 365 365 }
+10 -13
drivers/staging/comedi/drivers/ni_labpc.c
··· 73 73 #include "ni_labpc_isadma.h" 74 74 75 75 #define LABPC_SIZE 0x20 /* size of ISA io region */ 76 - #define LABPC_TIMER_BASE 500 /* 2 MHz master clock */ 77 76 #define LABPC_ADC_TIMEOUT 1000 78 77 79 78 enum scan_mode { ··· 458 459 * clock speed on convert and scan counters) 459 460 */ 460 461 devpriv->divisor_b0 = (scan_period - 1) / 461 - (LABPC_TIMER_BASE * max_counter_value) + 1; 462 + (I8254_OSC_BASE_2MHZ * max_counter_value) + 1; 462 463 if (devpriv->divisor_b0 < min_counter_value) 463 464 devpriv->divisor_b0 = min_counter_value; 464 465 if (devpriv->divisor_b0 > max_counter_value) 465 466 devpriv->divisor_b0 = max_counter_value; 466 467 467 - base_period = LABPC_TIMER_BASE * devpriv->divisor_b0; 468 + base_period = I8254_OSC_BASE_2MHZ * devpriv->divisor_b0; 468 469 469 470 /* set a0 for conversion frequency and b1 for scan frequency */ 470 471 switch (cmd->flags & TRIG_ROUND_MASK) { ··· 509 510 * calculate cascaded counter values 510 511 * that give desired scan timing 511 512 */ 512 - i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE, 513 - &(devpriv->divisor_b1), 514 - &(devpriv->divisor_b0), 515 - &scan_period, 516 - cmd->flags & TRIG_ROUND_MASK); 513 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ, 514 + &devpriv->divisor_b1, 515 + &devpriv->divisor_b0, 516 + &scan_period, cmd->flags); 517 517 labpc_set_ai_scan_period(cmd, mode, scan_period); 518 518 } else if (convert_period) { 519 519 /* 520 520 * calculate cascaded counter values 521 521 * that give desired conversion timing 522 522 */ 523 - i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE, 524 - &(devpriv->divisor_a0), 525 - &(devpriv->divisor_b0), 526 - &convert_period, 527 - cmd->flags & TRIG_ROUND_MASK); 523 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ, 524 + &devpriv->divisor_a0, 525 + &devpriv->divisor_b0, 526 + &convert_period, cmd->flags); 528 527 labpc_set_ai_convert_period(cmd, mode, convert_period); 529 528 } 530 529 }
+2 -2
drivers/staging/comedi/drivers/pcl711.c
··· 349 349 350 350 if (cmd->scan_begin_src == TRIG_TIMER) { 351 351 tmp = cmd->scan_begin_arg; 352 - i8253_cascade_ns_to_timer(500, /* 2 Mhz */ 352 + i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ, 353 353 &devpriv->divisor1, 354 354 &devpriv->divisor2, 355 355 &cmd->scan_begin_arg, 356 - cmd->flags & TRIG_ROUND_MASK); 356 + cmd->flags); 357 357 if (tmp != cmd->scan_begin_arg) 358 358 err++; 359 359 }
+18 -19
drivers/staging/comedi/drivers/pcl812.c
··· 589 589 590 590 if (cmd->convert_src == TRIG_TIMER) { 591 591 tmp = cmd->convert_arg; 592 - i8253_cascade_ns_to_timer(board->i8254_osc_base, &divisor1, 593 - &divisor2, &cmd->convert_arg, 594 - cmd->flags & TRIG_ROUND_MASK); 592 + i8253_cascade_ns_to_timer(board->i8254_osc_base, 593 + &divisor1, &divisor2, 594 + &cmd->convert_arg, cmd->flags); 595 595 if (cmd->convert_arg < board->ai_ns_min) 596 596 cmd->convert_arg = board->ai_ns_min; 597 597 if (tmp != cmd->convert_arg) ··· 637 637 cmd->convert_arg = board->ai_ns_min; 638 638 i8253_cascade_ns_to_timer(board->i8254_osc_base, 639 639 &divisor1, &divisor2, 640 - &cmd->convert_arg, 641 - cmd->flags & TRIG_ROUND_MASK); 640 + &cmd->convert_arg, cmd->flags); 642 641 } 643 642 644 643 start_pacer(dev, -1, 0, 0); /* stop pacer */ ··· 1439 1440 1440 1441 static const struct pcl812_board boardtypes[] = { 1441 1442 {"pcl812", boardPCL812, 16, 0, 2, 16, 16, 0x0fff, 1442 - 33000, 500, &range_bipolar10, &range_unipolar5, 1443 + 33000, I8254_OSC_BASE_2MHZ, &range_bipolar10, &range_unipolar5, 1443 1444 0xdcfc, 0x0a, PCLx1x_IORANGE, 0}, 1444 1445 {"pcl812pg", boardPCL812PG, 16, 0, 2, 16, 16, 0x0fff, 1445 - 33000, 500, &range_pcl812pg_ai, &range_unipolar5, 1446 + 33000, I8254_OSC_BASE_2MHZ, &range_pcl812pg_ai, &range_unipolar5, 1446 1447 0xdcfc, 0x0a, PCLx1x_IORANGE, 0}, 1447 1448 {"acl8112pg", boardPCL812PG, 16, 0, 2, 16, 16, 0x0fff, 1448 - 10000, 500, &range_pcl812pg_ai, &range_unipolar5, 1449 + 10000, I8254_OSC_BASE_2MHZ, &range_pcl812pg_ai, &range_unipolar5, 1449 1450 0xdcfc, 0x0a, PCLx1x_IORANGE, 0}, 1450 1451 {"acl8112dg", boardACL8112, 16, 8, 2, 16, 16, 0x0fff, 1451 - 10000, 500, &range_acl8112dg_ai, &range_unipolar5, 1452 + 10000, I8254_OSC_BASE_2MHZ, &range_acl8112dg_ai, &range_unipolar5, 1452 1453 0xdcfc, 0x0a, PCLx1x_IORANGE, 1}, 1453 1454 {"acl8112hg", boardACL8112, 16, 8, 2, 16, 16, 0x0fff, 1454 - 10000, 500, &range_acl8112hg_ai, &range_unipolar5, 1455 + 10000, I8254_OSC_BASE_2MHZ, &range_acl8112hg_ai, &range_unipolar5, 1455 1456 0xdcfc, 0x0a, PCLx1x_IORANGE, 1}, 1456 1457 {"a821pgl", boardA821, 16, 8, 1, 16, 16, 0x0fff, 1457 - 10000, 500, &range_pcl813b_ai, &range_unipolar5, 1458 + 10000, I8254_OSC_BASE_2MHZ, &range_pcl813b_ai, &range_unipolar5, 1458 1459 0x000c, 0x00, PCLx1x_IORANGE, 0}, 1459 1460 {"a821pglnda", boardA821, 16, 8, 0, 0, 0, 0x0fff, 1460 - 10000, 500, &range_pcl813b_ai, NULL, 1461 + 10000, I8254_OSC_BASE_2MHZ, &range_pcl813b_ai, NULL, 1461 1462 0x000c, 0x00, PCLx1x_IORANGE, 0}, 1462 1463 {"a821pgh", boardA821, 16, 8, 1, 16, 16, 0x0fff, 1463 - 10000, 500, &range_a821pgh_ai, &range_unipolar5, 1464 + 10000, I8254_OSC_BASE_2MHZ, &range_a821pgh_ai, &range_unipolar5, 1464 1465 0x000c, 0x00, PCLx1x_IORANGE, 0}, 1465 1466 {"a822pgl", boardACL8112, 16, 8, 2, 16, 16, 0x0fff, 1466 - 10000, 500, &range_acl8112dg_ai, &range_unipolar5, 1467 + 10000, I8254_OSC_BASE_2MHZ, &range_acl8112dg_ai, &range_unipolar5, 1467 1468 0xdcfc, 0x0a, PCLx1x_IORANGE, 0}, 1468 1469 {"a822pgh", boardACL8112, 16, 8, 2, 16, 16, 0x0fff, 1469 - 10000, 500, &range_acl8112hg_ai, &range_unipolar5, 1470 + 10000, I8254_OSC_BASE_2MHZ, &range_acl8112hg_ai, &range_unipolar5, 1470 1471 0xdcfc, 0x0a, PCLx1x_IORANGE, 0}, 1471 1472 {"a823pgl", boardACL8112, 16, 8, 2, 16, 16, 0x0fff, 1472 - 8000, 500, &range_acl8112dg_ai, &range_unipolar5, 1473 + 8000, I8254_OSC_BASE_2MHZ, &range_acl8112dg_ai, &range_unipolar5, 1473 1474 0xdcfc, 0x0a, PCLx1x_IORANGE, 0}, 1474 1475 {"a823pgh", boardACL8112, 16, 8, 2, 16, 16, 0x0fff, 1475 - 8000, 500, &range_acl8112hg_ai, &range_unipolar5, 1476 + 8000, I8254_OSC_BASE_2MHZ, &range_acl8112hg_ai, &range_unipolar5, 1476 1477 0xdcfc, 0x0a, PCLx1x_IORANGE, 0}, 1477 1478 {"pcl813", boardPCL813, 32, 0, 0, 0, 0, 0x0fff, 1478 1479 0, 0, &range_pcl813b_ai, NULL, ··· 1487 1488 0, 0, &range_iso813_1_ai, NULL, 1488 1489 0x0000, 0x00, PCLx1x_IORANGE, 0}, 1489 1490 {"acl8216", boardACL8216, 16, 8, 2, 16, 16, 0xffff, 1490 - 10000, 500, &range_pcl813b2_ai, &range_unipolar5, 1491 + 10000, I8254_OSC_BASE_2MHZ, &range_pcl813b2_ai, &range_unipolar5, 1491 1492 0xdcfc, 0x0a, PCLx1x_IORANGE, 1}, 1492 1493 {"a826pg", boardACL8216, 16, 8, 2, 16, 16, 0xffff, 1493 - 10000, 500, &range_pcl813b2_ai, &range_unipolar5, 1494 + 10000, I8254_OSC_BASE_2MHZ, &range_pcl813b2_ai, &range_unipolar5, 1494 1495 0xdcfc, 0x0a, PCLx1x_IORANGE, 0}, 1495 1496 }; 1496 1497
+6 -7
drivers/staging/comedi/drivers/pcl816.c
··· 481 481 tmp = cmd->convert_arg; 482 482 i8253_cascade_ns_to_timer(board->i8254_osc_base, 483 483 &divisor1, &divisor2, 484 - &cmd->convert_arg, 485 - cmd->flags & TRIG_ROUND_MASK); 484 + &cmd->convert_arg, cmd->flags); 486 485 if (cmd->convert_arg < board->ai_ns_min) 487 486 cmd->convert_arg = board->ai_ns_min; 488 487 if (tmp != cmd->convert_arg) ··· 527 528 if (cmd->convert_arg < board->ai_ns_min) 528 529 cmd->convert_arg = board->ai_ns_min; 529 530 530 - i8253_cascade_ns_to_timer(board->i8254_osc_base, &divisor1, 531 - &divisor2, &cmd->convert_arg, 532 - cmd->flags & TRIG_ROUND_MASK); 531 + i8253_cascade_ns_to_timer(board->i8254_osc_base, 532 + &divisor1, &divisor2, 533 + &cmd->convert_arg, cmd->flags); 533 534 534 535 /* PCL816 crash if any divisor is set to 1 */ 535 536 if (divisor1 == 1) { ··· 1104 1105 0xffff, /* D/A maxdata */ 1105 1106 1024, 1106 1107 1, /* ao chan list */ 1107 - 100}, 1108 + I8254_OSC_BASE_10MHZ}, 1108 1109 {"pcl814b", 8, 16, 10000, 1, 16, 16, &range_pcl816, 1109 1110 &range_pcl816, PCLx1x_RANGE, 1110 1111 0x00fc, ··· 1113 1114 0x3fff, 1114 1115 1024, 1115 1116 1, 1116 - 100}, 1117 + I8254_OSC_BASE_10MHZ}, 1117 1118 }; 1118 1119 1119 1120 static struct comedi_driver pcl816_driver = {
+8 -7
drivers/staging/comedi/drivers/pcl818.c
··· 800 800 devpriv->neverending_ai = 1; /* well, user want neverending */ 801 801 802 802 if (mode == 1) { 803 - i8253_cascade_ns_to_timer(devpriv->i8253_osc_base, &divisor1, 804 - &divisor2, &cmd->convert_arg, 803 + i8253_cascade_ns_to_timer(devpriv->i8253_osc_base, 804 + &divisor1, &divisor2, 805 + &cmd->convert_arg, 805 806 TRIG_ROUND_NEAREST); 806 807 if (divisor1 == 1) { /* PCL718/818 crash if any divisor is set to 1 */ 807 808 divisor1 = 2; ··· 1035 1034 1036 1035 if (cmd->convert_src == TRIG_TIMER) { 1037 1036 tmp = cmd->convert_arg; 1038 - i8253_cascade_ns_to_timer(devpriv->i8253_osc_base, &divisor1, 1039 - &divisor2, &cmd->convert_arg, 1040 - cmd->flags & TRIG_ROUND_MASK); 1037 + i8253_cascade_ns_to_timer(devpriv->i8253_osc_base, 1038 + &divisor1, &divisor2, 1039 + &cmd->convert_arg, cmd->flags); 1041 1040 if (cmd->convert_arg < board->ns_min) 1042 1041 cmd->convert_arg = board->ns_min; 1043 1042 if (tmp != cmd->convert_arg) ··· 1433 1432 1434 1433 /* select 1/10MHz oscilator */ 1435 1434 if ((it->options[3] == 0) || (it->options[3] == 10)) 1436 - devpriv->i8253_osc_base = 100; 1435 + devpriv->i8253_osc_base = I8254_OSC_BASE_10MHZ; 1437 1436 else 1438 - devpriv->i8253_osc_base = 1000; 1437 + devpriv->i8253_osc_base = I8254_OSC_BASE_1MHZ; 1439 1438 1440 1439 /* max sampling speed */ 1441 1440 devpriv->ns_min = board->ns_min;