···1515 * TODO1616 * Work out best PLL policy1717 */1818-1919-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt2020-2118#include <linux/kernel.h>2219#include <linux/module.h>2320#include <linux/pci.h>···417420 u16 sr;418421 u32 total = 0;419422420420- pr_warn("BIOS clock data not set\n");423423+ dev_warn(&pdev->dev, "BIOS clock data not set\n");421424422425 /* This is the process the HPT371 BIOS is reported to use */423426 for (i = 0; i < 128; i++) {···527530 ppi[0] = &info_hpt372n;528531 break;529532 default:530530- pr_err("PCI table is bogus, please report (%d)\n", dev->device);533533+ dev_err(&dev->dev,"PCI table is bogus, please report (%d)\n",534534+ dev->device);531535 return -ENODEV;532536 }533537···577579 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);578580 }579581 if (adjust == 8) {580580- pr_err("DPLL did not stabilize!\n");582582+ dev_err(&dev->dev, "DPLL did not stabilize!\n");581583 return -ENODEV;582584 }583585584584- pr_info("bus clock %dMHz, using 66MHz DPLL\n", pci_mhz);586586+ dev_info(&dev->dev, "bus clock %dMHz, using 66MHz DPLL\n", pci_mhz);585587586588 /*587589 * Set our private data up. We only need a few flags