Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge remote-tracking branches 'asoc/topic/rt5563', 'asoc/topic/rt5616', 'asoc/topic/rt5645', 'asoc/topic/rt5659' and 'asoc/topic/rt5663' into asoc-next

+288 -51
+8
Documentation/devicetree/bindings/sound/rt5663.txt
··· 12 12 13 13 Optional properties: 14 14 15 + - "realtek,dc_offset_l_manual" 16 + - "realtek,dc_offset_r_manual" 17 + - "realtek,dc_offset_l_manual_mic" 18 + - "realtek,dc_offset_r_manual_mic" 19 + Based on the different PCB layout, add the manual offset value to 20 + compensate the DC offset for each L and R channel, and they are different 21 + between headphone and headset. 22 + 15 23 Pins on the device (for linking into audio routes) for RT5663: 16 24 17 25 * IN1P
+22
include/sound/rt5663.h
··· 1 + /* 2 + * linux/sound/rt5663.h -- Platform data for RT5663 3 + * 4 + * Copyright 2017 Realtek Semiconductor Corp. 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + */ 10 + 11 + #ifndef __LINUX_SND_RT5663_H 12 + #define __LINUX_SND_RT5663_H 13 + 14 + struct rt5663_platform_data { 15 + unsigned int dc_offset_l_manual; 16 + unsigned int dc_offset_r_manual; 17 + unsigned int dc_offset_l_manual_mic; 18 + unsigned int dc_offset_r_manual_mic; 19 + }; 20 + 21 + #endif 22 +
+40 -3
sound/soc/codecs/rt5645.c
··· 3559 3559 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match); 3560 3560 #endif 3561 3561 3562 - static struct rt5645_platform_data general_platform_data = { 3562 + static const struct rt5645_platform_data general_platform_data = { 3563 3563 .dmic1_data_pin = RT5645_DMIC1_DISABLE, 3564 3564 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P, 3565 3565 .jd_mode = 3, ··· 3593 3593 { } 3594 3594 }; 3595 3595 3596 - static struct rt5645_platform_data buddy_platform_data = { 3596 + static const struct rt5645_platform_data buddy_platform_data = { 3597 3597 .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5, 3598 3598 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P, 3599 3599 .jd_mode = 3, ··· 3610 3610 { } 3611 3611 }; 3612 3612 3613 - static struct rt5645_platform_data gpd_win_platform_data = { 3613 + static const struct rt5645_platform_data gpd_win_platform_data = { 3614 3614 .jd_mode = 3, 3615 3615 .inv_jd1_1 = true, 3616 3616 }; ··· 3635 3635 }, 3636 3636 }, 3637 3637 {} 3638 + }; 3639 + 3640 + static struct rt5645_platform_data general_platform_data2 = { 3641 + .dmic1_data_pin = RT5645_DMIC_DATA_IN2N, 3642 + .dmic2_data_pin = RT5645_DMIC2_DISABLE, 3643 + .jd_mode = 3, 3644 + .inv_jd1_1 = true, 3645 + }; 3646 + 3647 + static struct dmi_system_id dmi_platform_asus_t100ha[] = { 3648 + { 3649 + .ident = "ASUS T100HAN", 3650 + .matches = { 3651 + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), 3652 + DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"), 3653 + }, 3654 + }, 3655 + { } 3656 + }; 3657 + 3658 + static struct rt5645_platform_data minix_z83_4_platform_data = { 3659 + .jd_mode = 3, 3660 + }; 3661 + 3662 + static struct dmi_system_id dmi_platform_minix_z83_4[] = { 3663 + { 3664 + .ident = "MINIX Z83-4", 3665 + .matches = { 3666 + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"), 3667 + DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"), 3668 + }, 3669 + }, 3670 + { } 3638 3671 }; 3639 3672 3640 3673 static bool rt5645_check_dp(struct device *dev) ··· 3722 3689 rt5645->pdata = general_platform_data; 3723 3690 else if (dmi_check_system(dmi_platform_gpd_win)) 3724 3691 rt5645->pdata = gpd_win_platform_data; 3692 + else if (dmi_check_system(dmi_platform_asus_t100ha)) 3693 + rt5645->pdata = general_platform_data2; 3694 + else if (dmi_check_system(dmi_platform_minix_z83_4)) 3695 + rt5645->pdata = minix_z83_4_platform_data; 3725 3696 3726 3697 if (quirk != -1) { 3727 3698 rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
+1 -1
sound/soc/codecs/rt5659.c
··· 4222 4222 #endif 4223 4223 4224 4224 #ifdef CONFIG_ACPI 4225 - static struct acpi_device_id rt5659_acpi_match[] = { 4225 + static const struct acpi_device_id rt5659_acpi_match[] = { 4226 4226 { "10EC5658", 0, }, 4227 4227 { "10EC5659", 0, }, 4228 4228 { },
+215 -47
sound/soc/codecs/rt5663.c
··· 40 40 41 41 struct rt5663_priv { 42 42 struct snd_soc_codec *codec; 43 + struct rt5663_platform_data pdata; 43 44 struct regmap *regmap; 44 45 struct delayed_work jack_detect_work; 45 46 struct snd_soc_jack *hs_jack; ··· 56 55 int pll_out; 57 56 58 57 int jack_type; 58 + }; 59 + 60 + static const struct reg_sequence rt5663_patch_list[] = { 61 + { 0x002a, 0x8020 }, 62 + { 0x0086, 0x0028 }, 59 63 }; 60 64 61 65 static const struct reg_default rt5663_v2_reg[] = { ··· 482 476 { 0x0023, 0x0039 }, 483 477 { 0x0026, 0xc0c0 }, 484 478 { 0x0029, 0x8080 }, 485 - { 0x002a, 0xa0a0 }, 479 + { 0x002a, 0x8020 }, 486 480 { 0x002c, 0x000c }, 487 481 { 0x002d, 0x0000 }, 488 482 { 0x0040, 0x0808 }, ··· 510 504 { 0x0082, 0x0000 }, 511 505 { 0x0083, 0x0000 }, 512 506 { 0x0084, 0x0000 }, 513 - { 0x0086, 0x0008 }, 507 + { 0x0086, 0x0028 }, 514 508 { 0x0087, 0x0000 }, 515 509 { 0x008a, 0x0000 }, 516 510 { 0x008b, 0x0000 }, ··· 1514 1508 static int rt5663_jack_detect(struct snd_soc_codec *codec, int jack_insert) 1515 1509 { 1516 1510 struct rt5663_priv *rt5663 = snd_soc_codec_get_drvdata(codec); 1517 - int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30}; 1511 + int val, i = 0; 1518 1512 1519 1513 dev_dbg(codec->dev, "%s jack_insert:%d\n", __func__, jack_insert); 1520 1514 ··· 1549 1543 RT5663_IRQ_POW_SAV_MASK, RT5663_IRQ_POW_SAV_EN); 1550 1544 snd_soc_update_bits(codec, RT5663_IRQ_1, 1551 1545 RT5663_EN_IRQ_JD1_MASK, RT5663_EN_IRQ_JD1_EN); 1552 - while (i < 5) { 1553 - msleep(sleep_time[i]); 1554 - val = snd_soc_read(codec, RT5663_EM_JACK_TYPE_2) & 1555 - 0x0003; 1556 - dev_dbg(codec->dev, "%s: MX-00e7 val=%x sleep %d\n", 1557 - __func__, val, sleep_time[i]); 1558 - i++; 1559 - if (val == 0x1 || val == 0x2 || val == 0x3) 1546 + 1547 + while (true) { 1548 + regmap_read(rt5663->regmap, RT5663_INT_ST_2, &val); 1549 + if (!(val & 0x80)) 1550 + usleep_range(10000, 10005); 1551 + else 1560 1552 break; 1553 + 1554 + if (i > 200) 1555 + break; 1556 + i++; 1561 1557 } 1558 + 1559 + val = snd_soc_read(codec, RT5663_EM_JACK_TYPE_2) & 0x0003; 1562 1560 dev_dbg(codec->dev, "%s val = %d\n", __func__, val); 1561 + 1562 + snd_soc_update_bits(codec, RT5663_HP_CHARGE_PUMP_1, 1563 + RT5663_OSW_HP_L_MASK | RT5663_OSW_HP_R_MASK, 1564 + RT5663_OSW_HP_L_EN | RT5663_OSW_HP_R_EN); 1565 + 1563 1566 switch (val) { 1564 1567 case 1: 1565 1568 case 2: 1566 1569 rt5663->jack_type = SND_JACK_HEADSET; 1567 1570 rt5663_enable_push_button_irq(codec, true); 1571 + 1572 + if (rt5663->pdata.dc_offset_l_manual_mic) { 1573 + regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2, 1574 + rt5663->pdata.dc_offset_l_manual_mic >> 1575 + 16); 1576 + regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3, 1577 + rt5663->pdata.dc_offset_l_manual_mic & 1578 + 0xffff); 1579 + } 1580 + 1581 + if (rt5663->pdata.dc_offset_r_manual_mic) { 1582 + regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5, 1583 + rt5663->pdata.dc_offset_r_manual_mic >> 1584 + 16); 1585 + regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6, 1586 + rt5663->pdata.dc_offset_r_manual_mic & 1587 + 0xffff); 1588 + } 1568 1589 break; 1569 1590 default: 1570 1591 rt5663->jack_type = SND_JACK_HEADPHONE; 1592 + 1593 + if (rt5663->pdata.dc_offset_l_manual) { 1594 + regmap_write(rt5663->regmap, RT5663_MIC_DECRO_2, 1595 + rt5663->pdata.dc_offset_l_manual >> 16); 1596 + regmap_write(rt5663->regmap, RT5663_MIC_DECRO_3, 1597 + rt5663->pdata.dc_offset_l_manual & 1598 + 0xffff); 1599 + } 1600 + 1601 + if (rt5663->pdata.dc_offset_r_manual) { 1602 + regmap_write(rt5663->regmap, RT5663_MIC_DECRO_5, 1603 + rt5663->pdata.dc_offset_r_manual >> 16); 1604 + regmap_write(rt5663->regmap, RT5663_MIC_DECRO_6, 1605 + rt5663->pdata.dc_offset_r_manual & 1606 + 0xffff); 1607 + } 1571 1608 break; 1572 1609 } 1573 1610 } else { ··· 1705 1656 default: 1706 1657 dev_err(codec->dev, "Unknown CODEC Version\n"); 1707 1658 } 1659 + 1660 + /* Delay the jack insert report to avoid pop noise */ 1661 + msleep(30); 1708 1662 } else { 1709 1663 /* jack is already in, report button event */ 1710 1664 report = SND_JACK_HEADSET; ··· 2005 1953 static const struct snd_kcontrol_new rt5663_sto1_dac_l_mix[] = { 2006 1954 SOC_DAPM_SINGLE("DAC L Switch", RT5663_STO_DAC_MIXER, 2007 1955 RT5663_M_DAC_L1_STO_L_SHIFT, 1, 1), 2008 - SOC_DAPM_SINGLE("DAC R Switch", RT5663_STO_DAC_MIXER, 2009 - RT5663_M_DAC_R1_STO_L_SHIFT, 1, 1), 2010 1956 }; 2011 1957 2012 1958 static const struct snd_kcontrol_new rt5663_sto1_dac_r_mix[] = { 2013 - SOC_DAPM_SINGLE("DAC L Switch", RT5663_STO_DAC_MIXER, 2014 - RT5663_M_DAC_L1_STO_R_SHIFT, 1, 1), 2015 1959 SOC_DAPM_SINGLE("DAC R Switch", RT5663_STO_DAC_MIXER, 2016 1960 RT5663_M_DAC_R1_STO_R_SHIFT, 1, 1), 2017 1961 }; ··· 2072 2024 RT5663_HP_SIG_SRC1_SILENCE); 2073 2025 } else { 2074 2026 snd_soc_write(codec, RT5663_DEPOP_2, 0x3003); 2075 - snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x000b, 2076 - 0x000b); 2077 - snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x0030, 2078 - 0x0030); 2079 2027 snd_soc_update_bits(codec, RT5663_HP_CHARGE_PUMP_1, 2080 2028 RT5663_OVCD_HP_MASK, RT5663_OVCD_HP_DIS); 2081 2029 snd_soc_write(codec, RT5663_HP_CHARGE_PUMP_2, 0x1371); ··· 2080 2036 snd_soc_write(codec, RT5663_ANA_BIAS_CUR_1, 0x7766); 2081 2037 snd_soc_write(codec, RT5663_HP_BIAS, 0xafaa); 2082 2038 snd_soc_write(codec, RT5663_CHARGE_PUMP_2, 0x7777); 2039 + snd_soc_update_bits(codec, RT5663_STO_DRE_1, 0x8000, 2040 + 0x8000); 2083 2041 snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x3000, 2084 2042 0x3000); 2085 2043 } ··· 2096 2050 snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x3000, 0x0); 2097 2051 snd_soc_update_bits(codec, RT5663_HP_CHARGE_PUMP_1, 2098 2052 RT5663_OVCD_HP_MASK, RT5663_OVCD_HP_EN); 2099 - snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x0030, 0x0); 2100 - snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x000b, 2101 - 0x000b); 2053 + } 2054 + break; 2055 + 2056 + default: 2057 + return 0; 2058 + } 2059 + 2060 + return 0; 2061 + } 2062 + 2063 + static int rt5663_charge_pump_event(struct snd_soc_dapm_widget *w, 2064 + struct snd_kcontrol *kcontrol, int event) 2065 + { 2066 + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 2067 + struct rt5663_priv *rt5663 = snd_soc_codec_get_drvdata(codec); 2068 + 2069 + switch (event) { 2070 + case SND_SOC_DAPM_PRE_PMU: 2071 + if (rt5663->codec_ver == CODEC_VER_0) { 2072 + snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x0030, 2073 + 0x0030); 2074 + snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x0003, 2075 + 0x0003); 2076 + } 2077 + break; 2078 + 2079 + case SND_SOC_DAPM_POST_PMD: 2080 + if (rt5663->codec_ver == CODEC_VER_0) { 2081 + snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x0003, 0); 2082 + snd_soc_update_bits(codec, RT5663_DEPOP_1, 0x0030, 0); 2102 2083 } 2103 2084 break; 2104 2085 ··· 2255 2182 SND_SOC_DAPM_DAC("DAC R", NULL, SND_SOC_NOPM, 0, 0), 2256 2183 2257 2184 /* Headphone*/ 2185 + SND_SOC_DAPM_SUPPLY("HP Charge Pump", SND_SOC_NOPM, 0, 0, 2186 + rt5663_charge_pump_event, SND_SOC_DAPM_PRE_PMU | 2187 + SND_SOC_DAPM_POST_PMD), 2258 2188 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5663_hp_event, 2259 2189 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 2260 2190 ··· 2406 2330 { "DAC R1", NULL, "ADDA MIXR" }, 2407 2331 2408 2332 { "STO1 DAC MIXL", "DAC L Switch", "DAC L1" }, 2409 - { "STO1 DAC MIXL", "DAC R Switch", "DAC R1" }, 2410 2333 { "STO1 DAC MIXL", NULL, "STO1 DAC L Power" }, 2411 2334 { "STO1 DAC MIXL", NULL, "STO1 DAC Filter" }, 2412 2335 { "STO1 DAC MIXR", "DAC R Switch", "DAC R1" }, 2413 - { "STO1 DAC MIXR", "DAC L Switch", "DAC L1" }, 2414 2336 { "STO1 DAC MIXR", NULL, "STO1 DAC R Power" }, 2415 2337 { "STO1 DAC MIXR", NULL, "STO1 DAC Filter" }, 2416 2338 2339 + { "HP Amp", NULL, "HP Charge Pump" }, 2417 2340 { "HP Amp", NULL, "DAC L" }, 2418 2341 { "HP Amp", NULL, "DAC R" }, 2419 2342 }; ··· 3031 2956 #endif 3032 2957 3033 2958 #ifdef CONFIG_ACPI 3034 - static struct acpi_device_id rt5663_acpi_match[] = { 2959 + static const struct acpi_device_id rt5663_acpi_match[] = { 3035 2960 { "10EC5663", 0}, 3036 2961 {}, 3037 2962 }; ··· 3061 2986 { 3062 2987 int value, count; 3063 2988 3064 - regmap_write(rt5663->regmap, RT5663_RC_CLK, 0x0280); 3065 - regmap_write(rt5663->regmap, RT5663_GLB_CLK, 0x8000); 3066 - regmap_write(rt5663->regmap, RT5663_DIG_MISC, 0x8001); 3067 - regmap_write(rt5663->regmap, RT5663_VREF_RECMIX, 0x0032); 3068 - regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xa2be); 2989 + regmap_write(rt5663->regmap, RT5663_RESET, 0x0000); 3069 2990 msleep(20); 3070 - regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xf2be); 3071 - regmap_write(rt5663->regmap, RT5663_PWR_DIG_2, 0x8400); 3072 - regmap_write(rt5663->regmap, RT5663_CHOP_ADC, 0x3000); 3073 - regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x003b); 3074 - regmap_write(rt5663->regmap, RT5663_PWR_DIG_1, 0x8df8); 3075 - regmap_write(rt5663->regmap, RT5663_PWR_ANLG_2, 0x0003); 3076 - regmap_write(rt5663->regmap, RT5663_PWR_ANLG_3, 0x018c); 3077 - regmap_write(rt5663->regmap, RT5663_ADDA_CLK_1, 0x1111); 2991 + regmap_write(rt5663->regmap, RT5663_ANA_BIAS_CUR_4, 0x00a1); 2992 + regmap_write(rt5663->regmap, RT5663_RC_CLK, 0x0380); 2993 + regmap_write(rt5663->regmap, RT5663_GLB_CLK, 0x8000); 2994 + regmap_write(rt5663->regmap, RT5663_ADDA_CLK_1, 0x1000); 2995 + regmap_write(rt5663->regmap, RT5663_VREF_RECMIX, 0x0032); 2996 + regmap_write(rt5663->regmap, RT5663_HP_IMP_SEN_19, 0x000c); 2997 + regmap_write(rt5663->regmap, RT5663_DUMMY_1, 0x0324); 2998 + regmap_write(rt5663->regmap, RT5663_DIG_MISC, 0x8001); 2999 + regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xa23b); 3000 + msleep(30); 3001 + regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xf23b); 3002 + regmap_write(rt5663->regmap, RT5663_PWR_ANLG_2, 0x8000); 3003 + regmap_write(rt5663->regmap, RT5663_PWR_ANLG_3, 0x0008); 3078 3004 regmap_write(rt5663->regmap, RT5663_PRE_DIV_GATING_1, 0xffff); 3079 3005 regmap_write(rt5663->regmap, RT5663_PRE_DIV_GATING_2, 0xffff); 3006 + regmap_write(rt5663->regmap, RT5663_CBJ_1, 0x8c10); 3007 + regmap_write(rt5663->regmap, RT5663_IL_CMD_2, 0x00c1); 3008 + regmap_write(rt5663->regmap, RT5663_EM_JACK_TYPE_1, 0xb880); 3009 + regmap_write(rt5663->regmap, RT5663_EM_JACK_TYPE_2, 0x4110); 3010 + regmap_write(rt5663->regmap, RT5663_EM_JACK_TYPE_2, 0x4118); 3011 + 3012 + count = 0; 3013 + while (true) { 3014 + regmap_read(rt5663->regmap, RT5663_INT_ST_2, &value); 3015 + if (!(value & 0x80)) 3016 + usleep_range(10000, 10005); 3017 + else 3018 + break; 3019 + 3020 + if (++count > 200) 3021 + break; 3022 + } 3023 + 3024 + regmap_write(rt5663->regmap, RT5663_HP_IMP_SEN_19, 0x0000); 3080 3025 regmap_write(rt5663->regmap, RT5663_DEPOP_2, 0x3003); 3026 + regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x0038); 3081 3027 regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x003b); 3028 + regmap_write(rt5663->regmap, RT5663_PWR_DIG_2, 0x8400); 3029 + regmap_write(rt5663->regmap, RT5663_PWR_DIG_1, 0x8df8); 3030 + regmap_write(rt5663->regmap, RT5663_PWR_ANLG_2, 0x8003); 3031 + regmap_write(rt5663->regmap, RT5663_PWR_ANLG_3, 0x018c); 3082 3032 regmap_write(rt5663->regmap, RT5663_HP_CHARGE_PUMP_1, 0x1e32); 3083 - regmap_write(rt5663->regmap, RT5663_HP_CHARGE_PUMP_2, 0x1371); 3084 3033 regmap_write(rt5663->regmap, RT5663_DACREF_LDO, 0x3b0b); 3085 - regmap_write(rt5663->regmap, RT5663_STO_DAC_MIXER, 0x2080); 3034 + msleep(40); 3035 + regmap_write(rt5663->regmap, RT5663_STO_DAC_MIXER, 0x0000); 3086 3036 regmap_write(rt5663->regmap, RT5663_BYPASS_STO_DAC, 0x000c); 3087 - regmap_write(rt5663->regmap, RT5663_HP_BIAS, 0xabba); 3037 + regmap_write(rt5663->regmap, RT5663_HP_BIAS, 0xafaa); 3088 3038 regmap_write(rt5663->regmap, RT5663_CHARGE_PUMP_1, 0x2224); 3089 3039 regmap_write(rt5663->regmap, RT5663_HP_OUT_EN, 0x8088); 3090 3040 regmap_write(rt5663->regmap, RT5663_STO_DRE_9, 0x0017); 3091 3041 regmap_write(rt5663->regmap, RT5663_STO_DRE_10, 0x0017); 3092 3042 regmap_write(rt5663->regmap, RT5663_STO1_ADC_MIXER, 0x4040); 3043 + regmap_write(rt5663->regmap, RT5663_CHOP_ADC, 0x3000); 3093 3044 regmap_write(rt5663->regmap, RT5663_RECMIX, 0x0005); 3094 3045 regmap_write(rt5663->regmap, RT5663_ADDA_RST, 0xc000); 3095 3046 regmap_write(rt5663->regmap, RT5663_STO1_HPF_ADJ1, 0x3320); 3096 3047 regmap_write(rt5663->regmap, RT5663_HP_CALIB_2, 0x00c9); 3097 3048 regmap_write(rt5663->regmap, RT5663_DUMMY_1, 0x004c); 3098 - regmap_write(rt5663->regmap, RT5663_ANA_BIAS_CUR_1, 0x7766); 3099 - regmap_write(rt5663->regmap, RT5663_BIAS_CUR_8, 0x4702); 3100 - msleep(200); 3049 + regmap_write(rt5663->regmap, RT5663_ANA_BIAS_CUR_1, 0x1111); 3050 + regmap_write(rt5663->regmap, RT5663_BIAS_CUR_8, 0x4402); 3051 + regmap_write(rt5663->regmap, RT5663_CHARGE_PUMP_2, 0x3311); 3101 3052 regmap_write(rt5663->regmap, RT5663_HP_CALIB_1, 0x0069); 3102 - regmap_write(rt5663->regmap, RT5663_HP_CALIB_3, 0x06c2); 3103 - regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0x7b00); 3104 - regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0xfb00); 3053 + regmap_write(rt5663->regmap, RT5663_HP_CALIB_3, 0x06ce); 3054 + regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0x6800); 3055 + regmap_write(rt5663->regmap, RT5663_CHARGE_PUMP_2, 0x1100); 3056 + regmap_write(rt5663->regmap, RT5663_HP_CALIB_7, 0x0057); 3057 + regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0xe800); 3058 + 3105 3059 count = 0; 3106 3060 while (true) { 3107 3061 regmap_read(rt5663->regmap, RT5663_HP_CALIB_1_1, &value); ··· 3143 3039 return; 3144 3040 count++; 3145 3041 } 3042 + 3043 + regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0x6200); 3044 + regmap_write(rt5663->regmap, RT5663_HP_CALIB_7, 0x0059); 3045 + regmap_write(rt5663->regmap, RT5663_HP_CALIB_1_1, 0xe200); 3046 + 3047 + count = 0; 3048 + while (true) { 3049 + regmap_read(rt5663->regmap, RT5663_HP_CALIB_1_1, &value); 3050 + if (value & 0x8000) 3051 + usleep_range(10000, 10005); 3052 + else 3053 + break; 3054 + 3055 + if (count > 200) 3056 + return; 3057 + count++; 3058 + } 3059 + 3060 + regmap_write(rt5663->regmap, RT5663_EM_JACK_TYPE_1, 0xb8e0); 3061 + usleep_range(10000, 10005); 3062 + regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0x003b); 3063 + usleep_range(10000, 10005); 3064 + regmap_write(rt5663->regmap, RT5663_PWR_DIG_1, 0x0000); 3065 + usleep_range(10000, 10005); 3066 + regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x000b); 3067 + usleep_range(10000, 10005); 3068 + regmap_write(rt5663->regmap, RT5663_DEPOP_1, 0x0008); 3069 + usleep_range(10000, 10005); 3070 + regmap_write(rt5663->regmap, RT5663_PWR_ANLG_2, 0x0000); 3071 + usleep_range(10000, 10005); 3072 + } 3073 + 3074 + static int rt5663_parse_dp(struct rt5663_priv *rt5663, struct device *dev) 3075 + { 3076 + device_property_read_u32(dev, "realtek,dc_offset_l_manual", 3077 + &rt5663->pdata.dc_offset_l_manual); 3078 + device_property_read_u32(dev, "realtek,dc_offset_r_manual", 3079 + &rt5663->pdata.dc_offset_r_manual); 3080 + device_property_read_u32(dev, "realtek,dc_offset_l_manual_mic", 3081 + &rt5663->pdata.dc_offset_l_manual_mic); 3082 + device_property_read_u32(dev, "realtek,dc_offset_r_manual_mic", 3083 + &rt5663->pdata.dc_offset_r_manual_mic); 3084 + 3085 + return 0; 3146 3086 } 3147 3087 3148 3088 static int rt5663_i2c_probe(struct i2c_client *i2c, 3149 3089 const struct i2c_device_id *id) 3150 3090 { 3091 + struct rt5663_platform_data *pdata = dev_get_platdata(&i2c->dev); 3151 3092 struct rt5663_priv *rt5663; 3152 3093 int ret; 3153 3094 unsigned int val; ··· 3205 3056 return -ENOMEM; 3206 3057 3207 3058 i2c_set_clientdata(i2c, rt5663); 3059 + 3060 + if (pdata) 3061 + rt5663->pdata = *pdata; 3062 + else 3063 + rt5663_parse_dp(rt5663, &i2c->dev); 3208 3064 3209 3065 regmap = devm_regmap_init_i2c(i2c, &temp_regmap); 3210 3066 if (IS_ERR(regmap)) { ··· 3258 3104 regcache_cache_bypass(rt5663->regmap, false); 3259 3105 regmap_write(rt5663->regmap, RT5663_RESET, 0); 3260 3106 dev_dbg(&i2c->dev, "calibrate done\n"); 3107 + 3108 + switch (rt5663->codec_ver) { 3109 + case CODEC_VER_1: 3110 + break; 3111 + case CODEC_VER_0: 3112 + ret = regmap_register_patch(rt5663->regmap, rt5663_patch_list, 3113 + ARRAY_SIZE(rt5663_patch_list)); 3114 + if (ret != 0) 3115 + dev_warn(&i2c->dev, 3116 + "Failed to apply regmap patch: %d\n", ret); 3117 + break; 3118 + default: 3119 + dev_err(&i2c->dev, "%s:Unknown codec type\n", __func__); 3120 + } 3261 3121 3262 3122 /* GPIO1 as IRQ */ 3263 3123 regmap_update_bits(rt5663->regmap, RT5663_GPIO_1, RT5663_GP1_PIN_MASK,
+2
sound/soc/codecs/rt5663.h
··· 12 12 #ifndef __RT5663_H__ 13 13 #define __RT5663_H__ 14 14 15 + #include <sound/rt5663.h> 16 + 15 17 /* Info */ 16 18 #define RT5663_RESET 0x0000 17 19 #define RT5663_VENDOR_ID 0x00fd