Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/radeon: consolidate cik vce initialization and startup code.

This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_vce doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Jérome Glisse and committed by
Alex Deucher
cb25f7e0 d18dd759

+91 -45
+91 -45
drivers/gpu/drm/radeon/cik.c
··· 8209 8209 } 8210 8210 } 8211 8211 8212 + static void cik_vce_init(struct radeon_device *rdev) 8213 + { 8214 + int r; 8215 + 8216 + if (!rdev->has_vce) 8217 + return; 8218 + 8219 + r = radeon_vce_init(rdev); 8220 + if (r) { 8221 + dev_err(rdev->dev, "failed VCE (%d) init.\n", r); 8222 + /* 8223 + * At this point rdev->vce.vcpu_bo is NULL which trickles down 8224 + * to early fails cik_vce_start() and thus nothing happens 8225 + * there. So it is pointless to try to go through that code 8226 + * hence why we disable vce here. 8227 + */ 8228 + rdev->has_vce = 0; 8229 + return; 8230 + } 8231 + rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_obj = NULL; 8232 + r600_ring_init(rdev, &rdev->ring[TN_RING_TYPE_VCE1_INDEX], 4096); 8233 + rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_obj = NULL; 8234 + r600_ring_init(rdev, &rdev->ring[TN_RING_TYPE_VCE2_INDEX], 4096); 8235 + } 8236 + 8237 + static void cik_vce_start(struct radeon_device *rdev) 8238 + { 8239 + int r; 8240 + 8241 + if (!rdev->has_vce) 8242 + return; 8243 + 8244 + r = radeon_vce_resume(rdev); 8245 + if (r) { 8246 + dev_err(rdev->dev, "failed VCE resume (%d).\n", r); 8247 + goto error; 8248 + } 8249 + r = vce_v2_0_resume(rdev); 8250 + if (r) { 8251 + dev_err(rdev->dev, "failed VCE resume (%d).\n", r); 8252 + goto error; 8253 + } 8254 + r = radeon_fence_driver_start_ring(rdev, TN_RING_TYPE_VCE1_INDEX); 8255 + if (r) { 8256 + dev_err(rdev->dev, "failed initializing VCE1 fences (%d).\n", r); 8257 + goto error; 8258 + } 8259 + r = radeon_fence_driver_start_ring(rdev, TN_RING_TYPE_VCE2_INDEX); 8260 + if (r) { 8261 + dev_err(rdev->dev, "failed initializing VCE2 fences (%d).\n", r); 8262 + goto error; 8263 + } 8264 + return; 8265 + 8266 + error: 8267 + rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size = 0; 8268 + rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_size = 0; 8269 + } 8270 + 8271 + static void cik_vce_resume(struct radeon_device *rdev) 8272 + { 8273 + struct radeon_ring *ring; 8274 + int r; 8275 + 8276 + if (!rdev->has_vce || !rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size) 8277 + return; 8278 + 8279 + ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; 8280 + r = radeon_ring_init(rdev, ring, ring->ring_size, 0, VCE_CMD_NO_OP); 8281 + if (r) { 8282 + dev_err(rdev->dev, "failed initializing VCE1 ring (%d).\n", r); 8283 + return; 8284 + } 8285 + ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; 8286 + r = radeon_ring_init(rdev, ring, ring->ring_size, 0, VCE_CMD_NO_OP); 8287 + if (r) { 8288 + dev_err(rdev->dev, "failed initializing VCE1 ring (%d).\n", r); 8289 + return; 8290 + } 8291 + r = vce_v1_0_init(rdev); 8292 + if (r) { 8293 + dev_err(rdev->dev, "failed initializing VCE (%d).\n", r); 8294 + return; 8295 + } 8296 + } 8297 + 8212 8298 /** 8213 8299 * cik_startup - program the asic to a functional state 8214 8300 * ··· 8398 8312 } 8399 8313 8400 8314 cik_uvd_start(rdev); 8401 - 8402 - r = radeon_vce_resume(rdev); 8403 - if (!r) { 8404 - r = vce_v2_0_resume(rdev); 8405 - if (!r) 8406 - r = radeon_fence_driver_start_ring(rdev, 8407 - TN_RING_TYPE_VCE1_INDEX); 8408 - if (!r) 8409 - r = radeon_fence_driver_start_ring(rdev, 8410 - TN_RING_TYPE_VCE2_INDEX); 8411 - } 8412 - if (r) { 8413 - dev_err(rdev->dev, "VCE init error (%d).\n", r); 8414 - rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size = 0; 8415 - rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_size = 0; 8416 - } 8315 + cik_vce_start(rdev); 8417 8316 8418 8317 /* Enable IRQ */ 8419 8318 if (!rdev->irq.installed) { ··· 8475 8404 return r; 8476 8405 8477 8406 cik_uvd_resume(rdev); 8478 - 8479 - r = -ENOENT; 8480 - 8481 - ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; 8482 - if (ring->ring_size) 8483 - r = radeon_ring_init(rdev, ring, ring->ring_size, 0, 8484 - VCE_CMD_NO_OP); 8485 - 8486 - ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; 8487 - if (ring->ring_size) 8488 - r = radeon_ring_init(rdev, ring, ring->ring_size, 0, 8489 - VCE_CMD_NO_OP); 8490 - 8491 - if (!r) 8492 - r = vce_v1_0_init(rdev); 8493 - else if (r != -ENOENT) 8494 - DRM_ERROR("radeon: failed initializing VCE (%d).\n", r); 8407 + cik_vce_resume(rdev); 8495 8408 8496 8409 r = radeon_ib_pool_init(rdev); 8497 8410 if (r) { ··· 8555 8500 uvd_v1_0_fini(rdev); 8556 8501 radeon_uvd_suspend(rdev); 8557 8502 } 8558 - radeon_vce_suspend(rdev); 8503 + if (rdev->has_vce) 8504 + radeon_vce_suspend(rdev); 8559 8505 cik_fini_pg(rdev); 8560 8506 cik_fini_cg(rdev); 8561 8507 cik_irq_suspend(rdev); ··· 8683 8627 r600_ring_init(rdev, ring, 256 * 1024); 8684 8628 8685 8629 cik_uvd_init(rdev); 8686 - 8687 - r = radeon_vce_init(rdev); 8688 - if (!r) { 8689 - ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; 8690 - ring->ring_obj = NULL; 8691 - r600_ring_init(rdev, ring, 4096); 8692 - 8693 - ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; 8694 - ring->ring_obj = NULL; 8695 - r600_ring_init(rdev, ring, 4096); 8696 - } 8630 + cik_vce_init(rdev); 8697 8631 8698 8632 rdev->ih.ring_obj = NULL; 8699 8633 r600_ih_ring_init(rdev, 64 * 1024);