Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Revert "powerpc/fsl_msi: spread msi ints across different MSIRs"

This reverts commit c822e73731fce3b49a4887140878d084d8a44c08.

This commit conflicted with a bitmap allocator change that partially
accomplishes the same thing, but which does so more correctly. Revert
this one until it can be respun on top of the correct change.

Signed-off-by: Scott Wood <scottwood@freescale.com>

+16 -57
-2
arch/powerpc/include/asm/msi_bitmap.h
··· 25 25 void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset, 26 26 unsigned int num); 27 27 void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq); 28 - int msi_bitmap_alloc_hwirqs_from_offset(struct msi_bitmap *bmp, int offset, 29 - int num); 30 28 31 29 int msi_bitmap_reserve_dt_hwirqs(struct msi_bitmap *bmp); 32 30
+1 -30
arch/powerpc/sysdev/fsl_msi.c
··· 213 213 * available interrupt. 214 214 */ 215 215 list_for_each_entry(msi_data, &msi_head, list) { 216 - int off; 217 - 218 216 /* 219 217 * If the PCI node has an fsl,msi property, then we 220 218 * restrict our search to the corresponding MSI node. ··· 224 226 if (phandle && (phandle != msi_data->phandle)) 225 227 continue; 226 228 227 - /* 228 - * Allocate the msi message so that it fits on distinct 229 - * MSIR registers. Obviously, since MSIR registers are 230 - * limited they will overlap at one point. 231 - * 232 - * Due to the format of the newly introduced MSIIR1 in 233 - * mpic 4.3, consecutive msi message values map to 234 - * distinct MSIRs, thus distinct msi irq cascades, so 235 - * nothing special needs to be done in this case. 236 - * On older mpic versions the chose distinct SRS 237 - * values by aligning the msi message value to the 238 - * SRS field shift. 239 - */ 240 - if (msi_data->feature & FSL_PIC_FTR_MPIC_4_3) { 241 - off = 0; 242 - } else { 243 - off = atomic_inc_return(&msi_data->msi_alloc_cnt) % 244 - msi_data->msir_num; 245 - off <<= msi_data->srs_shift; 246 - } 247 - hwirq = msi_bitmap_alloc_hwirqs_from_offset( 248 - &msi_data->bitmap, off, 1); 229 + hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1); 249 230 if (hwirq >= 0) 250 231 break; 251 232 } ··· 464 487 goto error_out; 465 488 } 466 489 467 - atomic_set(&msi->msi_alloc_cnt, -1); 468 - 469 490 p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len); 470 491 471 492 if (of_device_is_compatible(dev->dev.of_node, "fsl,mpic-msi-v4.3") || 472 493 of_device_is_compatible(dev->dev.of_node, "fsl,vmpic-msi-v4.3")) { 473 494 msi->srs_shift = MSIIR1_SRS_SHIFT; 474 495 msi->ibs_shift = MSIIR1_IBS_SHIFT; 475 - msi->msir_num = NR_MSI_REG_MSIIR1; 476 - msi->feature |= FSL_PIC_FTR_MPIC_4_3; 477 - 478 496 if (p) 479 497 dev_warn(&dev->dev, "%s: dose not support msi-available-ranges property\n", 480 498 __func__); ··· 487 515 488 516 msi->srs_shift = MSIIR_SRS_SHIFT; 489 517 msi->ibs_shift = MSIIR_IBS_SHIFT; 490 - msi->msir_num = NR_MSI_REG_MSIIR; 491 518 492 519 if (p && len % (2 * sizeof(u32)) != 0) { 493 520 dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
-5
arch/powerpc/sysdev/fsl_msi.h
··· 15 15 16 16 #include <linux/of.h> 17 17 #include <asm/msi_bitmap.h> 18 - #include <asm/atomic.h> 19 18 20 19 #define NR_MSI_REG_MSIIR 8 /* MSIIR can index 8 MSI registers */ 21 20 #define NR_MSI_REG_MSIIR1 16 /* MSIIR1 can index 16 MSI registers */ ··· 27 28 #define FSL_PIC_IP_IPIC 0x00000002 28 29 #define FSL_PIC_IP_VMPIC 0x00000003 29 30 30 - #define FSL_PIC_FTR_MPIC_4_3 0x00000010 31 - 32 31 struct fsl_msi_cascade_data; 33 32 34 33 struct fsl_msi { ··· 37 40 u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */ 38 41 u32 ibs_shift; /* Shift of interrupt bit select */ 39 42 u32 srs_shift; /* Shift of the shared interrupt register select */ 40 - u32 msir_num; /* Number of available MSIR regs */ 41 - atomic_t msi_alloc_cnt; /* Counter for MSI hwirq allocations */ 42 43 void __iomem *msi_regs; 43 44 u32 feature; 44 45 struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX];
+15 -20
arch/powerpc/sysdev/msi_bitmap.c
··· 14 14 #include <asm/msi_bitmap.h> 15 15 #include <asm/setup.h> 16 16 17 - int msi_bitmap_alloc_hwirqs_from_offset(struct msi_bitmap *bmp, int offset, 18 - int num) 19 - { 20 - unsigned long flags; 21 - int index; 22 - int order = get_count_order(num); 23 - 24 - spin_lock_irqsave(&bmp->lock, flags); 25 - index = bitmap_find_next_zero_area(bmp->bitmap, bmp->irq_count, 26 - offset, num, (1 << order) - 1); 27 - bitmap_set(bmp->bitmap, index, num); 28 - spin_unlock_irqrestore(&bmp->lock, flags); 29 - 30 - pr_debug("msi_bitmap: found %d free bits starting from offset %d at index %d\n", 31 - num, offset, index); 32 - 33 - return index; 34 - } 35 - 36 17 int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num) 37 18 { 38 - return msi_bitmap_alloc_hwirqs_from_offset(bmp, 0, num); 19 + unsigned long flags; 20 + int offset, order = get_count_order(num); 21 + 22 + spin_lock_irqsave(&bmp->lock, flags); 23 + /* 24 + * This is fast, but stricter than we need. We might want to add 25 + * a fallback routine which does a linear search with no alignment. 26 + */ 27 + offset = bitmap_find_free_region(bmp->bitmap, bmp->irq_count, order); 28 + spin_unlock_irqrestore(&bmp->lock, flags); 29 + 30 + pr_debug("msi_bitmap: allocated 0x%x (2^%d) at offset 0x%x\n", 31 + num, order, offset); 32 + 33 + return offset; 39 34 } 40 35 41 36 void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset,