Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: tango4: Initial device trees

This device tree was tested on a Sigma Designs SMP8758 Vantage-1172
Rev E1 development board.

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

authored by

Marc Gonzalez and committed by
Olof Johansson
cad008b8 7ca08a90

+200
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arch/arm/boot/dts/Makefile
··· 693 693 dtb-$(CONFIG_MACH_SUN9I) += \ 694 694 sun9i-a80-optimus.dtb \ 695 695 sun9i-a80-cubieboard4.dtb 696 + dtb-$(CONFIG_ARCH_TANGO) += \ 697 + tango4-vantage-1172.dtb 696 698 dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ 697 699 tegra20-harmony.dtb \ 698 700 tegra20-iris-512.dtb \
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arch/arm/boot/dts/tango4-common.dtsi
··· 1 + /* 2 + * Based on Mans Rullgard's Tango3 DT 3 + * https://github.com/mansr/linux-tangox 4 + */ 5 + 6 + #define CPU_CLK 0 7 + #define SYS_CLK 1 8 + 9 + #include <dt-bindings/interrupt-controller/arm-gic.h> 10 + 11 + / { 12 + interrupt-parent = <&gic>; 13 + #address-cells = <1>; 14 + #size-cells = <1>; 15 + 16 + periph_clk: periph_clk { 17 + compatible = "fixed-factor-clock"; 18 + clocks = <&clkgen CPU_CLK>; 19 + clock-mult = <1>; 20 + clock-div = <2>; 21 + #clock-cells = <0>; 22 + }; 23 + 24 + mpcore { 25 + compatible = "simple-bus"; 26 + ranges = <0x00000000 0x20000000 0x2000>; 27 + #address-cells = <1>; 28 + #size-cells = <1>; 29 + 30 + scu@0 { 31 + compatible = "arm,cortex-a9-scu"; 32 + reg = <0x0 0x100>; 33 + }; 34 + 35 + twd@600 { 36 + compatible = "arm,cortex-a9-twd-timer"; 37 + reg = <0x600 0x10>; 38 + interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; 39 + clocks = <&periph_clk>; 40 + always-on; 41 + }; 42 + 43 + gic: interrupt-controller@1000 { 44 + compatible = "arm,cortex-a9-gic"; 45 + #interrupt-cells = <3>; 46 + interrupt-controller; 47 + reg = <0x1000 0x1000>, <0x100 0x100>; 48 + }; 49 + }; 50 + 51 + l2cc: l2-cache-controller@20100000 { 52 + compatible = "arm,pl310-cache"; 53 + reg = <0x20100000 0x1000>; 54 + cache-level = <2>; 55 + cache-unified; 56 + }; 57 + 58 + soc { 59 + compatible = "simple-bus"; 60 + interrupt-parent = <&irq0>; 61 + #address-cells = <1>; 62 + #size-cells = <1>; 63 + ranges; 64 + 65 + xtal: xtal { 66 + compatible = "fixed-clock"; 67 + clock-frequency = <27000000>; 68 + #clock-cells = <0>; 69 + }; 70 + 71 + clkgen: clkgen@10000 { 72 + compatible = "sigma,tango4-clkgen"; 73 + reg = <0x10000 0x40>; 74 + clocks = <&xtal>; 75 + #clock-cells = <1>; 76 + }; 77 + 78 + tick-counter@10048 { 79 + compatible = "sigma,tick-counter"; 80 + reg = <0x10048 0x4>; 81 + clocks = <&xtal>; 82 + }; 83 + 84 + uart: serial@10700 { 85 + compatible = "ralink,rt2880-uart"; 86 + reg = <0x10700 0x30>; 87 + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; 88 + clock-frequency = <7372800>; 89 + reg-shift = <2>; 90 + }; 91 + 92 + eth0: ethernet@26000 { 93 + compatible = "sigma,smp8734-ethernet"; 94 + reg = <0x26000 0x800>; 95 + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; 96 + clocks = <&clkgen SYS_CLK>; 97 + }; 98 + 99 + intc: interrupt-controller@6e000 { 100 + compatible = "sigma,smp8642-intc"; 101 + reg = <0x6e000 0x400>; 102 + ranges = <0 0x6e000 0x400>; 103 + interrupt-parent = <&gic>; 104 + interrupt-controller; 105 + #address-cells = <1>; 106 + #size-cells = <1>; 107 + 108 + irq0: irq0@000 { 109 + reg = <0x000 0x100>; 110 + interrupt-controller; 111 + #interrupt-cells = <2>; 112 + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 113 + }; 114 + 115 + irq1: irq1@100 { 116 + reg = <0x100 0x100>; 117 + interrupt-controller; 118 + #interrupt-cells = <2>; 119 + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 120 + }; 121 + 122 + irq2: irq2@300 { 123 + reg = <0x300 0x100>; 124 + interrupt-controller; 125 + #interrupt-cells = <2>; 126 + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 127 + }; 128 + }; 129 + }; 130 + };
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arch/arm/boot/dts/tango4-smp8758.dtsi
··· 1 + #include <dt-bindings/interrupt-controller/arm-gic.h> 2 + 3 + / { 4 + cpus { 5 + #address-cells = <1>; 6 + #size-cells = <0>; 7 + enable-method = "sigma,tango4-smp"; 8 + 9 + cpu0: cpu@0 { 10 + compatible = "arm,cortex-a9"; 11 + next-level-cache = <&l2cc>; 12 + device_type = "cpu"; 13 + reg = <0>; 14 + }; 15 + 16 + cpu1: cpu@1 { 17 + compatible = "arm,cortex-a9"; 18 + next-level-cache = <&l2cc>; 19 + device_type = "cpu"; 20 + reg = <1>; 21 + }; 22 + }; 23 + 24 + pmu { 25 + compatible = "arm,cortex-a9-pmu"; 26 + interrupt-affinity = <&cpu0>, <&cpu1>; 27 + interrupts = 28 + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 29 + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 30 + }; 31 + };
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arch/arm/boot/dts/tango4-vantage-1172.dts
··· 1 + /dts-v1/; 2 + 3 + #include "tango4-smp8758.dtsi" 4 + #include "tango4-common.dtsi" 5 + 6 + / { 7 + model = "Sigma Designs SMP8758 Vantage-1172 Rev E1"; 8 + compatible = "sigma,vantage-1172", "sigma,smp8758", "sigma,tango4"; 9 + 10 + aliases { 11 + serial = &uart; 12 + }; 13 + 14 + memory@80000000 { 15 + device_type = "memory"; 16 + reg = <0x80000000 0x80000000>; /* 2 GB */ 17 + }; 18 + 19 + chosen { 20 + stdout-path = "serial:115200n8"; 21 + }; 22 + }; 23 + 24 + &eth0 { 25 + phy-connection-type = "rgmii"; 26 + phy-handle = <&eth0_phy>; 27 + #address-cells = <1>; 28 + #size-cells = <0>; 29 + 30 + /* Atheros AR8035 */ 31 + eth0_phy: ethernet-phy@4 { 32 + compatible = "ethernet-phy-id004d.d072", 33 + "ethernet-phy-ieee802.3-c22"; 34 + interrupts = <37 IRQ_TYPE_EDGE_RISING>; 35 + reg = <4>; 36 + }; 37 + };